![Xiubo Li](/assets/img/avatar_default.png)
This watchdog driver will be working on IMX2+, Vybrid, LS1, LS2+ platforms, and will be in different endianness mode in those SoCs: SoCs WDT endian mode ------------------------------------ IMX2+ LE Vybird LE LS1 BE LS2 LE Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
320 lines
8.8 KiB
C
320 lines
8.8 KiB
C
/*
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* Watchdog driver for IMX2 and later processors
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*
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* Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de>
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* Copyright (C) 2014 Freescale Semiconductor, Inc.
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*
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* some parts adapted by similar drivers from Darius Augulis and Vladimir
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* Zapolskiy, additional improvements by Wim Van Sebroeck.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* NOTE: MX1 has a slightly different Watchdog than MX2 and later:
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*
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* MX1: MX2+:
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* ---- -----
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* Registers: 32-bit 16-bit
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* Stopable timer: Yes No
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* Need to enable clk: No Yes
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* Halt on suspend: Manual Can be automatic
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*/
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#include <linux/clk.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/jiffies.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/timer.h>
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#include <linux/watchdog.h>
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#define DRIVER_NAME "imx2-wdt"
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#define IMX2_WDT_WCR 0x00 /* Control Register */
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#define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
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#define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */
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#define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */
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#define IMX2_WDT_WCR_WDZST (1 << 0) /* -> Watchdog timer Suspend */
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#define IMX2_WDT_WSR 0x02 /* Service Register */
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#define IMX2_WDT_SEQ1 0x5555 /* -> service sequence 1 */
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#define IMX2_WDT_SEQ2 0xAAAA /* -> service sequence 2 */
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#define IMX2_WDT_WRSR 0x04 /* Reset Status Register */
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#define IMX2_WDT_WRSR_TOUT (1 << 1) /* -> Reset due to Timeout */
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#define IMX2_WDT_MAX_TIME 128
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#define IMX2_WDT_DEFAULT_TIME 60 /* in seconds */
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#define WDOG_SEC_TO_COUNT(s) ((s * 2 - 1) << 8)
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struct imx2_wdt_device {
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struct clk *clk;
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struct regmap *regmap;
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struct timer_list timer; /* Pings the watchdog when closed */
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struct watchdog_device wdog;
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};
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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static unsigned timeout = IMX2_WDT_DEFAULT_TIME;
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module_param(timeout, uint, 0);
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MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default="
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__MODULE_STRING(IMX2_WDT_DEFAULT_TIME) ")");
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static const struct watchdog_info imx2_wdt_info = {
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.identity = "imx2+ watchdog",
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.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
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};
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static inline void imx2_wdt_setup(struct watchdog_device *wdog)
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{
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struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
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u32 val;
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regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
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/* Suspend timer in low power mode, write once-only */
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val |= IMX2_WDT_WCR_WDZST;
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/* Strip the old watchdog Time-Out value */
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val &= ~IMX2_WDT_WCR_WT;
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/* Generate reset if WDOG times out */
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val &= ~IMX2_WDT_WCR_WRE;
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/* Keep Watchdog Disabled */
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val &= ~IMX2_WDT_WCR_WDE;
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/* Set the watchdog's Time-Out value */
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val |= WDOG_SEC_TO_COUNT(wdog->timeout);
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regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
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/* enable the watchdog */
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val |= IMX2_WDT_WCR_WDE;
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regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
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}
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static inline bool imx2_wdt_is_running(struct imx2_wdt_device *wdev)
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{
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u32 val;
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regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
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return val & IMX2_WDT_WCR_WDE;
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}
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static int imx2_wdt_ping(struct watchdog_device *wdog)
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{
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struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
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regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ1);
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regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ2);
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return 0;
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}
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static void imx2_wdt_timer_ping(unsigned long arg)
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{
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struct watchdog_device *wdog = (struct watchdog_device *)arg;
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struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
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/* ping it every wdog->timeout / 2 seconds to prevent reboot */
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imx2_wdt_ping(wdog);
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mod_timer(&wdev->timer, jiffies + wdog->timeout * HZ / 2);
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}
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static int imx2_wdt_set_timeout(struct watchdog_device *wdog,
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unsigned int new_timeout)
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{
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struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
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regmap_update_bits(wdev->regmap, IMX2_WDT_WCR, IMX2_WDT_WCR_WT,
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WDOG_SEC_TO_COUNT(new_timeout));
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return 0;
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}
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static int imx2_wdt_start(struct watchdog_device *wdog)
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{
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struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
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if (imx2_wdt_is_running(wdev)) {
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/* delete the timer that pings the watchdog after close */
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del_timer_sync(&wdev->timer);
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imx2_wdt_set_timeout(wdog, wdog->timeout);
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} else
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imx2_wdt_setup(wdog);
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return imx2_wdt_ping(wdog);
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}
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static int imx2_wdt_stop(struct watchdog_device *wdog)
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{
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/*
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* We don't need a clk_disable, it cannot be disabled once started.
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* We use a timer to ping the watchdog while /dev/watchdog is closed
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*/
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imx2_wdt_timer_ping((unsigned long)wdog);
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return 0;
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}
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static inline void imx2_wdt_ping_if_active(struct watchdog_device *wdog)
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{
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struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
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if (imx2_wdt_is_running(wdev)) {
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imx2_wdt_set_timeout(wdog, wdog->timeout);
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imx2_wdt_timer_ping((unsigned long)wdog);
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}
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}
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static struct watchdog_ops imx2_wdt_ops = {
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.owner = THIS_MODULE,
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.start = imx2_wdt_start,
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.stop = imx2_wdt_stop,
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.ping = imx2_wdt_ping,
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.set_timeout = imx2_wdt_set_timeout,
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};
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static struct regmap_config imx2_wdt_regmap_config = {
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.reg_bits = 16,
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.reg_stride = 2,
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.val_bits = 16,
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.max_register = 0x8,
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};
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static int __init imx2_wdt_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct imx2_wdt_device *wdev;
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struct watchdog_device *wdog;
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struct resource *res;
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void __iomem *base;
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bool big_endian;
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int ret;
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u32 val;
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wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
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if (!wdev)
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return -ENOMEM;
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big_endian = of_property_read_bool(np, "big-endian");
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if (big_endian)
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imx2_wdt_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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wdev->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base,
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&imx2_wdt_regmap_config);
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if (IS_ERR(wdev->regmap)) {
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dev_err(&pdev->dev, "regmap init failed\n");
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return PTR_ERR(wdev->regmap);
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}
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wdev->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(wdev->clk)) {
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dev_err(&pdev->dev, "can't get Watchdog clock\n");
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return PTR_ERR(wdev->clk);
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}
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wdog = &wdev->wdog;
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wdog->info = &imx2_wdt_info;
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wdog->ops = &imx2_wdt_ops;
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wdog->min_timeout = 1;
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wdog->max_timeout = IMX2_WDT_MAX_TIME;
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clk_prepare_enable(wdev->clk);
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regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
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wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
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wdog->timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME);
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if (wdog->timeout != timeout)
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dev_warn(&pdev->dev, "Initial timeout out of range! Clamped from %u to %u\n",
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timeout, wdog->timeout);
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platform_set_drvdata(pdev, wdog);
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watchdog_set_drvdata(wdog, wdev);
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watchdog_set_nowayout(wdog, nowayout);
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watchdog_init_timeout(wdog, timeout, &pdev->dev);
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setup_timer(&wdev->timer, imx2_wdt_timer_ping, (unsigned long)wdog);
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imx2_wdt_ping_if_active(wdog);
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ret = watchdog_register_device(wdog);
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if (ret) {
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dev_err(&pdev->dev, "cannot register watchdog device\n");
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return ret;
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}
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dev_info(&pdev->dev, "timeout %d sec (nowayout=%d)\n",
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wdog->timeout, nowayout);
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return 0;
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}
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static int __exit imx2_wdt_remove(struct platform_device *pdev)
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{
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struct watchdog_device *wdog = platform_get_drvdata(pdev);
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struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
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watchdog_unregister_device(wdog);
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if (imx2_wdt_is_running(wdev)) {
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del_timer_sync(&wdev->timer);
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imx2_wdt_ping(wdog);
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dev_crit(&pdev->dev, "Device removed: Expect reboot!\n");
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}
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return 0;
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}
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static void imx2_wdt_shutdown(struct platform_device *pdev)
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{
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struct watchdog_device *wdog = platform_get_drvdata(pdev);
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struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
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if (imx2_wdt_is_running(wdev)) {
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/*
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* We are running, we need to delete the timer but will
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* give max timeout before reboot will take place
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*/
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del_timer_sync(&wdev->timer);
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imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME);
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imx2_wdt_ping(wdog);
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dev_crit(&pdev->dev, "Device shutdown: Expect reboot!\n");
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}
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}
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static const struct of_device_id imx2_wdt_dt_ids[] = {
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{ .compatible = "fsl,imx21-wdt", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, imx2_wdt_dt_ids);
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static struct platform_driver imx2_wdt_driver = {
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.remove = __exit_p(imx2_wdt_remove),
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.shutdown = imx2_wdt_shutdown,
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.driver = {
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.name = DRIVER_NAME,
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.owner = THIS_MODULE,
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.of_match_table = imx2_wdt_dt_ids,
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},
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};
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module_platform_driver_probe(imx2_wdt_driver, imx2_wdt_probe);
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MODULE_AUTHOR("Wolfram Sang");
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MODULE_DESCRIPTION("Watchdog driver for IMX2 and later");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:" DRIVER_NAME);
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