![James Hogan](/assets/img/avatar_default.png)
KGDB is a kernel debug stub and it can't be used to debug userland as it
can only safely access kernel memory.
On MIPS however KGDB has always got the register state of sleeping
processes from the userland register context at the beginning of the
kernel stack. This is meaningless for kernel threads (which never enter
userland), and for user threads it prevents the user seeing what it is
doing while in the kernel:
(gdb) info threads
Id Target Id Frame
...
3 Thread 2 (kthreadd) 0x0000000000000000 in ?? ()
2 Thread 1 (init) 0x000000007705c4b4 in ?? ()
1 Thread -2 (shadowCPU0) 0xffffffff8012524c in arch_kgdb_breakpoint () at arch/mips/kernel/kgdb.c:201
Get the register state instead from the (partial) kernel register
context stored in the task's thread_struct for resume() to restore. All
threads now correctly appear to be in context_switch():
(gdb) info threads
Id Target Id Frame
...
3 Thread 2 (kthreadd) context_switch (rq=<optimized out>, cookie=..., next=<optimized out>, prev=0x0) at kernel/sched/core.c:2903
2 Thread 1 (init) context_switch (rq=<optimized out>, cookie=..., next=<optimized out>, prev=0x0) at kernel/sched/core.c:2903
1 Thread -2 (shadowCPU0) 0xffffffff8012524c in arch_kgdb_breakpoint () at arch/mips/kernel/kgdb.c:201
Call clobbered registers which aren't saved and exception registers
(BadVAddr & Cause) which can't be easily determined without stack
unwinding are reported as 0. The PC is taken from the return address,
such that the state presented matches that found immediately after
returning from resume().
Fixes: 8854700115
("[MIPS] kgdb: add arch support for the kernel's kgdb core")
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Jason Wessel <jason.wessel@windriver.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/15829/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
424 lines
12 KiB
C
424 lines
12 KiB
C
/*
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* Originally written by Glenn Engel, Lake Stevens Instrument Division
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*
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* Contributed by HP Systems
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*
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* Modified for Linux/MIPS (and MIPS in general) by Andreas Busse
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* Send complaints, suggestions etc. to <andy@waldorf-gmbh.de>
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*
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* Copyright (C) 1995 Andreas Busse
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*
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* Copyright (C) 2003 MontaVista Software Inc.
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* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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*
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* Copyright (C) 2004-2005 MontaVista Software Inc.
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* Author: Manish Lachwani, mlachwani@mvista.com or manish@koffee-break.com
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*
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* Copyright (C) 2007-2008 Wind River Systems, Inc.
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* Author/Maintainer: Jason Wessel, jason.wessel@windriver.com
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/ptrace.h> /* for linux pt_regs struct */
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#include <linux/kgdb.h>
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#include <linux/kdebug.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <asm/inst.h>
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#include <asm/fpu.h>
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#include <asm/cacheflush.h>
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#include <asm/processor.h>
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#include <asm/sigcontext.h>
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#include <linux/uaccess.h>
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static struct hard_trap_info {
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unsigned char tt; /* Trap type code for MIPS R3xxx and R4xxx */
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unsigned char signo; /* Signal that we map this trap into */
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} hard_trap_info[] = {
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{ 6, SIGBUS }, /* instruction bus error */
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{ 7, SIGBUS }, /* data bus error */
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{ 9, SIGTRAP }, /* break */
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/* { 11, SIGILL }, */ /* CPU unusable */
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{ 12, SIGFPE }, /* overflow */
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{ 13, SIGTRAP }, /* trap */
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{ 14, SIGSEGV }, /* virtual instruction cache coherency */
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{ 15, SIGFPE }, /* floating point exception */
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{ 23, SIGSEGV }, /* watch */
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{ 31, SIGSEGV }, /* virtual data cache coherency */
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{ 0, 0} /* Must be last */
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};
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struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] =
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{
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{ "zero", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[0]) },
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{ "at", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[1]) },
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{ "v0", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[2]) },
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{ "v1", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[3]) },
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{ "a0", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[4]) },
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{ "a1", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[5]) },
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{ "a2", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[6]) },
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{ "a3", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[7]) },
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{ "t0", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[8]) },
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{ "t1", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[9]) },
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{ "t2", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[10]) },
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{ "t3", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[11]) },
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{ "t4", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[12]) },
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{ "t5", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[13]) },
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{ "t6", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[14]) },
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{ "t7", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[15]) },
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{ "s0", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[16]) },
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{ "s1", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[17]) },
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{ "s2", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[18]) },
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{ "s3", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[19]) },
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{ "s4", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[20]) },
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{ "s5", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[21]) },
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{ "s6", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[22]) },
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{ "s7", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[23]) },
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{ "t8", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[24]) },
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{ "t9", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[25]) },
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{ "k0", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[26]) },
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{ "k1", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[27]) },
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{ "gp", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[28]) },
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{ "sp", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[29]) },
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{ "s8", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[30]) },
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{ "ra", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[31]) },
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{ "sr", GDB_SIZEOF_REG, offsetof(struct pt_regs, cp0_status) },
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{ "lo", GDB_SIZEOF_REG, offsetof(struct pt_regs, lo) },
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{ "hi", GDB_SIZEOF_REG, offsetof(struct pt_regs, hi) },
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{ "bad", GDB_SIZEOF_REG, offsetof(struct pt_regs, cp0_badvaddr) },
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{ "cause", GDB_SIZEOF_REG, offsetof(struct pt_regs, cp0_cause) },
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{ "pc", GDB_SIZEOF_REG, offsetof(struct pt_regs, cp0_epc) },
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{ "f0", GDB_SIZEOF_REG, 0 },
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{ "f1", GDB_SIZEOF_REG, 1 },
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{ "f2", GDB_SIZEOF_REG, 2 },
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{ "f3", GDB_SIZEOF_REG, 3 },
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{ "f4", GDB_SIZEOF_REG, 4 },
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{ "f5", GDB_SIZEOF_REG, 5 },
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{ "f6", GDB_SIZEOF_REG, 6 },
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{ "f7", GDB_SIZEOF_REG, 7 },
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{ "f8", GDB_SIZEOF_REG, 8 },
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{ "f9", GDB_SIZEOF_REG, 9 },
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{ "f10", GDB_SIZEOF_REG, 10 },
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{ "f11", GDB_SIZEOF_REG, 11 },
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{ "f12", GDB_SIZEOF_REG, 12 },
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{ "f13", GDB_SIZEOF_REG, 13 },
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{ "f14", GDB_SIZEOF_REG, 14 },
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{ "f15", GDB_SIZEOF_REG, 15 },
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{ "f16", GDB_SIZEOF_REG, 16 },
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{ "f17", GDB_SIZEOF_REG, 17 },
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{ "f18", GDB_SIZEOF_REG, 18 },
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{ "f19", GDB_SIZEOF_REG, 19 },
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{ "f20", GDB_SIZEOF_REG, 20 },
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{ "f21", GDB_SIZEOF_REG, 21 },
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{ "f22", GDB_SIZEOF_REG, 22 },
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{ "f23", GDB_SIZEOF_REG, 23 },
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{ "f24", GDB_SIZEOF_REG, 24 },
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{ "f25", GDB_SIZEOF_REG, 25 },
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{ "f26", GDB_SIZEOF_REG, 26 },
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{ "f27", GDB_SIZEOF_REG, 27 },
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{ "f28", GDB_SIZEOF_REG, 28 },
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{ "f29", GDB_SIZEOF_REG, 29 },
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{ "f30", GDB_SIZEOF_REG, 30 },
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{ "f31", GDB_SIZEOF_REG, 31 },
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{ "fsr", GDB_SIZEOF_REG, 0 },
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{ "fir", GDB_SIZEOF_REG, 0 },
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};
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int dbg_set_reg(int regno, void *mem, struct pt_regs *regs)
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{
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int fp_reg;
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if (regno < 0 || regno >= DBG_MAX_REG_NUM)
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return -EINVAL;
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if (dbg_reg_def[regno].offset != -1 && regno < 38) {
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memcpy((void *)regs + dbg_reg_def[regno].offset, mem,
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dbg_reg_def[regno].size);
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} else if (current && dbg_reg_def[regno].offset != -1 && regno < 72) {
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/* FP registers 38 -> 69 */
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if (!(regs->cp0_status & ST0_CU1))
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return 0;
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if (regno == 70) {
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/* Process the fcr31/fsr (register 70) */
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memcpy((void *)¤t->thread.fpu.fcr31, mem,
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dbg_reg_def[regno].size);
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goto out_save;
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} else if (regno == 71) {
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/* Ignore the fir (register 71) */
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goto out_save;
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}
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fp_reg = dbg_reg_def[regno].offset;
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memcpy((void *)¤t->thread.fpu.fpr[fp_reg], mem,
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dbg_reg_def[regno].size);
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out_save:
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restore_fp(current);
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}
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return 0;
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}
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char *dbg_get_reg(int regno, void *mem, struct pt_regs *regs)
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{
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int fp_reg;
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if (regno >= DBG_MAX_REG_NUM || regno < 0)
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return NULL;
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if (dbg_reg_def[regno].offset != -1 && regno < 38) {
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/* First 38 registers */
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memcpy(mem, (void *)regs + dbg_reg_def[regno].offset,
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dbg_reg_def[regno].size);
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} else if (current && dbg_reg_def[regno].offset != -1 && regno < 72) {
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/* FP registers 38 -> 69 */
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if (!(regs->cp0_status & ST0_CU1))
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goto out;
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save_fp(current);
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if (regno == 70) {
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/* Process the fcr31/fsr (register 70) */
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memcpy(mem, (void *)¤t->thread.fpu.fcr31,
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dbg_reg_def[regno].size);
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goto out;
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} else if (regno == 71) {
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/* Ignore the fir (register 71) */
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memset(mem, 0, dbg_reg_def[regno].size);
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goto out;
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}
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fp_reg = dbg_reg_def[regno].offset;
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memcpy(mem, (void *)¤t->thread.fpu.fpr[fp_reg],
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dbg_reg_def[regno].size);
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}
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out:
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return dbg_reg_def[regno].name;
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}
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void arch_kgdb_breakpoint(void)
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{
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__asm__ __volatile__(
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".globl breakinst\n\t"
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".set\tnoreorder\n\t"
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"nop\n"
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"breakinst:\tbreak\n\t"
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"nop\n\t"
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".set\treorder");
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}
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static void kgdb_call_nmi_hook(void *ignored)
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{
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mm_segment_t old_fs;
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old_fs = get_fs();
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set_fs(get_ds());
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kgdb_nmicallback(raw_smp_processor_id(), NULL);
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set_fs(old_fs);
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}
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void kgdb_roundup_cpus(unsigned long flags)
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{
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local_irq_enable();
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smp_call_function(kgdb_call_nmi_hook, NULL, 0);
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local_irq_disable();
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}
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static int compute_signal(int tt)
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{
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struct hard_trap_info *ht;
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for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
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if (ht->tt == tt)
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return ht->signo;
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return SIGHUP; /* default for things we don't know about */
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}
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/*
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* Similar to regs_to_gdb_regs() except that process is sleeping and so
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* we may not be able to get all the info.
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*/
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void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
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{
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int reg;
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#if (KGDB_GDB_REG_SIZE == 32)
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u32 *ptr = (u32 *)gdb_regs;
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#else
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u64 *ptr = (u64 *)gdb_regs;
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#endif
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for (reg = 0; reg < 16; reg++)
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*(ptr++) = 0;
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/* S0 - S7 */
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*(ptr++) = p->thread.reg16;
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*(ptr++) = p->thread.reg17;
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*(ptr++) = p->thread.reg18;
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*(ptr++) = p->thread.reg19;
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*(ptr++) = p->thread.reg20;
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*(ptr++) = p->thread.reg21;
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*(ptr++) = p->thread.reg22;
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*(ptr++) = p->thread.reg23;
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for (reg = 24; reg < 28; reg++)
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*(ptr++) = 0;
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/* GP, SP, FP, RA */
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*(ptr++) = (long)p;
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*(ptr++) = p->thread.reg29;
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*(ptr++) = p->thread.reg30;
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*(ptr++) = p->thread.reg31;
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*(ptr++) = p->thread.cp0_status;
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/* lo, hi */
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*(ptr++) = 0;
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*(ptr++) = 0;
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/*
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* BadVAddr, Cause
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* Ideally these would come from the last exception frame up the stack
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* but that requires unwinding, otherwise we can't know much for sure.
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*/
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*(ptr++) = 0;
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*(ptr++) = 0;
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/*
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* PC
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* use return address (RA), i.e. the moment after return from resume()
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*/
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*(ptr++) = p->thread.reg31;
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}
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void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long pc)
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{
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regs->cp0_epc = pc;
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}
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/*
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* Calls linux_debug_hook before the kernel dies. If KGDB is enabled,
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* then try to fall into the debugger
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*/
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static int kgdb_mips_notify(struct notifier_block *self, unsigned long cmd,
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void *ptr)
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{
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struct die_args *args = (struct die_args *)ptr;
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struct pt_regs *regs = args->regs;
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int trap = (regs->cp0_cause & 0x7c) >> 2;
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mm_segment_t old_fs;
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#ifdef CONFIG_KPROBES
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/*
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* Return immediately if the kprobes fault notifier has set
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* DIE_PAGE_FAULT.
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*/
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if (cmd == DIE_PAGE_FAULT)
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return NOTIFY_DONE;
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#endif /* CONFIG_KPROBES */
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/* Userspace events, ignore. */
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if (user_mode(regs))
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return NOTIFY_DONE;
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/* Kernel mode. Set correct address limit */
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old_fs = get_fs();
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set_fs(get_ds());
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if (atomic_read(&kgdb_active) != -1)
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kgdb_nmicallback(smp_processor_id(), regs);
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if (kgdb_handle_exception(trap, compute_signal(trap), cmd, regs)) {
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set_fs(old_fs);
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return NOTIFY_DONE;
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}
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if (atomic_read(&kgdb_setting_breakpoint))
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if ((trap == 9) && (regs->cp0_epc == (unsigned long)breakinst))
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regs->cp0_epc += 4;
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/* In SMP mode, __flush_cache_all does IPI */
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local_irq_enable();
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__flush_cache_all();
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set_fs(old_fs);
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return NOTIFY_STOP;
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}
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#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
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int kgdb_ll_trap(int cmd, const char *str,
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struct pt_regs *regs, long err, int trap, int sig)
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{
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struct die_args args = {
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.regs = regs,
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.str = str,
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.err = err,
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.trapnr = trap,
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.signr = sig,
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};
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if (!kgdb_io_module_registered)
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return NOTIFY_DONE;
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return kgdb_mips_notify(NULL, cmd, &args);
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}
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#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
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static struct notifier_block kgdb_notifier = {
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.notifier_call = kgdb_mips_notify,
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};
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/*
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* Handle the 'c' command
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*/
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int kgdb_arch_handle_exception(int vector, int signo, int err_code,
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char *remcom_in_buffer, char *remcom_out_buffer,
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struct pt_regs *regs)
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{
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char *ptr;
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unsigned long address;
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switch (remcom_in_buffer[0]) {
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case 'c':
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/* handle the optional parameter */
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ptr = &remcom_in_buffer[1];
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if (kgdb_hex2long(&ptr, &address))
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regs->cp0_epc = address;
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return 0;
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}
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return -1;
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}
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struct kgdb_arch arch_kgdb_ops;
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int kgdb_arch_init(void)
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{
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union mips_instruction insn = {
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.r_format = {
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.opcode = spec_op,
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.func = break_op,
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}
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};
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memcpy(arch_kgdb_ops.gdb_bpt_instr, insn.byte, BREAK_INSTR_SIZE);
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register_die_notifier(&kgdb_notifier);
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return 0;
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}
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/*
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* kgdb_arch_exit - Perform any architecture specific uninitalization.
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*
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* This function will handle the uninitalization of any architecture
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* specific callbacks, for dynamic registration and unregistration.
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*/
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void kgdb_arch_exit(void)
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{
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unregister_die_notifier(&kgdb_notifier);
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}
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