![Lorenzo Pieralisi](/assets/img/avatar_default.png)
04c81c7293
("MIPS: PCI: Replace pci_fixup_irqs() call with host bridge IRQ mapping hooks") moved the PCI IRQ fixup to the new host bridge map/swizzle_irq() hooks mechanism. Those hooks can also be called after boot, when all the __init/__initdata/__initconst sections have been freed. Therefore, functions called by them (and the data they refer to) must not be marked as __init/__initdata/__initconst lest compilation trigger section mismatch warnings. Fix all the board files map_irq() hooks by simply removing the respective __init/__initdata/__initconst section markers and by adding another persistent hook IRQ map for the txx9 board files. Fixes:04c81c7293
("MIPS: PCI: Replace pci_fixup_irqs() call with host bridge IRQ mapping hooks") Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Steve French <smfrench@gmail.com>
161 lines
4.7 KiB
C
161 lines
4.7 KiB
C
/*
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* Copyright (C) 2008 Lemote Technology
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* Copyright (C) 2004 ICT CAS
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* Author: Li xiaoyu, lixy@ict.ac.cn
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*
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* Copyright (C) 2007 Lemote, Inc.
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* Author: Fuxin Zhang, zhangfx@lemote.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <loongson.h>
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#include <cs5536/cs5536.h>
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#include <cs5536/cs5536_pci.h>
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/* PCI interrupt pins
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*
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* These should not be changed, or you should consider loongson2f interrupt
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* register and your pci card dispatch
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*/
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#define PCIA 4
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#define PCIB 5
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#define PCIC 6
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#define PCID 7
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/* all the pci device has the PCIA pin, check the datasheet. */
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static char irq_tab[][5] = {
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/* INTA INTB INTC INTD */
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{0, 0, 0, 0, 0}, /* 11: Unused */
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{0, 0, 0, 0, 0}, /* 12: Unused */
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{0, 0, 0, 0, 0}, /* 13: Unused */
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{0, 0, 0, 0, 0}, /* 14: Unused */
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{0, 0, 0, 0, 0}, /* 15: Unused */
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{0, 0, 0, 0, 0}, /* 16: Unused */
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{0, PCIA, 0, 0, 0}, /* 17: RTL8110-0 */
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{0, PCIB, 0, 0, 0}, /* 18: RTL8110-1 */
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{0, PCIC, 0, 0, 0}, /* 19: SiI3114 */
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{0, PCID, 0, 0, 0}, /* 20: 3-ports nec usb */
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{0, PCIA, PCIB, PCIC, PCID}, /* 21: PCI-SLOT */
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{0, 0, 0, 0, 0}, /* 22: Unused */
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{0, 0, 0, 0, 0}, /* 23: Unused */
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{0, 0, 0, 0, 0}, /* 24: Unused */
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{0, 0, 0, 0, 0}, /* 25: Unused */
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{0, 0, 0, 0, 0}, /* 26: Unused */
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{0, 0, 0, 0, 0}, /* 27: Unused */
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};
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int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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int virq;
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if ((PCI_SLOT(dev->devfn) != PCI_IDSEL_CS5536)
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&& (PCI_SLOT(dev->devfn) < 32)) {
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virq = irq_tab[slot][pin];
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printk(KERN_INFO "slot: %d, pin: %d, irq: %d\n", slot, pin,
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virq + LOONGSON_IRQ_BASE);
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if (virq != 0)
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return LOONGSON_IRQ_BASE + virq;
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else
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return 0;
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} else if (PCI_SLOT(dev->devfn) == PCI_IDSEL_CS5536) { /* cs5536 */
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switch (PCI_FUNC(dev->devfn)) {
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case 2:
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pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
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CS5536_IDE_INTR);
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return CS5536_IDE_INTR; /* for IDE */
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case 3:
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pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
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CS5536_ACC_INTR);
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return CS5536_ACC_INTR; /* for AUDIO */
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case 4: /* for OHCI */
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case 5: /* for EHCI */
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case 6: /* for UDC */
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case 7: /* for OTG */
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pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
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CS5536_USB_INTR);
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return CS5536_USB_INTR;
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}
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return dev->irq;
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} else {
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printk(KERN_INFO " strange pci slot number.\n");
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return 0;
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}
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}
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/* Do platform specific device initialization at pci_enable_device() time */
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int pcibios_plat_dev_init(struct pci_dev *dev)
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{
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return 0;
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}
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/* CS5536 SPEC. fixup */
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static void loongson_cs5536_isa_fixup(struct pci_dev *pdev)
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{
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/* the uart1 and uart2 interrupt in PIC is enabled as default */
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pci_write_config_dword(pdev, PCI_UART1_INT_REG, 1);
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pci_write_config_dword(pdev, PCI_UART2_INT_REG, 1);
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}
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static void loongson_cs5536_ide_fixup(struct pci_dev *pdev)
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{
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/* setting the mutex pin as IDE function */
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pci_write_config_dword(pdev, PCI_IDE_CFG_REG,
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CS5536_IDE_FLASH_SIGNATURE);
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}
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static void loongson_cs5536_acc_fixup(struct pci_dev *pdev)
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{
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/* enable the AUDIO interrupt in PIC */
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pci_write_config_dword(pdev, PCI_ACC_INT_REG, 1);
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pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xc0);
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}
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static void loongson_cs5536_ohci_fixup(struct pci_dev *pdev)
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{
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/* enable the OHCI interrupt in PIC */
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/* THE OHCI, EHCI, UDC, OTG are shared with interrupt in PIC */
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pci_write_config_dword(pdev, PCI_OHCI_INT_REG, 1);
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}
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static void loongson_cs5536_ehci_fixup(struct pci_dev *pdev)
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{
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u32 hi, lo;
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/* Serial short detect enable */
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_rdmsr(USB_MSR_REG(USB_CONFIG), &hi, &lo);
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_wrmsr(USB_MSR_REG(USB_CONFIG), (1 << 1) | (1 << 3), lo);
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/* setting the USB2.0 micro frame length */
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pci_write_config_dword(pdev, PCI_EHCI_FLADJ_REG, 0x2000);
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}
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static void loongson_nec_fixup(struct pci_dev *pdev)
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{
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unsigned int val;
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pci_read_config_dword(pdev, 0xe0, &val);
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/* Only 2 port be used */
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pci_write_config_dword(pdev, 0xe0, (val & ~3) | 0x2);
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA,
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loongson_cs5536_isa_fixup);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_OHC,
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loongson_cs5536_ohci_fixup);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_EHC,
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loongson_cs5536_ehci_fixup);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_AUDIO,
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loongson_cs5536_acc_fixup);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_IDE,
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loongson_cs5536_ide_fixup);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
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loongson_nec_fixup);
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