e619cd3d61
The z/VM driver sets bit "63-22" in control register zero to one in order to enable the CP Service interrupt (0x2603). However the irq subclass mask that normally corresponds to the CP Service interrupt is "63-54" (== "63-22-32"). So it looks like the author read the documentation with the 32 bit sized cr0 register bit positions (== 22), but didn't realize that bit numbers change, if applied to a 64 bit register (== 54) due to the numbering scheme. Also use irq_subclass_register() instead if ctl_set_bit() since multiple services depend on the service signal subclass mask, which is the correct bit. This also explains why nobody noticed the bug, since the bit is always enabled anyway (e.g. pfault). Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Reviewed-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com> Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> |
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| block | ||
| char | ||
| cio | ||
| crypto | ||
| kvm | ||
| net | ||
| scsi | ||
| Makefile | ||