Linus Walleij e641b987c2 irqchip: support cascaded VICs ... This adds support for a VIC to be cascaded off another IRQ. On the Integrator/AP logical module IM-PD1 there is a VIC cascaded off the central FPGA IRQ controller so this is needed for that to work out. In order for the plug-in board to be able to register all the devices with their IRQs relative to the offset of the base obtained for the cascaded VIC, the base IRQ number is passed back to the caller. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>		2014-02-13 11:21:21 +01:00
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arm-gic.h	irqchip: arm-gic: Define additional MMIO offsets and masks	2013-12-21 10:01:27 -08:00
arm-vic.h	irqchip: support cascaded VICs	2014-02-13 11:21:21 +01:00
chained_irq.h	arm: Move chained_irq_(enter|exit) to a generic file	2013-03-26 16:11:43 +00:00
metag-ext.h
metag.h
mmp.h	ARM: mmp: avoid to include head file in mach-mmp	2013-08-24 17:44:45 +08:00
mxs.h	ARM: mxs: move icoll driver into drivers/irqchip	2013-04-01 16:30:04 +08:00
spear-shirq.h
versatile-fpga.h
xtensa-mx.h	xtensa: add MX irqchip	2014-01-14 10:19:58 -08:00
xtensa-pic.h	xtensa: move built-in PIC to drivers/irqchip	2014-01-14 10:19:56 -08:00