![Lorenzo Pieralisi](/assets/img/avatar_default.png)
The introduction of percpu offset optimisation through tpidr_el1 in: Commit id :7158627686f02319c50c8d9d78f75d4c8 "arm64: percpu: implement optimised pcpu access using tpidr_el1" requires cpu_{suspend/resume} to restore the tpidr_el1 register upon resume so that percpu variables can be addressed correctly when a CPU comes out of reset from warm-boot. This patch fixes cpu_{suspend}/{resume} tpidr_el1 restoration on resume, by calling the set_my_cpu_offset C API, as it is done on primary and secondary CPUs on cold boot, so that, even if the register used to store the percpu offset is changed, the save and restore of general purpose registers does not have to be updated. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
141 lines
3.9 KiB
C
141 lines
3.9 KiB
C
#include <linux/percpu.h>
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#include <linux/slab.h>
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#include <asm/cacheflush.h>
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#include <asm/cpu_ops.h>
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#include <asm/debug-monitors.h>
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#include <asm/pgtable.h>
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#include <asm/memory.h>
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#include <asm/smp_plat.h>
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#include <asm/suspend.h>
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#include <asm/tlbflush.h>
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extern int __cpu_suspend(unsigned long);
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/*
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* This is called by __cpu_suspend() to save the state, and do whatever
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* flushing is required to ensure that when the CPU goes to sleep we have
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* the necessary data available when the caches are not searched.
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*
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* @arg: Argument to pass to suspend operations
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* @ptr: CPU context virtual address
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* @save_ptr: address of the location where the context physical address
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* must be saved
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*/
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int __cpu_suspend_finisher(unsigned long arg, struct cpu_suspend_ctx *ptr,
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phys_addr_t *save_ptr)
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{
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int cpu = smp_processor_id();
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*save_ptr = virt_to_phys(ptr);
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cpu_do_suspend(ptr);
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/*
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* Only flush the context that must be retrieved with the MMU
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* off. VA primitives ensure the flush is applied to all
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* cache levels so context is pushed to DRAM.
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*/
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__flush_dcache_area(ptr, sizeof(*ptr));
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__flush_dcache_area(save_ptr, sizeof(*save_ptr));
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return cpu_ops[cpu]->cpu_suspend(arg);
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}
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/*
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* This hook is provided so that cpu_suspend code can restore HW
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* breakpoints as early as possible in the resume path, before reenabling
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* debug exceptions. Code cannot be run from a CPU PM notifier since by the
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* time the notifier runs debug exceptions might have been enabled already,
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* with HW breakpoints registers content still in an unknown state.
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*/
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void (*hw_breakpoint_restore)(void *);
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void __init cpu_suspend_set_dbg_restorer(void (*hw_bp_restore)(void *))
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{
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/* Prevent multiple restore hook initializations */
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if (WARN_ON(hw_breakpoint_restore))
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return;
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hw_breakpoint_restore = hw_bp_restore;
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}
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/**
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* cpu_suspend
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*
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* @arg: argument to pass to the finisher function
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*/
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int cpu_suspend(unsigned long arg)
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{
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struct mm_struct *mm = current->active_mm;
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int ret, cpu = smp_processor_id();
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unsigned long flags;
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/*
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* If cpu_ops have not been registered or suspend
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* has not been initialized, cpu_suspend call fails early.
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*/
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if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_suspend)
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return -EOPNOTSUPP;
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/*
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* From this point debug exceptions are disabled to prevent
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* updates to mdscr register (saved and restored along with
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* general purpose registers) from kernel debuggers.
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*/
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local_dbg_save(flags);
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/*
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* mm context saved on the stack, it will be restored when
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* the cpu comes out of reset through the identity mapped
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* page tables, so that the thread address space is properly
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* set-up on function return.
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*/
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ret = __cpu_suspend(arg);
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if (ret == 0) {
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cpu_switch_mm(mm->pgd, mm);
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flush_tlb_all();
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/*
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* Restore per-cpu offset before any kernel
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* subsystem relying on it has a chance to run.
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*/
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set_my_cpu_offset(per_cpu_offset(cpu));
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/*
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* Restore HW breakpoint registers to sane values
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* before debug exceptions are possibly reenabled
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* through local_dbg_restore.
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*/
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if (hw_breakpoint_restore)
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hw_breakpoint_restore(NULL);
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}
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/*
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* Restore pstate flags. OS lock and mdscr have been already
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* restored, so from this point onwards, debugging is fully
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* renabled if it was enabled when core started shutdown.
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*/
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local_dbg_restore(flags);
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return ret;
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}
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extern struct sleep_save_sp sleep_save_sp;
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extern phys_addr_t sleep_idmap_phys;
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static int cpu_suspend_init(void)
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{
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void *ctx_ptr;
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/* ctx_ptr is an array of physical addresses */
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ctx_ptr = kcalloc(mpidr_hash_size(), sizeof(phys_addr_t), GFP_KERNEL);
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if (WARN_ON(!ctx_ptr))
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return -ENOMEM;
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sleep_save_sp.save_ptr_stash = ctx_ptr;
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sleep_save_sp.save_ptr_stash_phys = virt_to_phys(ctx_ptr);
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sleep_idmap_phys = virt_to_phys(idmap_pg_dir);
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__flush_dcache_area(&sleep_save_sp, sizeof(struct sleep_save_sp));
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__flush_dcache_area(&sleep_idmap_phys, sizeof(sleep_idmap_phys));
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return 0;
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}
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early_initcall(cpu_suspend_init);
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