![Scott Wood](/assets/img/avatar_default.png)
There are a few things that make the existing hw tablewalk handlers unsuitable for e6500: - Indirect entries go in TLB1 (though the resulting direct entries go in TLB0). - It has threads, but no "tlbsrx." -- so we need a spinlock and a normal "tlbsx". Because we need this lock, hardware tablewalk is mandatory on e6500 unless we want to add spinlock+tlbsx to the normal bolted TLB miss handler. - TLB1 has no HES (nor next-victim hint) so we need software round robin (TODO: integrate this round robin data with hugetlb/KVM) - The existing tablewalk handlers map half of a page table at a time, because IBM hardware has a fixed 1MiB indirect page size. e6500 has variable size indirect entries, with a minimum of 2MiB. So we can't do the half-page indirect mapping, and even if we could it would be less efficient than mapping the full page. - Like on e5500, the linear mapping is bolted, so we don't need the overhead of supporting nested tlb misses. Note that hardware tablewalk does not work in rev1 of e6500. We do not expect to support e6500 rev1 in mainline Linux. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Mihai Caraman <mihai.caraman@freescale.com>
319 lines
8.5 KiB
C
319 lines
8.5 KiB
C
/*
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* Modifications by Kumar Gala (galak@kernel.crashing.org) to support
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* E500 Book E processors.
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*
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* Copyright 2004,2010 Freescale Semiconductor, Inc.
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*
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* This file contains the routines for initializing the MMU
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* on the 4xx series of chips.
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* -- paulus
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*
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* Derived from arch/ppc/mm/init.c:
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/ptrace.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#include <linux/swap.h>
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#include <linux/stddef.h>
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#include <linux/vmalloc.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/highmem.h>
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#include <linux/memblock.h>
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#include <asm/pgalloc.h>
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#include <asm/prom.h>
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#include <asm/io.h>
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#include <asm/mmu_context.h>
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#include <asm/pgtable.h>
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#include <asm/mmu.h>
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#include <asm/uaccess.h>
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#include <asm/smp.h>
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#include <asm/machdep.h>
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#include <asm/setup.h>
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#include <asm/paca.h>
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#include "mmu_decl.h"
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unsigned int tlbcam_index;
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#define NUM_TLBCAMS (64)
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struct tlbcam TLBCAM[NUM_TLBCAMS];
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struct tlbcamrange {
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unsigned long start;
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unsigned long limit;
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phys_addr_t phys;
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} tlbcam_addrs[NUM_TLBCAMS];
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extern unsigned int tlbcam_index;
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unsigned long tlbcam_sz(int idx)
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{
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return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
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}
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/*
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* Return PA for this VA if it is mapped by a CAM, or 0
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*/
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phys_addr_t v_mapped_by_tlbcam(unsigned long va)
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{
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int b;
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for (b = 0; b < tlbcam_index; ++b)
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if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
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return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
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return 0;
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}
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/*
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* Return VA for a given PA or 0 if not mapped
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*/
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unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
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{
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int b;
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for (b = 0; b < tlbcam_index; ++b)
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if (pa >= tlbcam_addrs[b].phys
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&& pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
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+tlbcam_addrs[b].phys)
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return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
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return 0;
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}
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/*
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* Set up a variable-size TLB entry (tlbcam). The parameters are not checked;
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* in particular size must be a power of 4 between 4k and the max supported by
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* an implementation; max may further be limited by what can be represented in
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* an unsigned long (for example, 32-bit implementations cannot support a 4GB
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* size).
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*/
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static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
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unsigned long size, unsigned long flags, unsigned int pid)
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{
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unsigned int tsize;
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tsize = __ilog2(size) - 10;
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#ifdef CONFIG_SMP
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if ((flags & _PAGE_NO_CACHE) == 0)
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flags |= _PAGE_COHERENT;
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#endif
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TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
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TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
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TLBCAM[index].MAS2 = virt & PAGE_MASK;
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TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
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TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
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TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
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TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
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TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
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TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR;
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TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
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if (mmu_has_feature(MMU_FTR_BIG_PHYS))
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TLBCAM[index].MAS7 = (u64)phys >> 32;
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/* Below is unlikely -- only for large user pages or similar */
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if (pte_user(flags)) {
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TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
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TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
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}
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tlbcam_addrs[index].start = virt;
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tlbcam_addrs[index].limit = virt + size - 1;
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tlbcam_addrs[index].phys = phys;
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loadcam_entry(index);
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}
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unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
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phys_addr_t phys)
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{
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unsigned int camsize = __ilog2(ram);
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unsigned int align = __ffs(virt | phys);
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unsigned long max_cam;
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if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
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/* Convert (4^max) kB to (2^max) bytes */
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max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
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camsize &= ~1U;
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align &= ~1U;
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} else {
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/* Convert (2^max) kB to (2^max) bytes */
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max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10;
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}
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if (camsize > align)
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camsize = align;
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if (camsize > max_cam)
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camsize = max_cam;
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return 1UL << camsize;
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}
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static unsigned long map_mem_in_cams_addr(phys_addr_t phys, unsigned long virt,
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unsigned long ram, int max_cam_idx)
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{
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int i;
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unsigned long amount_mapped = 0;
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/* Calculate CAM values */
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for (i = 0; ram && i < max_cam_idx; i++) {
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unsigned long cam_sz;
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cam_sz = calc_cam_sz(ram, virt, phys);
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settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0);
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ram -= cam_sz;
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amount_mapped += cam_sz;
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virt += cam_sz;
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phys += cam_sz;
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}
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tlbcam_index = i;
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#ifdef CONFIG_PPC64
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get_paca()->tcd.esel_next = i;
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get_paca()->tcd.esel_max = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
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get_paca()->tcd.esel_first = i;
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#endif
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return amount_mapped;
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}
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unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx)
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{
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unsigned long virt = PAGE_OFFSET;
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phys_addr_t phys = memstart_addr;
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return map_mem_in_cams_addr(phys, virt, ram, max_cam_idx);
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}
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#ifdef CONFIG_PPC32
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#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
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#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
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#endif
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unsigned long __init mmu_mapin_ram(unsigned long top)
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{
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return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
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}
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/*
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* MMU_init_hw does the chip-specific initialization of the MMU hardware.
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*/
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void __init MMU_init_hw(void)
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{
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flush_instruction_cache();
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}
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void __init adjust_total_lowmem(void)
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{
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unsigned long ram;
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int i;
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/* adjust lowmem size to __max_low_memory */
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ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
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i = switch_to_as1();
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__max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM);
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restore_to_as0(i, 0, 0, 1);
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pr_info("Memory CAM mapping: ");
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for (i = 0; i < tlbcam_index - 1; i++)
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pr_cont("%lu/", tlbcam_sz(i) >> 20);
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pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
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(unsigned int)((total_lowmem - __max_low_memory) >> 20));
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memblock_set_current_limit(memstart_addr + __max_low_memory);
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}
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void setup_initial_memory_limit(phys_addr_t first_memblock_base,
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phys_addr_t first_memblock_size)
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{
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phys_addr_t limit = first_memblock_base + first_memblock_size;
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/* 64M mapped initially according to head_fsl_booke.S */
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memblock_set_current_limit(min_t(u64, limit, 0x04000000));
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}
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#ifdef CONFIG_RELOCATABLE
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int __initdata is_second_reloc;
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notrace void __init relocate_init(u64 dt_ptr, phys_addr_t start)
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{
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unsigned long base = KERNELBASE;
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kernstart_addr = start;
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if (is_second_reloc) {
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virt_phys_offset = PAGE_OFFSET - memstart_addr;
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return;
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}
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/*
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* Relocatable kernel support based on processing of dynamic
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* relocation entries. Before we get the real memstart_addr,
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* We will compute the virt_phys_offset like this:
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* virt_phys_offset = stext.run - kernstart_addr
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*
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* stext.run = (KERNELBASE & ~0x3ffffff) +
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* (kernstart_addr & 0x3ffffff)
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* When we relocate, we have :
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*
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* (kernstart_addr & 0x3ffffff) = (stext.run & 0x3ffffff)
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*
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* hence:
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* virt_phys_offset = (KERNELBASE & ~0x3ffffff) -
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* (kernstart_addr & ~0x3ffffff)
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*
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*/
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start &= ~0x3ffffff;
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base &= ~0x3ffffff;
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virt_phys_offset = base - start;
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early_get_first_memblock_info(__va(dt_ptr), NULL);
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/*
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* We now get the memstart_addr, then we should check if this
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* address is the same as what the PAGE_OFFSET map to now. If
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* not we have to change the map of PAGE_OFFSET to memstart_addr
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* and do a second relocation.
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*/
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if (start != memstart_addr) {
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int n;
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long offset = start - memstart_addr;
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is_second_reloc = 1;
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n = switch_to_as1();
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/* map a 64M area for the second relocation */
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if (memstart_addr > start)
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map_mem_in_cams(0x4000000, CONFIG_LOWMEM_CAM_NUM);
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else
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map_mem_in_cams_addr(start, PAGE_OFFSET + offset,
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0x4000000, CONFIG_LOWMEM_CAM_NUM);
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restore_to_as0(n, offset, __va(dt_ptr), 1);
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/* We should never reach here */
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panic("Relocation error");
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}
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}
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#endif
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#endif
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