2009-07-19 20:40:01 -06:00
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/*
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2010-06-08 14:07:46 -06:00
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* (C) Copyright 2010
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* Texas Instruments, <www.ti.com>
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2009-07-19 20:40:01 -06:00
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*
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2013-07-08 01:37:19 -06:00
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* SPDX-License-Identifier: GPL-2.0+
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2009-07-19 20:40:01 -06:00
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*/
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2010-06-08 14:07:46 -06:00
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#ifndef _SYS_PROTO_H_
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#define _SYS_PROTO_H_
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2011-11-15 07:49:55 -07:00
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#include <asm/arch/omap.h>
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2013-05-29 20:54:32 -06:00
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#include <asm/arch/clock.h>
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2010-06-08 14:07:46 -06:00
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#include <asm/io.h>
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2011-07-21 07:09:59 -06:00
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#include <asm/omap_common.h>
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2013-11-22 04:23:29 -07:00
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#include <linux/mtd/omap_gpmc.h>
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2011-07-21 07:10:01 -06:00
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#include <asm/arch/mux_omap4.h>
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2014-05-16 11:02:24 -06:00
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#include <asm/ti-common/sys_proto.h>
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2010-06-08 14:07:46 -06:00
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2013-04-23 18:41:24 -06:00
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DECLARE_GLOBAL_DATA_PTR;
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2016-02-27 11:18:53 -07:00
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#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
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2013-11-27 08:46:21 -07:00
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extern const struct emif_regs emif_regs_elpida_200_mhz_2cs;
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extern const struct emif_regs emif_regs_elpida_380_mhz_1cs;
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extern const struct emif_regs emif_regs_elpida_400_mhz_1cs;
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extern const struct emif_regs emif_regs_elpida_400_mhz_2cs;
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2014-12-18 14:28:35 -07:00
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extern const struct dmm_lisa_map_regs lisa_map_2G_x_1_x_2;
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extern const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2;
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extern const struct dmm_lisa_map_regs ma_lisa_map_2G_x_2_x_2;
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2016-02-27 11:18:53 -07:00
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#else
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extern const struct lpddr2_device_details elpida_2G_S4_details;
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extern const struct lpddr2_device_details elpida_4G_S4_details;
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#endif
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2016-02-27 11:18:54 -07:00
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2016-02-27 11:18:55 -07:00
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#ifdef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
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extern const struct lpddr2_device_timings jedec_default_timings;
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#else
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2016-02-27 11:18:54 -07:00
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extern const struct lpddr2_device_timings elpida_2G_S4_timings;
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#endif
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2010-06-08 14:07:46 -06:00
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struct omap_sysinfo {
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char *board_string;
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};
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2011-07-21 07:09:59 -06:00
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extern const struct omap_sysinfo sysinfo;
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2010-06-08 14:07:46 -06:00
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2010-07-15 14:19:16 -06:00
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void gpmc_init(void);
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2010-06-08 14:07:46 -06:00
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void watchdog_init(void);
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u32 get_device_type(void);
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2011-07-21 07:10:01 -06:00
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void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
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2016-02-27 11:18:56 -07:00
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void set_muxconf_regs(void);
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2010-08-04 10:39:40 -06:00
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u32 wait_on_value(u32, u32, void *, u32);
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void sdelay(unsigned long);
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2016-02-24 11:30:52 -07:00
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void setup_early_clocks(void);
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2011-07-21 07:10:07 -06:00
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void prcm_init(void);
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2016-02-24 11:30:57 -07:00
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void do_board_detect(void);
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2013-02-03 21:22:00 -07:00
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void bypass_dpll(u32 const base);
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2011-07-21 07:10:07 -06:00
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void freq_update_core(void);
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u32 get_sys_clk_freq(void);
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u32 omap4_ddr_clk(void);
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2011-07-21 07:10:12 -06:00
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void cancel_out(u32 *num, u32 *den, u32 den_limit);
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2011-07-21 07:10:09 -06:00
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void sdram_init(void);
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2011-11-15 07:49:55 -07:00
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u32 omap_sdram_size(void);
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u32 cortex_rev(void);
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2013-05-31 10:31:59 -06:00
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void save_omap_boot_params(void);
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2011-11-15 07:49:55 -07:00
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void init_omap_revision(void);
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void do_io_settings(void);
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2013-05-29 20:54:33 -06:00
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void sri2c_init(void);
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2012-03-01 07:17:37 -07:00
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int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
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2012-05-29 13:26:41 -06:00
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u32 warm_reset(void);
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2012-05-29 13:26:43 -06:00
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void force_emif_self_refresh(void);
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2013-04-17 14:49:40 -06:00
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void setup_warmreset_time(void);
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2015-03-09 16:12:03 -06:00
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#define OMAP4_SERVICE_PL310_CONTROL_REG_SET 0x102
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2010-06-08 14:07:46 -06:00
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#endif
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