2015-03-11 22:24:39 -06:00
|
|
|
CONFIG_ARM=y
|
2015-04-21 05:38:20 -06:00
|
|
|
CONFIG_ARCH_SOCFPGA=y
|
2015-03-11 22:24:39 -06:00
|
|
|
CONFIG_TARGET_SOCFPGA_CYCLONE5=y
|
2014-11-07 06:10:41 -07:00
|
|
|
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
|
2015-05-12 13:46:24 -06:00
|
|
|
CONFIG_SPL=y
|
2015-06-22 15:15:30 -06:00
|
|
|
# CONFIG_CMD_IMLS is not set
|
|
|
|
# CONFIG_CMD_FLASH is not set
|
2015-05-12 13:46:24 -06:00
|
|
|
CONFIG_OF_CONTROL=y
|
2015-08-11 16:31:54 -06:00
|
|
|
CONFIG_SPL_OF_CONTROL=y
|
2015-06-22 15:15:29 -06:00
|
|
|
CONFIG_SPI_FLASH=y
|
2015-07-25 10:47:02 -06:00
|
|
|
CONFIG_DM_ETH=y
|
2015-06-22 15:15:29 -06:00
|
|
|
CONFIG_NETDEVICES=y
|
2015-04-05 16:07:34 -06:00
|
|
|
CONFIG_ETH_DESIGNWARE=y
|
2015-07-09 16:04:23 -06:00
|
|
|
CONFIG_SPL_DM=y
|
|
|
|
CONFIG_SPL_MMC_SUPPORT=y
|
2015-07-20 23:50:03 -06:00
|
|
|
CONFIG_DM_SEQ_ALIAS=y
|
|
|
|
CONFIG_SPL_SIMPLE_BUS=y
|
|
|
|
CONFIG_DM_SPI=y
|
|
|
|
CONFIG_DM_SPI_FLASH=y
|
|
|
|
CONFIG_SPL_SPI_SUPPORT=y
|
2015-07-12 07:23:28 -06:00
|
|
|
CONFIG_SPL_STACK_R=y
|
|
|
|
CONFIG_SPL_STACK_R_ADDR=0x00800000
|
|
|
|
CONFIG_SYS_MALLOC_F_LEN=0x2000
|