From 939b150ae5f6cbca4d3583ad1fcd0f237b71d868 Mon Sep 17 00:00:00 2001 From: Dimitar Penev Date: Sat, 19 Nov 2011 15:02:00 -0500 Subject: [PATCH 1/8] Blackfin: pr1: new board port This add support for the PR1 Appliance - Asterisk based ISDN PRI PBX. This board is Blackfin BF537 based. The schematics are not fully opened. Signed-off-by: Dimitar Penev Signed-off-by: Mike Frysinger --- MAINTAINERS | 4 ++ board/pr1/Makefile | 50 ++++++++++++++ board/pr1/config.mk | 30 ++++++++ board/pr1/pr1.c | 30 ++++++++ boards.cfg | 1 + include/configs/pr1.h | 157 ++++++++++++++++++++++++++++++++++++++++++ 6 files changed, 272 insertions(+) create mode 100644 board/pr1/Makefile create mode 100644 board/pr1/config.mk create mode 100644 board/pr1/pr1.c create mode 100644 include/configs/pr1.h diff --git a/MAINTAINERS b/MAINTAINERS index 8c4fe2df8d..4451ecd9a3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1162,6 +1162,10 @@ Chong Huang bf525-ucr2 BF525 +Dimitar Penev + + PR1 Appliance BF537 + ######################################################################### # NDS32 Systems: # # # diff --git a/board/pr1/Makefile b/board/pr1/Makefile new file mode 100644 index 0000000000..6ae998fcf8 --- /dev/null +++ b/board/pr1/Makefile @@ -0,0 +1,50 @@ +# +# U-boot - Makefile +# +# Copyright (c) Switchfin Org. +# +# Copyright (c) 2005-2007 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS-y := $(BOARD).o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/pr1/config.mk b/board/pr1/config.mk new file mode 100644 index 0000000000..fac20c538a --- /dev/null +++ b/board/pr1/config.mk @@ -0,0 +1,30 @@ +# +# Copyright (c) Switchfin Org. +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 +CFLAGS_lib/zlib += -O2 diff --git a/board/pr1/pr1.c b/board/pr1/pr1.c new file mode 100644 index 0000000000..bb907f3966 --- /dev/null +++ b/board/pr1/pr1.c @@ -0,0 +1,30 @@ +/* + * U-boot - main board file + * + * Copyright (c) Switchfin Org. + * + * Copyright (c) 2005-2008 Analog Devices Inc. + * + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * Licensed under the GPL-2 or later. + */ + +#include +#include +#include + +int checkboard(void) +{ + printf("Board: Switchvoice PR1 Appliance\n"); + printf(" Support: http://www.switchvoice.com/\n"); + return 0; +} + +#ifdef CONFIG_BFIN_MAC +int board_eth_init(bd_t *bis) +{ + return bfin_EMAC_initialize(bis); +} +#endif diff --git a/boards.cfg b/boards.cfg index 2f90dbf928..fd8db61486 100644 --- a/boards.cfg +++ b/boards.cfg @@ -289,6 +289,7 @@ cm-bf561 blackfin blackfin dnp5370 blackfin blackfin ibf-dsp561 blackfin blackfin ip04 blackfin blackfin +pr1 blackfin blackfin tcm-bf518 blackfin blackfin tcm-bf537 blackfin blackfin M52277EVB m68k mcf5227x m52277evb freescale - M52277EVB:SYS_SPANSION_BOOT,SYS_TEXT_BASE=0x00000000 diff --git a/include/configs/pr1.h b/include/configs/pr1.h new file mode 100644 index 0000000000..03d4269584 --- /dev/null +++ b/include/configs/pr1.h @@ -0,0 +1,157 @@ +/* + * U-boot - Configuration file for PR1 Appliance + * + * based on bf537-stamp.h + * Copyright (c) Switchfin Org. + */ + +#ifndef __CONFIG_PR1_H__ +#define __CONFIG_PR1_H__ + +#include + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf537-0.3 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 24 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 5 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 11 +#define CONFIG_MEM_SIZE 128 + +#define CONFIG_EBIU_SDRRC_VAL 0x306 +#define CONFIG_EBIU_SDGCTL_VAL 0x8091998d + +#define CONFIG_EBIU_AMGCTL_VAL 0xFF +#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 +#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 + +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MALLOC_LEN (384 * 1024) + + +/* + * Network Settings + */ +#ifndef __ADSPBF534__ +#define ADI_CMDS_NETWORK 1 +#define CONFIG_BFIN_MAC +#define CONFIG_NETCONSOLE +#endif +#define CONFIG_HOSTNAME pr1 +#define CONFIG_TFTP_BLOCKSIZE 4404 +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ + + +/* + * Flash Settings + */ +#define CONFIG_SYS_NO_FLASH /* We have no parallel FLASH */ + + +/* + * SPI Settings + */ +#define CONFIG_BFIN_SPI +#define CONFIG_ENV_SPI_MAX_HZ 30000000 +#define CONFIG_SF_DEFAULT_SPEED 30000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO + + +/* + * Env Storage Settings + */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x10000 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x10000 +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR + + +/* + * I2C Settings + */ +#define CONFIG_BFIN_TWI_I2C +#define CONFIG_HARD_I2C + + +/* + * NAND Settings + */ +#define CONFIG_NAND_PLAT +#define CONFIG_SYS_NAND_BASE 0x20000000 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2)) +#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1)) +#define BFIN_NAND_WRITE(addr, cmd) \ + do { \ + bfin_write8(addr, cmd); \ + SSYNC(); \ + } while (0) + +#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd) +#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd) +#define NAND_PLAT_GPIO_DEV_READY GPIO_PF9 + +/* + * Misc Settings + */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_RTC_BFIN +#define CONFIG_UART_CONSOLE 0 +#define CONFIG_SYS_PROMPT "pr1>" +#define CONFIG_BOOTCOMMAND "run nandboot" +#define CONFIG_BOOTDELAY 2 +#define CONFIG_LOADADDR 0x2000000 + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include + +/* + * Overwrite some settings defined in bfin_adi_common.h + */ +#undef NAND_ENV_SETTINGS +#define NAND_ENV_SETTINGS \ + "nandargs=set bootargs " CONFIG_BOOTARGS "\0" \ + "nandboot=" \ + "nand read $(loadaddr) 0x0 0x900000;" \ + "run nandargs;" \ + "bootm" \ + "\0" + +#endif From 1a95d89f69391207f2a8467ca65f159160aec6ed Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sat, 19 Nov 2011 15:38:06 -0500 Subject: [PATCH 2/8] Blackfin: bf537-stamp: drop board reset workaround The bf537-stamp shouldn't need this SPI flash workaround. It was added by accident a long time ago through a convoluted series of steps which originated from a customer board (not the bf537-stamp). So drop it to keep people from incorrectly adding it to their own boards. Signed-off-by: Mike Frysinger --- board/bf537-stamp/bf537-stamp.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/board/bf537-stamp/bf537-stamp.c b/board/bf537-stamp/bf537-stamp.c index ec888d44d9..92dfffa8ca 100644 --- a/board/bf537-stamp/bf537-stamp.c +++ b/board/bf537-stamp/bf537-stamp.c @@ -43,13 +43,6 @@ int checkboard(void) return 0; } -void board_reset(void) -{ - /* workaround for weak pull ups on ssel */ - if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) - bfin_reset_boot_spi_cs(GPIO_PF10); -} - #ifdef CONFIG_BFIN_MAC static void board_init_enetaddr(uchar *mac_addr) { From 23f1dded5e1fd5141119bc1072c48847c4ba622b Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Fri, 25 Nov 2011 15:56:30 -0500 Subject: [PATCH 3/8] post: add blackfin to the post_time_ms list Signed-off-by: Mike Frysinger --- post/post.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/post/post.c b/post/post.c index d62f10aa53..8705b12f03 100644 --- a/post/post.c +++ b/post/post.c @@ -495,7 +495,8 @@ void post_reloc(void) */ unsigned long post_time_ms(unsigned long base) { -#if defined(CONFIG_PPC) || defined(CONFIG_ARM) && !defined(CONFIG_KIRKWOOD) +#if defined(CONFIG_PPC) || defined(CONFIG_BLACKFIN) || \ + (defined(CONFIG_ARM) && !defined(CONFIG_KIRKWOOD)) return (unsigned long)lldiv(get_ticks(), get_tbclk() / CONFIG_SYS_HZ) - base; #else From dae2242adae03231551b14f6dfda776d9b4d6ed2 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Fri, 25 Nov 2011 15:57:42 -0500 Subject: [PATCH 4/8] Blackfin: add in/out le32 variants These are rarely used, but the post code does currently, so add small redirect hacks for that. Signed-off-by: Mike Frysinger --- arch/blackfin/include/asm/io.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/blackfin/include/asm/io.h b/arch/blackfin/include/asm/io.h index 75244a0731..69f08bc7ef 100644 --- a/arch/blackfin/include/asm/io.h +++ b/arch/blackfin/include/asm/io.h @@ -134,9 +134,11 @@ static inline unsigned int readl(const volatile void __iomem *addr) #define inb(port) readb(__io(port)) #define inw(port) readw(__io(port)) #define inl(port) readl(__io(port)) +#define in_le32(port) inl(port) #define outb(x, port) writeb(x, __io(port)) #define outw(x, port) writew(x, __io(port)) #define outl(x, port) writel(x, __io(port)) +#define out_le32(x, port) outl(x, port) #define inb_p(port) inb(__io(port)) #define inw_p(port) inw(__io(port)) From 051a5f30f16739c11f762a7ae0c26ae95f26d62e Mon Sep 17 00:00:00 2001 From: Dimitar Penev Date: Fri, 25 Nov 2011 16:05:54 -0500 Subject: [PATCH 5/8] Blackfin: br4: new board port This adds support for the BR4 Appliance. It is a quad channel ISDN BRI board based on Blackfin BF537 CPU. Signed-off-by: Dimitar Penev Signed-off-by: Mike Frysinger --- MAINTAINERS | 1 + board/br4/Makefile | 50 ++++++++++++++ board/br4/br4.c | 30 ++++++++ board/br4/config.mk | 30 ++++++++ boards.cfg | 1 + include/configs/br4.h | 157 ++++++++++++++++++++++++++++++++++++++++++ 6 files changed, 269 insertions(+) create mode 100644 board/br4/Makefile create mode 100644 board/br4/br4.c create mode 100644 board/br4/config.mk create mode 100644 include/configs/br4.h diff --git a/MAINTAINERS b/MAINTAINERS index 4451ecd9a3..2068384f5e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1164,6 +1164,7 @@ Chong Huang Dimitar Penev + BR4 Appliance BF537 PR1 Appliance BF537 ######################################################################### diff --git a/board/br4/Makefile b/board/br4/Makefile new file mode 100644 index 0000000000..6ae998fcf8 --- /dev/null +++ b/board/br4/Makefile @@ -0,0 +1,50 @@ +# +# U-boot - Makefile +# +# Copyright (c) Switchfin Org. +# +# Copyright (c) 2005-2007 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS-y := $(BOARD).o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/br4/br4.c b/board/br4/br4.c new file mode 100644 index 0000000000..bc034e38d4 --- /dev/null +++ b/board/br4/br4.c @@ -0,0 +1,30 @@ +/* + * U-boot - main board file + * + * Copyright (c) Switchfin Org. + * + * Copyright (c) 2005-2008 Analog Devices Inc. + * + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * Licensed under the GPL-2 or later. + */ + +#include +#include +#include + +int checkboard(void) +{ + printf("Board: Switchvoice BR4 Appliance\n"); + printf(" Support: http://www.switchvoice.com/\n"); + return 0; +} + +#ifdef CONFIG_BFIN_MAC +int board_eth_init(bd_t *bis) +{ + return bfin_EMAC_initialize(bis); +} +#endif diff --git a/board/br4/config.mk b/board/br4/config.mk new file mode 100644 index 0000000000..fac20c538a --- /dev/null +++ b/board/br4/config.mk @@ -0,0 +1,30 @@ +# +# Copyright (c) Switchfin Org. +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 +CFLAGS_lib/zlib += -O2 diff --git a/boards.cfg b/boards.cfg index fd8db61486..f3209850f9 100644 --- a/boards.cfg +++ b/boards.cfg @@ -280,6 +280,7 @@ bf561-acvilon blackfin blackfin bf561-ezkit blackfin blackfin blackstamp blackfin blackfin blackvme blackfin blackfin +br4 blackfin blackfin cm-bf527 blackfin blackfin cm-bf533 blackfin blackfin cm-bf537e blackfin blackfin diff --git a/include/configs/br4.h b/include/configs/br4.h new file mode 100644 index 0000000000..ef3752dcd5 --- /dev/null +++ b/include/configs/br4.h @@ -0,0 +1,157 @@ +/* + * U-boot - Configuration file for BR4 Appliance + * + * based on bf537-stamp.h + * Copyright (c) Switchfin Org. + */ + +#ifndef __CONFIG_BR4_H__ +#define __CONFIG_BR4_H__ + +#include + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf537-0.3 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 24 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 5 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 10 +#define CONFIG_MEM_SIZE 64 + +#define CONFIG_EBIU_SDRRC_VAL 0x306 +#define CONFIG_EBIU_SDGCTL_VAL 0x8091998d + +#define CONFIG_EBIU_AMGCTL_VAL 0xFF +#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 +#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 + +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MALLOC_LEN (384 * 1024) + + +/* + * Network Settings + */ +#ifndef __ADSPBF534__ +#define ADI_CMDS_NETWORK 1 +#define CONFIG_BFIN_MAC +#define CONFIG_NETCONSOLE +#endif +#define CONFIG_HOSTNAME br4 +#define CONFIG_TFTP_BLOCKSIZE 4404 +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 5c:38:1a:80:a7:00 */ + + +/* + * Flash Settings + */ +#define CONFIG_SYS_NO_FLASH /* We have no parallel FLASH */ + + +/* + * SPI Settings + */ +#define CONFIG_BFIN_SPI +#define CONFIG_ENV_SPI_MAX_HZ 30000000 +#define CONFIG_SF_DEFAULT_SPEED 30000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO + + +/* + * Env Storage Settings + */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x10000 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x10000 +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR + + +/* + * I2C Settings + */ +#define CONFIG_BFIN_TWI_I2C +#define CONFIG_HARD_I2C + + +/* + * NAND Settings + */ +#define CONFIG_NAND_PLAT +#define CONFIG_SYS_NAND_BASE 0x20000000 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2)) +#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1)) +#define BFIN_NAND_WRITE(addr, cmd) \ + do { \ + bfin_write8(addr, cmd); \ + SSYNC(); \ + } while (0) + +#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd) +#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd) +#define NAND_PLAT_GPIO_DEV_READY GPIO_PF9 + +/* + * Misc Settings + */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_RTC_BFIN +#define CONFIG_UART_CONSOLE 0 +#define CONFIG_SYS_PROMPT "br4>" +#define CONFIG_BOOTCOMMAND "run nandboot" +#define CONFIG_BOOTDELAY 2 +#define CONFIG_LOADADDR 0x2000000 + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include + +/* + * Overwrite some settings defined in bfin_adi_common.h + */ +#undef NAND_ENV_SETTINGS +#define NAND_ENV_SETTINGS \ + "nandargs=set bootargs " CONFIG_BOOTARGS "\0" \ + "nandboot=" \ + "nand read $(loadaddr) 0x0 0x900000;" \ + "run nandargs;" \ + "bootm" \ + "\0" + +#endif From 273d11eae5cbd124ea64df99d14678b4d3694961 Mon Sep 17 00:00:00 2001 From: Macpaul Lin Date: Thu, 1 Dec 2011 12:32:10 +0800 Subject: [PATCH 6/8] linkage.h: move from blackfin to common includes 1. Add linkage.h support from blackfin to common include, which is a reduced version from Linux. 2. Add architecture part support of linkage.h into blackfin 3. Fix include path of in blackfin related to linkage.h due to header file movement. Signed-off-by: Macpaul Lin Signed-off-by: Mike Frysinger --- arch/blackfin/cpu/cache.S | 2 +- arch/blackfin/include/asm/blackfin_local.h | 2 +- arch/blackfin/include/asm/cache.h | 2 +- arch/blackfin/include/asm/linkage.h | 50 +------------- arch/blackfin/lib/__kgdb.S | 2 +- arch/blackfin/lib/outs.S | 2 +- include/linux/linkage.h | 76 ++++++++++++++++++++++ 7 files changed, 83 insertions(+), 53 deletions(-) create mode 100644 include/linux/linkage.h diff --git a/arch/blackfin/cpu/cache.S b/arch/blackfin/cpu/cache.S index 6ed655a674..5ca9e91d3f 100644 --- a/arch/blackfin/cpu/cache.S +++ b/arch/blackfin/cpu/cache.S @@ -8,8 +8,8 @@ * Licensed under the GPL-2 or later. */ -#include #include +#include #include .text diff --git a/arch/blackfin/include/asm/blackfin_local.h b/arch/blackfin/include/asm/blackfin_local.h index 71207b697a..49d0c9ec3a 100644 --- a/arch/blackfin/include/asm/blackfin_local.h +++ b/arch/blackfin/include/asm/blackfin_local.h @@ -48,7 +48,7 @@ #define L1_CACHE_SHIFT 5 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) -#include +#include #include #ifndef __ASSEMBLY__ diff --git a/arch/blackfin/include/asm/cache.h b/arch/blackfin/include/asm/cache.h index 482e4b52b6..568885a2c2 100644 --- a/arch/blackfin/include/asm/cache.h +++ b/arch/blackfin/include/asm/cache.h @@ -7,7 +7,7 @@ #ifndef __ARCH_BLACKFIN_CACHE_H #define __ARCH_BLACKFIN_CACHE_H -#include /* for asmlinkage */ +#include /* for asmlinkage */ /* * Bytes per L1 cache line diff --git a/arch/blackfin/include/asm/linkage.h b/arch/blackfin/include/asm/linkage.h index fbb497c7bd..6d4493a6c5 100644 --- a/arch/blackfin/include/asm/linkage.h +++ b/arch/blackfin/include/asm/linkage.h @@ -22,53 +22,7 @@ * MA 02110-1301 USA */ -#ifndef _LINUX_LINKAGE_H -#define _LINUX_LINKAGE_H - -#include - -#ifdef __cplusplus -#define CPP_ASMLINKAGE extern "C" -#else -#define CPP_ASMLINKAGE -#endif - -#define asmlinkage CPP_ASMLINKAGE - -#define SYMBOL_NAME_STR(X) #X -#define SYMBOL_NAME(X) X -#ifdef __STDC__ -#define SYMBOL_NAME_LABEL(X) X##: -#else -#define SYMBOL_NAME_LABEL(X) X: -#endif - -#define __ALIGN .align 4 -#define __ALIGN_STR ".align 4" - -#ifdef __ASSEMBLY__ - -#define ALIGN __ALIGN -#define ALIGN_STR __ALIGN_STR - -#define LENTRY(name) \ - ALIGN; \ - SYMBOL_NAME_LABEL(name) - -#define ENTRY(name) \ - .globl SYMBOL_NAME(name); \ - LENTRY(name) -#endif - -#ifndef END -#define END(name) \ - .size name, .-name -#endif - -#ifndef ENDPROC -#define ENDPROC(name) \ - .type name, @function; \ - END(name) -#endif +#ifndef __ASM_LINKAGE_H +#define __ASM_LINKAGE_H #endif diff --git a/arch/blackfin/lib/__kgdb.S b/arch/blackfin/lib/__kgdb.S index cba4179d3e..4ccde8f104 100644 --- a/arch/blackfin/lib/__kgdb.S +++ b/arch/blackfin/lib/__kgdb.S @@ -1,5 +1,5 @@ -#include +#include /* save stack context for non-local goto * int kgdb_setjmp(long *buf) diff --git a/arch/blackfin/lib/outs.S b/arch/blackfin/lib/outs.S index 253d4c3e41..39d5332615 100644 --- a/arch/blackfin/lib/outs.S +++ b/arch/blackfin/lib/outs.S @@ -8,7 +8,7 @@ * Licensed under the GPL-2. */ -#include +#include .align 2 diff --git a/include/linux/linkage.h b/include/linux/linkage.h new file mode 100644 index 0000000000..ed4cf6cbcd --- /dev/null +++ b/include/linux/linkage.h @@ -0,0 +1,76 @@ +/* + * U-boot - linkage.h + * + * Copyright (c) 2005-2007 Analog Devices Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _LINUX_LINKAGE_H +#define _LINUX_LINKAGE_H + +#include +#include + +#ifdef __cplusplus +#define CPP_ASMLINKAGE extern "C" +#else +#define CPP_ASMLINKAGE +#endif + +#define asmlinkage CPP_ASMLINKAGE + +#define SYMBOL_NAME_STR(X) #X +#define SYMBOL_NAME(X) X +#ifdef __STDC__ +#define SYMBOL_NAME_LABEL(X) X##: +#else +#define SYMBOL_NAME_LABEL(X) X: +#endif + +#define __ALIGN .align 4 +#define __ALIGN_STR ".align 4" + +#ifdef __ASSEMBLY__ + +#define ALIGN __ALIGN +#define ALIGN_STR __ALIGN_STR + +#define LENTRY(name) \ + ALIGN; \ + SYMBOL_NAME_LABEL(name) + +#define ENTRY(name) \ + .globl SYMBOL_NAME(name); \ + LENTRY(name) + +#ifndef END +#define END(name) \ + .size name, .-name +#endif + +#ifndef ENDPROC +#define ENDPROC(name) \ + .type name, @function; \ + END(name) +#endif + +#endif + +#endif From 3f54108be93587612786e5f7e5f5468893ff0de9 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 2 Feb 2012 18:54:20 -0500 Subject: [PATCH 7/8] Blackfin: bfin_nand: mark local func static This devready func is only used in this driver, so mark it static. Signed-off-by: Mike Frysinger --- drivers/mtd/nand/bfin_nand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/bfin_nand.c b/drivers/mtd/nand/bfin_nand.c index 3ee060f859..c7ddbb21d8 100644 --- a/drivers/mtd/nand/bfin_nand.c +++ b/drivers/mtd/nand/bfin_nand.c @@ -73,7 +73,7 @@ static void bfin_nfc_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) SSYNC(); } -int bfin_nfc_devready(struct mtd_info *mtd) +static int bfin_nfc_devready(struct mtd_info *mtd) { pr_stamp(); return (bfin_read_NFC_STAT() & NBUSY) ? 1 : 0; From 44f67f784889e1a27958fa3e995abe41ab925697 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Fri, 3 Feb 2012 08:04:22 -0500 Subject: [PATCH 8/8] Blackfin: pata_bfin: fix printf warning pata_bfin.c: In function 'bfin_ata_identify': pata_bfin.c:887:2: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'lbaint_t' Signed-off-by: Mike Frysinger --- drivers/block/pata_bfin.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/block/pata_bfin.c b/drivers/block/pata_bfin.c index 847c03226a..cce21fbc54 100644 --- a/drivers/block/pata_bfin.c +++ b/drivers/block/pata_bfin.c @@ -884,7 +884,7 @@ static void bfin_ata_identify(struct ata_port *ap, int dev) sata_dev_desc[ap->port_no].removable = 0; sata_dev_desc[ap->port_no].lba = (u32) n_sectors; - debug("lba=0x%x\n", sata_dev_desc[ap->port_no].lba); + debug("lba=0x%lx\n", sata_dev_desc[ap->port_no].lba); #ifdef CONFIG_LBA48 if (iop->command_set_2 & 0x0400)