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cmd_ide: enhance new feature "CONFIG_IDE_AHB"

Although most IDE controller is designed to be connected to PCI bridge,
there are still some IDE controller support AHB interface for SoC design.

The driver implementation of these IDE-AHB controllers differ from other
IDE-PCI controller, some additional registers and commands access is required
during CMD/DATA I/O. Hence a configuration "CONFIG_IDE_AHB" in cmd_ide.c is
required to be defined to support these kinds of SoC controllers. Such as
Faraday's FTIDE020 series and Global Unichip's UINF-0301.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
utp
Macpaul Lin 2011-04-11 20:45:32 +00:00 committed by Wolfgang Denk
parent dea6386b71
commit 0abddf82d5
3 changed files with 43 additions and 1 deletions

8
README
View File

@ -2751,6 +2751,14 @@ Low Level (hardware related) configuration options:
source code. It is used to make hardware dependant
initializations.
- CONFIG_IDE_AHB:
Most IDE controllers were designed to be connected with PCI
interface. Only few of them were designed for AHB interface.
When software is doing ATA command and data transfer to
IDE devices through IDE-AHB controller, some additional
registers accessing to these kind of IDE-AHB controller
is requierd.
- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
DO NOT CHANGE unless you know exactly what you're
doing! (11-4) [MPC8xx/82xx systems only]

View File

@ -517,8 +517,20 @@ __ide_outb(int dev, int port, unsigned char val)
{
debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
#if defined(CONFIG_IDE_AHB)
if (port) {
/* write command */
ide_write_register(dev, port, val);
} else {
/* write data */
outb(val, (ATA_CURR_BASE(dev)));
}
#else
outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
#endif
}
void ide_outb (int dev, int port, unsigned char val)
__attribute__((weak, alias("__ide_outb")));
@ -526,7 +538,13 @@ unsigned char inline
__ide_inb(int dev, int port)
{
uchar val;
#if defined(CONFIG_IDE_AHB)
val = ide_read_register(dev, port);
#else
val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
#endif
debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
return val;
@ -695,6 +713,7 @@ void ide_init (void)
ide_dev_desc[i].blksz=0;
ide_dev_desc[i].lba=0;
ide_dev_desc[i].block_read=ide_read;
ide_dev_desc[i].block_write = ide_write;
if (!ide_bus_ok[IDE_BUS(i)])
continue;
ide_led (led, 1); /* LED on */
@ -902,7 +921,11 @@ output_data(int dev, ulong *sect_buf, int words)
static void
output_data(int dev, ulong *sect_buf, int words)
{
outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
#if defined(CONFIG_IDE_AHB)
ide_write_data(dev, sect_buf, words);
#else
outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
#endif
}
#endif /* CONFIG_IDE_SWAP_IO */
@ -960,7 +983,11 @@ input_data(int dev, ulong *sect_buf, int words)
static void
input_data(int dev, ulong *sect_buf, int words)
{
#if defined(CONFIG_IDE_AHB)
ide_read_data(dev, sect_buf, words);
#else
insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
#endif
}
#endif /* CONFIG_IDE_SWAP_IO */

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@ -57,4 +57,11 @@ ulong ide_write(int device, lbaint_t blknr, ulong blkcnt, void *buffer);
#if defined(CONFIG_OF_IDE_FIXUP)
int ide_device_present(int dev);
#endif
#if defined(CONFIG_IDE_AHB)
unsigned char ide_read_register(int dev, unsigned int port);
void ide_write_register(int dev, unsigned int port, unsigned char val);
void ide_read_data(int dev, ulong *sect_buf, int words);
void ide_write_data(int dev, ulong *sect_buf, int words);
#endif
#endif /* _IDE_H */