AX88180: improve phy searching
Rather than hardcode specific phy addresses, search the possible phy address space to find the first available phy. Also respect the normal CONFIG_PHY_ADDR option for board porters to pick a specific address. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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@ -255,49 +255,60 @@ static int ax88180_phy_initial (struct eth_device *dev)
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{
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struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
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unsigned long tmp_regval;
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unsigned short phyaddr;
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/* Check avaliable PHY chipset */
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priv->PhyAddr = MARVELL_88E1111_PHYADDR;
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priv->PhyID0 = ax88180_mdio_read (dev, PHYIDR0);
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/* Search for first avaliable PHY chipset */
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#ifdef CONFIG_PHY_ADDR
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phyaddr = CONFIG_PHY_ADDR;
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#else
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for (phyaddr = 0; phyaddr < 32; ++phyaddr)
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#endif
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{
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priv->PhyAddr = phyaddr;
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priv->PhyID0 = ax88180_mdio_read(dev, PHYIDR0);
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if (priv->PhyID0 == MARVELL_88E1111_PHYIDR0) {
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switch (priv->PhyID0) {
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case MARVELL_88E1111_PHYIDR0:
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debug("ax88180: Found Marvell 88E1111 PHY."
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" (PHY Addr=0x%x)\n", priv->PhyAddr);
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debug ("ax88180: Found Marvell 88E1111 PHY."
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" (PHY Addr=0x%x)\n", priv->PhyAddr);
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tmp_regval = ax88180_mdio_read(dev, M88_EXT_SSR);
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if ((tmp_regval & HWCFG_MODE_MASK) != RGMII_COPPER_MODE) {
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ax88180_mdio_write(dev, M88_EXT_SCR, DEFAULT_EXT_SCR);
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if (ax88180_phy_reset(dev) < 0)
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return 0;
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ax88180_mdio_write(dev, M88_IER, LINK_CHANGE_INT);
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}
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tmp_regval = ax88180_mdio_read (dev, M88_EXT_SSR);
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if ((tmp_regval & HWCFG_MODE_MASK) == RGMII_COPPER_MODE) {
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return 1;
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ax88180_mdio_write (dev, M88_EXT_SCR, DEFAULT_EXT_SCR);
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if (ax88180_phy_reset (dev) < 0)
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return 0;
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ax88180_mdio_write (dev, M88_IER, LINK_CHANGE_INT);
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}
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} else {
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case CICADA_CIS8201_PHYIDR0:
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debug("ax88180: Found CICADA CIS8201 PHY"
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" chipset. (PHY Addr=0x%x)\n", priv->PhyAddr);
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priv->PhyAddr = CICADA_CIS8201_PHYADDR;
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priv->PhyID0 = ax88180_mdio_read (dev, PHYIDR0);
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if (priv->PhyID0 == CICADA_CIS8201_PHYIDR0) {
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debug ("ax88180: Found CICADA CIS8201 PHY"
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" chipset. (PHY Addr=0x%x)\n", priv->PhyAddr);
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ax88180_mdio_write (dev, CIS_IMR,
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ax88180_mdio_write(dev, CIS_IMR,
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(CIS_INT_ENABLE | LINK_CHANGE_INT));
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/* Set CIS_SMI_PRIORITY bit before force the media mode */
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tmp_regval =
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ax88180_mdio_read (dev, CIS_AUX_CTRL_STATUS);
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tmp_regval = ax88180_mdio_read(dev, CIS_AUX_CTRL_STATUS);
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tmp_regval &= ~CIS_SMI_PRIORITY;
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ax88180_mdio_write (dev, CIS_AUX_CTRL_STATUS,
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tmp_regval);
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} else {
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printf ("ax88180: Unknown PHY chipset!!\n");
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return 0;
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ax88180_mdio_write(dev, CIS_AUX_CTRL_STATUS, tmp_regval);
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return 1;
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case 0xffff:
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/* No PHY at this addr */
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break;
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default:
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printf("ax88180: Unknown PHY chipset %#x at addr %#x\n",
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priv->PhyID0, priv->PhyAddr);
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break;
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}
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}
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return 1;
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printf("ax88180: Unknown PHY chipset!!\n");
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return 0;
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}
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static void ax88180_media_config (struct eth_device *dev)
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@ -345,12 +356,16 @@ static void ax88180_media_config (struct eth_device *dev)
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(unsigned int)bmcr_val, (unsigned int)bmsr_val);
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/* Get real media mode here */
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if (priv->PhyID0 == MARVELL_88E1111_PHYIDR0) {
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RealMediaMode = get_MarvellPHY_media_mode (dev);
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} else if (priv->PhyID0 == CICADA_CIS8201_PHYIDR0) {
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RealMediaMode = get_CicadaPHY_media_mode (dev);
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} else {
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switch (priv->PhyID0) {
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case MARVELL_88E1111_PHYIDR0:
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RealMediaMode = get_MarvellPHY_media_mode(dev);
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break;
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case CICADA_CIS8201_PHYIDR0:
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RealMediaMode = get_CicadaPHY_media_mode(dev);
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break;
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default:
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RealMediaMode = MEDIA_1000FULL;
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break;
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}
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priv->LinkState = INS_LINK_UP;
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@ -63,10 +63,8 @@ struct ax88180_private {
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/* Max Rx Jumbo size is 15K Bytes */
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#define MAX_RX_SIZE 0x3C00
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#define MARVELL_88E1111_PHYADDR 0x18
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#define MARVELL_88E1111_PHYIDR0 0x0141
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#define CICADA_CIS8201_PHYADDR 0x01
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#define CICADA_CIS8201_PHYIDR0 0x000F
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#define MEDIA_AUTO 0
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