arm: mvebu: theadorable: Add PEX-switch detection and reset code
Sometimes the PCIe link for the PEX-switch will not come-up. In this case, the board is not in a usable state. This patch makes sure that in this case a soft-reset is issued. If this soft-reset does not result in the PEX-switch being detected after some soft-reset cycles, an I2C message is sent to the uC to issue a complete power-cycle of the board. Signed-off-by: Stefan Roese <sr@denx.de>utp
parent
8ac71da94d
commit
169a855017
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@ -5,10 +5,13 @@
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*/
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*/
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#include <common.h>
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#include <common.h>
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#include <i2c.h>
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#include <pci.h>
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#include <asm/gpio.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#include <asm/arch/soc.h>
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#include <linux/crc8.h>
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#include <linux/mbus.h>
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#include <linux/mbus.h>
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#ifdef CONFIG_NET
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#ifdef CONFIG_NET
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#include <netdev.h>
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#include <netdev.h>
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@ -35,6 +38,12 @@ DECLARE_GLOBAL_DATA_PTR;
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#define GPIO_USB0_PWR_ON 18
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#define GPIO_USB0_PWR_ON 18
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#define GPIO_USB1_PWR_ON 19
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#define GPIO_USB1_PWR_ON 19
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#define PEX_SWITCH_NOT_FOUNT_LIMIT 3
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#define STM_I2C_BUS 1
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#define STM_I2C_ADDR 0x27
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#define REBOOT_DELAY 1000 /* reboot-delay in ms */
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/* DDR3 static configuration */
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/* DDR3 static configuration */
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static MV_DRAM_MC_INIT ddr3_theadorable[MV_MAX_DDR3_STATIC_SIZE] = {
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static MV_DRAM_MC_INIT ddr3_theadorable[MV_MAX_DDR3_STATIC_SIZE] = {
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{0x00001400, 0x7301ca28}, /* DDR SDRAM Configuration Register */
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{0x00001400, 0x7301ca28}, /* DDR SDRAM Configuration Register */
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@ -214,3 +223,63 @@ int board_video_init(void)
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return mvebu_lcd_register_init(&lcd_info);
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return mvebu_lcd_register_init(&lcd_info);
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}
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}
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#ifdef CONFIG_BOARD_LATE_INIT
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int board_late_init(void)
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{
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pci_dev_t bdf;
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ulong bootcount;
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/*
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* Check if the PEX switch is detected (somtimes its not available
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* on the PCIe bus). In this case, try to recover by issuing a
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* soft-reset or even a power-cycle, depending on the bootcounter
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* value.
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*/
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bdf = pci_find_device(PCI_VENDOR_ID_PLX, 0x8619, 0);
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if (bdf == -1) {
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u8 i2c_buf[8];
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int ret;
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/* PEX switch not found! */
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bootcount = bootcount_load();
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printf("Failed to find PLX PEX-switch (bootcount=%ld)\n",
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bootcount);
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if (bootcount > PEX_SWITCH_NOT_FOUNT_LIMIT) {
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printf("Issuing power-switch via uC!\n");
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printf("Issuing power-switch via uC!\n");
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i2c_set_bus_num(STM_I2C_BUS);
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i2c_buf[0] = STM_I2C_ADDR << 1;
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i2c_buf[1] = 0xc5; /* cmd */
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i2c_buf[2] = 0x01; /* enable */
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/* Delay before reboot */
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i2c_buf[3] = REBOOT_DELAY & 0x00ff;
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i2c_buf[4] = (REBOOT_DELAY & 0xff00) >> 8;
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/* Delay before shutdown */
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i2c_buf[5] = 0x00;
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i2c_buf[6] = 0x00;
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i2c_buf[7] = crc8(0x72, &i2c_buf[0], 7);
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ret = i2c_write(STM_I2C_ADDR, 0, 0, &i2c_buf[1], 7);
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if (ret) {
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printf("I2C write error (ret=%d)\n", ret);
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printf("Issuing soft-reset...\n");
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/* default handling: SOFT reset */
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do_reset(NULL, 0, 0, NULL);
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}
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/* Wait for power-cycle to occur... */
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printf("Waiting for power-cycle via uC...\n");
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while (1)
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;
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} else {
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printf("Issuing soft-reset...\n");
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/* default handling: SOFT reset */
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do_reset(NULL, 0, 0, NULL);
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}
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}
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return 0;
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}
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#endif
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@ -104,6 +104,7 @@
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#define CONFIG_PCI
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#define CONFIG_PCI
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#define CONFIG_PCI_MVEBU
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#define CONFIG_PCI_MVEBU
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#define CONFIG_PCI_PNP
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#define CONFIG_PCI_PNP
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#define CONFIG_BOARD_LATE_INIT /* for PEX switch test */
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#endif
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#endif
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#endif
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#endif
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