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sf: Make IO modes at last in read modes

SLOW, FAST, DUAL, DUAL_IO, QUAD, QUAD_IO changed order to
SLOW, FAST, DUAL, QUAD, DUAL_IO, QUAD_IO

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
utp
Jagan Teki 2015-12-28 22:08:40 +05:30
parent 465c00d78e
commit 1c17f5ec57
3 changed files with 4 additions and 4 deletions

View File

@ -25,8 +25,8 @@ enum spi_read_cmds {
ARRAY_SLOW = BIT(0),
ARRAY_FAST = BIT(1),
DUAL_OUTPUT_FAST = BIT(2),
DUAL_IO_FAST = BIT(3),
QUAD_OUTPUT_FAST = BIT(4),
QUAD_OUTPUT_FAST = BIT(3),
DUAL_IO_FAST = BIT(4),
QUAD_IO_FAST = BIT(5),
};

View File

@ -975,8 +975,8 @@ int spi_flash_scan(struct spi_flash *flash)
CMD_READ_ARRAY_SLOW,
CMD_READ_ARRAY_FAST,
CMD_READ_DUAL_OUTPUT_FAST,
CMD_READ_DUAL_IO_FAST,
CMD_READ_QUAD_OUTPUT_FAST,
CMD_READ_DUAL_IO_FAST,
CMD_READ_QUAD_IO_FAST };
/* Read the ID codes */

View File

@ -30,7 +30,7 @@
#define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */
#define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */
#define SPI_RX_DUAL BIT(2) /* receive with 2 wires */
#define SPI_RX_QUAD BIT(4) /* receive with 4 wires */
#define SPI_RX_QUAD BIT(3) /* receive with 4 wires */
/* SPI bus connection options - see enum spi_dual_flash */
#define SPI_CONN_DUAL_SHARED (1 << 0)