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jetson-tk1: Add PSCI configuration options and reserve secure code

The secure world code is relocated to the MB just below the top of 4G, we
reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is
not protected in h/w.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Tested-by: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Tom Warren <twarren@nvidia.com>
utp
Ian Campbell 2015-04-21 07:18:40 +02:00 committed by Tom Warren
parent a8f2d01967
commit 21f0fd245e
2 changed files with 7 additions and 0 deletions

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@ -6,6 +6,8 @@ choice
config TARGET_JETSON_TK1
bool "NVIDIA Tegra124 Jetson TK1 board"
select CPU_V7_HAS_NONSEC if !SPL_BUILD
select CPU_V7_HAS_VIRT if !SPL_BUILD
config TARGET_NYAN_BIG
bool "Google/NVIDIA Nyan-big Chrombook"

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@ -79,4 +79,9 @@
#include "tegra-common-usb-gadget.h"
#include "tegra-common-post.h"
#define CONFIG_ARMV7_PSCI 1
/* Reserve top 1M for secure RAM */
#define CONFIG_ARMV7_SECURE_BASE 0xfff00000
#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000
#endif /* __CONFIG_H */