redonkable
/
remarkable-uboot
1
0
Fork 0
Code Releases Activity

ARM: socfpga: convert to common timer code 

Convert socfpga to use the commmon timer code.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
utp
Rob Herring 2013-10-04 10:22:46 -05:00 committed by Tom Rini
parent b3a7f22b3e
commit 23ab7ee0ff
2 changed files with 3 additions and 74 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

72
arch/arm/cpu/armv7/socfpga/timer.c
View File

@ -8,8 +8,6 @@
#include <asm/io.h>
#include <asm/arch/timer.h>
DECLARE_GLOBAL_DATA_PTR;
static const struct socfpga_timer *timer_base = (void *)CONFIG_SYS_TIMERBASE;
/*
@ -22,73 +20,3 @@ int timer_init(void)
writel(readl(&timer_base->ctrl) | 0x3, &timer_base->ctrl);
return 0;
}
static u32 read_timer(void)
{
return readl(&timer_base->curr_val);
}
/*
* Delay x useconds
*/
void __udelay(unsigned long usec)
{
unsigned long now, last;
/*
* get the tmo value based on timer clock speed
* tmo = delay required / period of timer clock
*/
long tmo = usec * CONFIG_TIMER_CLOCK_KHZ / 1000;
last = read_timer();
while (tmo > 0) {
now = read_timer();
if (last >= now)
/* normal mode (non roll) */
tmo -= last - now;
else
/* we have overflow of the count down timer */
tmo -= TIMER_LOAD_VAL - last + now;
last = now;
}
}
/*
* Get the timer value
*/
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
/*
* Timer : get the time difference
* Unit of tick is based on the CONFIG_SYS_HZ
*/
ulong get_timer_masked(void)
{
/* current tick value */
ulong now = read_timer() / (CONFIG_TIMER_CLOCK_KHZ/CONFIG_SYS_HZ);
if (gd->arch.lastinc >= now) {
/* normal mode (non roll) */
/* move stamp forward with absolute diff ticks */
gd->arch.tbl += gd->arch.lastinc - now;
} else {
/* we have overflow of the count down timer */
gd->arch.tbl += TIMER_LOAD_VAL - gd->arch.lastinc + now;
}
gd->arch.lastinc = now;
return gd->arch.tbl;
}
/*
* Reset the timer
*/
void reset_timer(void)
{
/* capture current decrementer value time */
gd->arch.lastinc = read_timer() /
(CONFIG_TIMER_CLOCK_KHZ / CONFIG_SYS_HZ);
/* start "advancing" time stamp from 0 */
gd->arch.tbl = 0;
}

5
include/configs/socfpga_cyclone5.h
View File

@ -197,10 +197,11 @@
#define TIMER_LOAD_VAL 0xFFFFFFFF
/* Timer info */
#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
#define CONFIG_TIMER_CLOCK_KHZ 2400
#define CONFIG_SYS_TIMER_RATE 2400000
#else
#define CONFIG_TIMER_CLOCK_KHZ 25000
#define CONFIG_SYS_TIMER_RATE 25000000
#endif
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
#define CONFIG_ENV_IS_NOWHERE