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x86: irq: Convert to use DM PCI API 

Now that we have irq router's udevice passed as a parameter, it's
time to start using the DM PCI API instead of those legacy ones.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
utp
Bin Meng 2016-02-01 01:40:52 -08:00
parent b46c2088da
commit 248c4faa9f
2 changed files with 4 additions and 4 deletions
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6
arch/x86/cpu/irq.c
View File

@ -25,7 +25,7 @@ bool pirq_check_irq_routed(struct udevice *dev, int link, u8 irq)
int base = priv->link_base;
if (priv->config == PIRQ_VIA_PCI)
pirq = x86_pci_read_config8(priv->bdf, LINK_N2V(link, base));
dm_pci_read_config8(dev->parent, LINK_N2V(link, base), &pirq);
else
pirq = readb(priv->ibase + LINK_N2V(link, base));
@ -55,7 +55,7 @@ void pirq_assign_irq(struct udevice *dev, int link, u8 irq)
return;
if (priv->config == PIRQ_VIA_PCI)
x86_pci_write_config8(priv->bdf, LINK_N2V(link, base), irq);
dm_pci_write_config8(dev->parent, LINK_N2V(link, base), irq);
else
writeb(irq, priv->ibase + LINK_N2V(link, base));
}
@ -138,7 +138,7 @@ static int create_pirq_routing_table(struct udevice *dev)
* 2) memory range decoding is enabled.
* Hence we don't do any santify test here.
*/
priv->ibase = x86_pci_read_config32(priv->bdf, ibase_off);
dm_pci_read_config32(dev->parent, ibase_off, &priv->ibase);
priv->ibase &= ~0xf;
}

2
arch/x86/cpu/queensbay/irq.c
View File

@ -18,7 +18,7 @@ int queensbay_irq_router_probe(struct udevice *dev)
struct tnc_rcba *rcba;
u32 base;
base = x86_pci_read_config32(TNC_LPC, LPC_RCBA);
dm_pci_read_config32(dev->parent, LPC_RCBA, &base);
base &= ~MEM_BAR_EN;
rcba = (struct tnc_rcba *)base;