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net: eth_designware: select PHYLIB in Kconfig

Select PHYLIB in drivers/net/Kconfig. And remove CONFIG_PHYLIB
from legacy board header files.

This fixed the warnings when both ALTERA_TSE and ETH_DESIGNWARE
are selected.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reported-by: Pavel Machek <pavel@denx.de>
Acked-by: Chin Liang See <clsee@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Tested-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
utp
Thomas Chou 2015-12-07 20:53:29 +08:00 committed by Marek Vasut
parent 0780697787
commit 25af71c4bf
11 changed files with 1 additions and 13 deletions

View File

@ -88,6 +88,7 @@ config ETH_SANDBOX_RAW
config ETH_DESIGNWARE
bool "Synopsys Designware Ethernet MAC"
select PHYLIB
help
This MAC is present in SoCs from various vendors. It supports
100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to

View File

@ -22,10 +22,6 @@
DECLARE_GLOBAL_DATA_PTR;
#if !defined(CONFIG_PHYLIB)
# error "DesignWare Ether MAC requires PHYLIB - missing CONFIG_PHYLIB"
#endif
static int dw_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
{
struct eth_mac_regs *mac_p = bus->priv;

View File

@ -95,7 +95,6 @@
/*
* Ethernet PHY configuration
*/
#define CONFIG_PHYLIB
#define CONFIG_MII
#define CONFIG_PHY_GIGE

View File

@ -75,7 +75,6 @@
#define CONFIG_DW_ALTDESCRIPTOR
#define CONFIG_CMD_MII
#define CONFIG_MII
#define CONFIG_PHYLIB
/* i2c Settings */
#define CONFIG_SYS_I2C

View File

@ -45,7 +45,6 @@
/* 10/100M Ethernet support */
#define CONFIG_DESIGNWARE_ETH
#define CONFIG_DW_ALTDESCRIPTOR
#define CONFIG_PHYLIB
/* Environment configuration */
#define CONFIG_ENV_SECT_SIZE 0x1000

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@ -109,7 +109,6 @@
#define CONFIG_DW_ALTDESCRIPTOR
#define CONFIG_MII
#define CONFIG_AUTONEG_TIMEOUT (15 * CONFIG_SYS_HZ)
#define CONFIG_PHYLIB
#define CONFIG_PHY_GIGE
#endif

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@ -17,7 +17,6 @@
/* Ethernet driver configuration */
#define CONFIG_MII
#define CONFIG_PHYLIB
#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */

View File

@ -53,7 +53,6 @@
/* GMAC related configs */
#define CONFIG_MII
#define CONFIG_PHYLIB
#define CONFIG_DW_ALTDESCRIPTOR
#define CONFIG_PHY_MICREL

View File

@ -313,7 +313,6 @@ extern int soft_i2c_gpio_scl;
#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
#define CONFIG_PHY_ADDR 1
#define CONFIG_MII /* MII PHY management */
#define CONFIG_PHYLIB
#endif
#ifdef CONFIG_USB_EHCI_HCD

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@ -42,7 +42,6 @@
/*
* Ethernet PHY configuration
*/
#define CONFIG_PHYLIB
#define CONFIG_PHY_GIGE
/*

View File

@ -77,7 +77,6 @@
/* Ethernet config options */
#define CONFIG_MII
#define CONFIG_PHYLIB
#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */