Orion5x: Correct DRAM bank detection
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@ -38,7 +38,7 @@ u32 orion5x_sdram_bar(enum memory_bank bank)
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{
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struct orion5x_ddr_addr_decode_registers *winregs =
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(struct orion5x_ddr_addr_decode_registers *)
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ORION5X_CPU_WIN_BASE;
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ORION5X_DRAM_BASE;
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u32 result = 0;
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u32 enable = 0x01 & winregs[bank].size;
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@ -42,6 +42,7 @@
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#define ORION5X_REGISTER(x) (ORION5X_REGS_PHY_BASE + x)
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/* Documented registers */
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#define ORION5X_DRAM_BASE (ORION5X_REGISTER(0x01500))
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#define ORION5X_TWSI_BASE (ORION5X_REGISTER(0x11000))
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#define ORION5X_UART0_BASE (ORION5X_REGISTER(0x12000))
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#define ORION5X_UART1_BASE (ORION5X_REGISTER(0x12100))
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