Add hack to launch USB serial download mode on magic key press
Martin T. H. Sandsmark
parent
57496e7eed
commit
32b32132d2
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@ -56,6 +56,22 @@ DECLARE_GLOBAL_DATA_PTR;
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#define ETH_PHY_POWER IMX_GPIO_NR(4, 21)
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/*
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* For handling the keypad
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*/
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#define KPP_KPCR 0x20B8000
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#define KPP_KPSR 0x20B8002
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#define KPP_KDDR 0x20B8004
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#define KPP_KPDR 0x20B8006
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#define KBD_STAT_KPKD (0x1 << 0) /* Key Press Interrupt Status bit (w1c) */
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#define KBD_STAT_KPKR (0x1 << 1) /* Key Release Interrupt Status bit (w1c) */
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#define KBD_STAT_KDSC (0x1 << 2) /* Key Depress Synch Chain Status bit (w1c)*/
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#define KBD_STAT_KRSS (0x1 << 3) /* Key Release Synch Status bit (w1c)*/
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#define KBD_STAT_KDIE (0x1 << 8) /* Key Depress Interrupt Enable Status bit */
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#define KBD_STAT_KRIE (0x1 << 9) /* Key Release Interrupt Enable */
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#define KBD_STAT_KPPEN (0x1 << 10) /* Keypad Clock Enable */
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
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@ -118,6 +134,13 @@ static iomux_v3_cfg_t const fec_pads[] = {
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MX6_PAD_FEC_TX_CLK__GPIO_4_21 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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static iomux_v3_cfg_t const key_pads[] = {
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MX6_PAD_KEY_ROW0__KEY_ROW0 | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6_PAD_KEY_COL0__KEY_COL0 | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6_PAD_KEY_COL1__KEY_COL1 | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6_PAD_KEY_COL2__KEY_COL2 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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static void setup_iomux_uart(void)
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{
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imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
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@ -356,11 +379,115 @@ int board_early_init_f(void)
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return 0;
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}
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/*
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* Sets up the keypad and then checks for a magic key combo
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*/
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static int check_keypress(void)
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{
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unsigned short reg_val;
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int col;
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/* Array of pressed keys */
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int pressed[3] = { 0 };
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/* Masks for enabled rows/cols */
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unsigned short rows_en_mask = 0x1;
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unsigned short cols_en_mask = 0x7;
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/* Set up pins */
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imx_iomux_v3_setup_multiple_pads(key_pads, ARRAY_SIZE(key_pads));
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/* Initialize keypad */
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/*
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* Include enabled rows in interrupt generation (KPCR[7:0])
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* Configure keypad columns as open-drain (KPCR[15:8])
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*/
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reg_val = readw(KPP_KPCR);
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reg_val |= rows_en_mask & 0xff; /* rows */
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reg_val |= (cols_en_mask & 0xff) << 8; /* cols */
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writew(reg_val, KPP_KPCR);
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/* Write 0's to KPDR[15:8] (Colums) */
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reg_val = readw(KPP_KPDR);
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reg_val &= 0x00ff;
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writew(reg_val, KPP_KPDR);
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/* Configure columns as output, rows as input (KDDR[15:0]) */
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writew(0xff00, KPP_KDDR);
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/*
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* Clear Key Depress and Key Release status bit.
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* Clear both synchronizer chain.
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*/
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reg_val = readw(KPP_KPSR);
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reg_val |= KBD_STAT_KPKR | KBD_STAT_KPKD |
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KBD_STAT_KDSC | KBD_STAT_KRSS;
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writew(reg_val, KPP_KPSR);
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/* Enable KDI and disable KRI (avoid false release events). */
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reg_val |= KBD_STAT_KDIE;
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reg_val &= ~KBD_STAT_KRIE;
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writew(reg_val, KPP_KPSR);
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for (col = 0; col < 3; col++) {
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/*
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* Discharge keypad capacitance:
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* 2. write 1s on column data.
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* 3. configure columns as totem-pole to discharge capacitance.
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* 4. configure columns as open-drain.
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*/
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reg_val = readw(KPP_KPDR);
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reg_val |= 0xff00;
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writew(reg_val, KPP_KPDR);
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reg_val = readw(KPP_KPCR);
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reg_val &= ~((cols_en_mask & 0xff) << 8);
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writew(reg_val, KPP_KPCR);
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udelay(2);
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reg_val = readw(KPP_KPCR);
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reg_val |= (cols_en_mask & 0xff) << 8;
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writew(reg_val, KPP_KPCR);
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/*
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* 5. Write a single column to 0, others to 1.
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* 6. Sample row inputs and save data.
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* 7. Repeat steps 2 - 6 for remaining columns.
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*/
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reg_val = readw(KPP_KPDR);
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reg_val &= ~(1 << (8 + col));
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writew(reg_val, KPP_KPDR);
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reg_val = readw(KPP_KPDR);
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pressed[col] = (~reg_val) & 1;
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printf("key: %d, pressed: %d\n", col, pressed[col]);
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}
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/* Check for magic key sequence */
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if (pressed[0] == 0 && pressed[1] == 1 && pressed[2] == 0) {
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return 1;
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} else {
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return 0;
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}
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}
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/* For jumping to USB serial download mode */
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typedef void hab_rvt_failsafe_t(void);
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#define HAB_RVT_FAILSAFE (*(uint32_t *) 0x000000BC)
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#define hab_rvt_failsafe ((hab_rvt_failsafe_t *) HAB_RVT_FAILSAFE)
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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if (check_keypress()) {
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printf("Magic key press detected, launching USB download mode\n");
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hab_rvt_failsafe(); /* This never returns, hopefully */
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}
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#ifdef CONFIG_SYS_I2C_MXC
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setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
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#endif
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