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* Patches by Robert Schwebel, 06 Mar 2003: 

- fix bug in BOOTP code (must use NetCopyIP)
  - update of CSB226 port
  - clear BSS segment on XScale
  - added support for i2c_init_board() function
  - update to the Innokom plattform

* Extend support for redundand environments for configurations where
  environment size < sector size
utp
wdenk 2003-03-06 13:39:27 +00:00
parent db2f721ffc
commit 47cd00fa70
30 changed files with 719 additions and 264 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
CHANGELOG
View File

@ -2,6 +2,16 @@
Changes since U-Boot 0.2.2:
======================================================================
* Patches by Robert Schwebel, 06 Mar 2003:
- fix bug in BOOTP code (must use NetCopyIP)
- update of CSB226 port
- clear BSS segment on XScale
- added support for i2c_init_board() function
- update to the Innokom plattform
* Extend support for redundand environments for configurations where
environment size < sector size
* Patch by Rune Torgersen, 13 Feb 2003:
Add support for Motorola MPC8266ADS board

13
README
View File

@ -897,6 +897,17 @@ The following options need to be configured:
controls the rate of data transfer. The data rate thus
is 1 / (I2C_DELAY * 4).
CFG_I2C_INIT_BOARD
When a board is reset during an i2c bus transfer
chips might think that the current transfer is still
in progress. On some boards it is possible to access
the i2c SCLK line directly, either by using the
processor pin as a GPIO or by having a second pin
connected to the bus. If this option is defined a
custom i2c_init_board() routine in boards/xxx/board.c
is run early in the boot sequence.
- SPI Support: CONFIG_SPI
Enables SPI driver (so far only tested with
@ -1043,7 +1054,7 @@ The following options need to be configured:
If CONFIG_ENV_OVERWRITE is #defined in your config
file, the write protection for vendor parameters is
completely disabled. Anybody can change or delte
completely disabled. Anybody can change or delete
these parameters.
Alternatively, if you #define _both_ CONFIG_ETHADDR

2
board/cradle/u-boot.lds
View File

@ -47,7 +47,9 @@ SECTIONS
armboot_end_data = .;
. = ALIGN(4);
bss_start = .;
.bss : { *(.bss) }
bss_end = .;
armboot_end = .;
}

24
board/csb226/csb226.c
View File

@ -32,10 +32,30 @@
# define SHOW_BOOT_PROGRESS(arg)
#endif
/*
* Miscelaneous platform dependent initialisations
/**
* misc_init_r: - misc initialisation routines
*/
int misc_init_r(void)
{
uchar *str;
/* determine if the software update key is pressed during startup */
#if 0
/* not ported yet... */
if (GPLR0 & 0x00000800) {
printf("using bootcmd_normal (sw-update button not pressed)\n");
str = getenv("bootcmd_normal");
} else {
printf("using bootcmd_update (sw-update button pressed)\n");
str = getenv("bootcmd_update");
}
setenv("bootcmd",str);
#endif
return 0;
}
/**
* board_init: - setup some data structures

374
board/csb226/flash.c
View File

@ -45,44 +45,44 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
ulong flash_init(void)
{
int i, j;
ulong size = 0;
int i, j;
ulong size = 0;
for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
ulong flashbase = 0;
flash_info[i].flash_id =
(INTEL_MANUFACT & FLASH_VENDMASK) |
(INTEL_ID_28F128J3 & FLASH_TYPEMASK);
flash_info[i].size = FLASH_BANK_SIZE;
flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
ulong flashbase = 0;
flash_info[i].flash_id =
(INTEL_MANUFACT & FLASH_VENDMASK) |
(INTEL_ID_28F128J3 & FLASH_TYPEMASK);
flash_info[i].size = FLASH_BANK_SIZE;
flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
switch (i) {
case 0:
flashbase = PHYS_FLASH_1;
break;
default:
panic("configured to many flash banks!\n");
break;
}
case 0:
flashbase = PHYS_FLASH_1;
break;
default:
panic("configured to many flash banks!\n");
break;
}
for (j = 0; j < flash_info[i].sector_count; j++) {
flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE;
flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE;
}
size += flash_info[i].size;
}
size += flash_info[i].size;
}
/* Protect monitor and environment sectors */
flash_protect(FLAG_PROTECT_SET,
CFG_FLASH_BASE,
CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
&flash_info[0]);
flash_protect(FLAG_PROTECT_SET,
CFG_FLASH_BASE,
CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
&flash_info[0]);
flash_protect(FLAG_PROTECT_SET,
CFG_ENV_ADDR,
CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
&flash_info[0]);
flash_protect(FLAG_PROTECT_SET,
CFG_ENV_ADDR,
CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
&flash_info[0]);
return size;
return size;
}
@ -94,43 +94,43 @@ ulong flash_init(void)
void flash_print_info (flash_info_t *info)
{
int i, j;
int i, j;
for (j=0; j<CFG_MAX_FLASH_BANKS; j++) {
switch (info->flash_id & FLASH_VENDMASK) {
case (INTEL_MANUFACT & FLASH_VENDMASK):
printf("Intel: ");
break;
default:
printf("Unknown Vendor ");
break;
}
case (INTEL_MANUFACT & FLASH_VENDMASK):
printf("Intel: ");
break;
default:
printf("Unknown Vendor ");
break;
}
switch (info->flash_id & FLASH_TYPEMASK) {
case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
printf("28F128J3 (128Mbit)\n");
break;
default:
printf("Unknown Chip Type\n");
case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
printf("28F128J3 (128Mbit)\n");
break;
default:
printf("Unknown Chip Type\n");
return;
}
}
printf(" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
printf(" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
printf(" Sector Start Addresses:");
printf(" Sector Start Addresses:");
for (i = 0; i < info->sector_count; i++) {
if ((i % 5) == 0) printf ("\n ");
printf (" %08lX%s", info->start[i],
info->protect[i] ? " (RO)" : " ");
}
printf ("\n");
info++;
}
printf (" %08lX%s", info->start[i],
info->protect[i] ? " (RO)" : " ");
}
printf ("\n");
info++;
}
}
@ -139,46 +139,47 @@ void flash_print_info (flash_info_t *info)
*
*/
int flash_erase (flash_info_t *info, int s_first, int s_last)
int flash_erase(flash_info_t *info, int s_first, int s_last)
{
int flag, prot, sect;
int rc = ERR_OK;
int flag, prot, sect;
int rc = ERR_OK;
if (info->flash_id == FLASH_UNKNOWN)
return ERR_UNKNOWN_FLASH_TYPE;
if (info->flash_id == FLASH_UNKNOWN)
return ERR_UNKNOWN_FLASH_TYPE;
if ((s_first < 0) || (s_first > s_last)) {
return ERR_INVAL;
}
if ((s_first < 0) || (s_first > s_last)) {
return ERR_INVAL;
}
if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK))
return ERR_UNKNOWN_FLASH_VENDOR;
prot = 0;
for (sect=s_first; sect<=s_last; ++sect) {
return ERR_UNKNOWN_FLASH_VENDOR;
prot = 0;
for (sect=s_first; sect<=s_last; ++sect) {
if (info->protect[sect]) prot++;
}
if (prot) return ERR_PROTECTED;
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
flag = disable_interrupts();
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
/* Start erase on unprotected sectors */
for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
flag = disable_interrupts();
printf("Erasing sector %2d ... ", sect);
/* Start erase on unprotected sectors */
for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
/* arm simple, non interrupt dependent timer */
reset_timer_masked();
printf("Erasing sector %2d ... ", sect);
if (info->protect[sect] == 0) { /* not protected */
/* arm simple, non interrupt dependent timer */
reset_timer_masked();
if (info->protect[sect] == 0) { /* not protected */
u32 * volatile addr = (u32 * volatile)(info->start[sect]);
/* erase sector: */
@ -190,32 +191,32 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
*addr = 0x00D000D0; /* erase confirm */
while ((*addr & 0x00800080) != 0x00800080) {
if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
*addr = 0x00B000B0; /* suspend erase*/
*addr = 0x00FF00FF; /* read mode */
rc = ERR_TIMOUT;
goto outahere;
}
}
rc = ERR_TIMOUT;
goto outahere;
}
}
*addr = 0x00500050; /* clear status register cmd. */
*addr = 0x00FF00FF; /* resest to read mode */
}
}
printf("ok.\n");
}
printf("ok.\n");
}
if (ctrlc()) printf("User Interrupt!\n");
outahere:
outahere:
/* allow flash to settle - wait 10 ms */
udelay_masked(10000);
/* allow flash to settle - wait 10 ms */
udelay_masked(10000);
if (flag) enable_interrupts();
return rc;
return rc;
}
@ -230,71 +231,71 @@ outahere:
static int write_word (flash_info_t *info, ulong dest, ushort data)
{
ushort *addr = (ushort *)dest, val;
int rc = ERR_OK;
int flag;
u32 * volatile addr = (u32 * volatile)dest, val;
int rc = ERR_OK;
int flag;
/* Check if Flash is (sufficiently) erased */
if ((*addr & data) != data) return ERR_NOT_ERASED;
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
flag = disable_interrupts();
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
flag = disable_interrupts();
/* clear status register command */
*addr = 0x50;
/* clear status register command */
*addr = 0x50;
/* program set-up command */
*addr = 0x40;
/* program set-up command */
*addr = 0x40;
/* latch address/data */
*addr = data;
/* latch address/data */
*addr = data;
/* arm simple, non interrupt dependent timer */
reset_timer_masked();
/* arm simple, non interrupt dependent timer */
reset_timer_masked();
/* wait while polling the status register */
/* wait while polling the status register */
while(((val = *addr) & 0x80) != 0x80) {
if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
rc = ERR_TIMOUT;
if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
rc = ERR_TIMOUT;
*addr = 0xB0; /* suspend program command */
goto outahere;
goto outahere;
}
}
}
if(val & 0x1A) { /* check for error */
printf("\nFlash write error %02x at address %08lx\n",
(int)val, (unsigned long)dest);
if(val & (1<<3)) {
printf("Voltage range error.\n");
rc = ERR_PROG_ERROR;
goto outahere;
}
if(val & (1<<1)) {
printf("Device protect error.\n");
rc = ERR_PROTECTED;
goto outahere;
}
if(val & (1<<4)) {
printf("Programming error.\n");
rc = ERR_PROG_ERROR;
goto outahere;
}
rc = ERR_PROG_ERROR;
goto outahere;
}
if(val & 0x1A) { /* check for error */
printf("\nFlash write error %02x at address %08lx\n",
(int)val, (unsigned long)dest);
if(val & (1<<3)) {
printf("Voltage range error.\n");
rc = ERR_PROG_ERROR;
goto outahere;
}
if(val & (1<<1)) {
printf("Device protect error.\n");
rc = ERR_PROTECTED;
goto outahere;
}
if(val & (1<<4)) {
printf("Programming error.\n");
rc = ERR_PROG_ERROR;
goto outahere;
}
rc = ERR_PROG_ERROR;
goto outahere;
}
outahere:
outahere:
*addr = 0xFF; /* read array command */
if (flag) enable_interrupts();
return rc;
return rc;
}
@ -311,63 +312,64 @@ outahere:
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
{
ulong cp, wp;
ushort data;
int l;
int i, rc;
ulong cp, wp;
ushort data;
int l;
int i, rc;
wp = (addr & ~1); /* get lower word aligned address */
wp = (addr & ~1); /* get lower word aligned address */
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
data = 0;
for (i=0, cp=wp; i<l; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 8);
}
for (; i<2 && cnt>0; ++i) {
data = (data >> 8) | (*src++ << 8);
--cnt;
++cp;
}
for (; cnt==0 && i<2; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 8);
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
data = 0;
for (i=0, cp=wp; i<l; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 8);
}
for (; i<2 && cnt>0; ++i) {
data = (data >> 8) | (*src++ << 8);
--cnt;
++cp;
}
for (; cnt==0 && i<2; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 8);
}
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
}
wp += 2;
}
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
/*
* handle word aligned part
*/
while (cnt >= 2) {
/* data = *((vushort*)src); */
data = *((ushort*)src);
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
}
src += 2;
wp += 2;
cnt -= 2;
}
wp += 2;
}
/*
* handle word aligned part
*/
while (cnt >= 2) {
/* data = *((vushort*)src); */
data = *((ushort*)src);
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
}
src += 2;
wp += 2;
cnt -= 2;
}
if (cnt == 0) return ERR_OK;
/*
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
data = (data >> 8) | (*src++ << 8);
--cnt;
}
for (; i<2; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 8);
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
data = (data >> 8) | (*src++ << 8);
--cnt;
}
for (; i<2; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 8);
}
return write_word(info, wp, data);
return write_word(info, wp, data);
}

32
board/csb226/memsetup.S
View File

@ -313,17 +313,23 @@ mem_init:
/* documented in SDRAM data sheets. The address(es) used */
/* for this purpose must not be cacheable. */
ldr r3, =CFG_DRAM_BASE
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
/* There should 9 writes, since the first write doesn't */
/* trigger a refresh cycle on PXA250. See Intel PXA250 and */
/* PXA210 Processors Specification Update, */
/* Jan 2003, Errata #116, page 30. */
ldr r3, =CFG_DRAM_BASE
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
/* Step 4g: Write MDCNFG with enable bits asserted */
/* (MDCNFG:DEx set to 1). */
@ -339,7 +345,6 @@ mem_init:
/* We are finished with Intel's memory controller initialisation */
/* ---------------------------------------------------------------- */
/* Disable (mask) all interrupts at interrupt controller */
/* ---------------------------------------------------------------- */
@ -378,10 +383,11 @@ initclks:
str r2, [r1]
/* enable the 32Khz oscillator for RTC and PowerManager */
/*
ldr r1, =OSCC
mov r2, #OSCC_OON
str r2, [r1]
*/
/* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
/* has settled. */
60:
@ -404,8 +410,7 @@ initclks:
/* FIXME */
#define NODEBUG
#ifdef NODEBUG
#ifndef DEBUG
/*Disable software and data breakpoints */
mov r0,#0
mcr p15,0,r0,c14,c8,0 /* ibcr0 */
@ -415,7 +420,6 @@ initclks:
/*Enable all debug functionality */
mov r0,#0x80000000
mcr p14,0,r0,c10,c0,0 /* dcsr */
#endif
/* ---------------------------------------------------------------- */

2
board/csb226/u-boot.lds
View File

@ -47,7 +47,9 @@ SECTIONS
armboot_end_data = .;
. = ALIGN(4);
bss_start = .;
.bss : { *(.bss) }
bss_end = .;
armboot_end = .;
}

258
board/innokom/flash.c
View File

@ -31,12 +31,228 @@
#include <common.h>
#include <asm/arch/pxa-regs.h>
#define FLASH_BANK_SIZE 0x02000000
#define MAIN_SECT_SIZE 0x40000 /* 2x16 = 256k per sector */
#if defined CFG_JFFS_CUSTOM_PART
#include <jffs2/jffs2.h>
#endif
/* Debugging macros ------------------------------------------------------ */
#undef FLASH_DEBUG
//#define FLASH_DEBUG 1
/* Some debug macros */
#if (FLASH_DEBUG > 2 )
#define PRINTK3(args...) printf(args)
#else
#define PRINTK3(args...)
#endif
#if FLASH_DEBUG > 1
#define PRINTK2(args...) printf(args)
#else
#define PRINTK2(args...)
#endif
#ifdef FLASH_DEBUG
#define PRINTK(args...) printf(args)
#else
#define PRINTK(args...)
#endif
/* ------------------------------------------------------------------------ */
/* Development system: we have only 16 MB Flash */
#ifdef CONFIG_MTD_INNOKOM_16MB
#define FLASH_BANK_SIZE 0x01000000 /* 16 MB (during development) */
#define MAIN_SECT_SIZE 0x00020000 /* 128k per sector */
#endif
/* Production system: we have 64 MB Flash */
#ifdef CONFIG_MTD_INNOKOM_64MB
#define FLASH_BANK_SIZE 0x04000000 /* 64 MB */
#define MAIN_SECT_SIZE 0x00020000 /* 128k per sector */
#endif
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
#if defined CFG_JFFS_CUSTOM_PART
/**
* jffs2_part_info - get information about a JFFS2 partition
*
* @part_num: number of the partition you want to get info about
* @return: struct part_info* in case of success, 0 if failure
*/
static struct part_info part;
#ifdef CONFIG_MTD_INNOKOM_16MB
#ifdef CONFIG_MTD_INNOKOM_64MB
#error Please define only one CONFIG_MTD_INNOKOM_XXMB option.
#endif
struct part_info* jffs2_part_info(int part_num) {
PRINTK2("jffs2_part_info: part_num=%i\n",part_num);
/* u-boot partition */
if(part_num==0){
if(part.usr_priv==(void*)1) return &part;
memset(&part, 0, sizeof(part));
part.offset=(char*)0x00000000;
part.size=256*1024;
/* Mark the struct as ready */
part.usr_priv=(void*)1;
PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
return &part;
}
/* primary OS+firmware partition */
if(part_num==1){
if(part.usr_priv==(void*)1) return &part;
memset(&part, 0, sizeof(part));
part.offset=(char*)0x00040000;
part.size=768*1024;
/* Mark the struct as ready */
part.usr_priv=(void*)1;
PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
return &part;
}
/* secondary OS+firmware partition */
if(part_num==2){
if(part.usr_priv==(void*)1) return &part;
memset(&part, 0, sizeof(part));
part.offset=(char*)0x00100000;
part.size=8*1024*1024;
/* Mark the struct as ready */
part.usr_priv=(void*)1;
PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
return &part;
}
/* data partition */
if(part_num==3){
if(part.usr_priv==(void*)1) return &part;
memset(&part, 0, sizeof(part));
part.offset=(char*)0x00900000;
part.size=7*1024*1024;
/* Mark the struct as ready */
part.usr_priv=(void*)1;
PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
return &part;
}
PRINTK("jffs2_part_info: end of partition table\n");
return 0;
}
#endif /* CONFIG_MTD_INNOKOM_16MB */
#ifdef CONFIG_MTD_INNOKOM_64MB
#ifdef CONFIG_MTD_INNOKOM_16MB
#error Please define only one CONFIG_MTD_INNOKOM_XXMB option.
#endif
struct part_info* jffs2_part_info(int part_num) {
PRINTK2("jffs2_part_info: part_num=%i\n",part_num);
/* u-boot partition */
if(part_num==0){
if(part.usr_priv==(void*)1) return &part;
memset(&part, 0, sizeof(part));
part.offset=(char*)0x00000000;
part.size=256*1024;
/* Mark the struct as ready */
part.usr_priv=(void*)1;
PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
return &part;
}
/* primary OS+firmware partition */
if(part_num==1){
if(part.usr_priv==(void*)1) return &part;
memset(&part, 0, sizeof(part));
part.offset=(char*)0x00040000;
part.size=16*1024*1024-128*1024;
/* Mark the struct as ready */
part.usr_priv=(void*)1;
PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
return &part;
}
/* secondary OS+firmware partition */
if(part_num==2){
if(part.usr_priv==(void*)1) return &part;
memset(&part, 0, sizeof(part));
part.offset=(char*)0x01020000;
part.size=16*1024*1024-128*1024;
/* Mark the struct as ready */
part.usr_priv=(void*)1;
PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
return &part;
}
/* data partition */
if(part_num==3){
if(part.usr_priv==(void*)1) return &part;
memset(&part, 0, sizeof(part));
part.offset=(char*)0x02000000;
part.size=32*1024*1024;
/* Mark the struct as ready */
part.usr_priv=(void*)1;
PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset);
PRINTK("part.size = 0x%08x\n",(unsigned int)part.size);
return &part;
}
PRINTK("jffs2_part_info: end of partition table\n");
return 0;
}
#endif /* CONFIG_MTD_INNOKOM_64MB */
#endif /* defined CFG_JFFS_CUSTOM_PART */
/**
* flash_init: - initialize data structures for flash chips
*
@ -71,10 +287,10 @@ ulong flash_init(void)
size += flash_info[i].size;
}
/* Protect monitor and environment sectors */
/* Protect u-boot sectors */
flash_protect(FLAG_PROTECT_SET,
CFG_FLASH_BASE,
CFG_FLASH_BASE + _armboot_end_data - _armboot_start,
CFG_FLASH_BASE + (256*1024) - 1,
&flash_info[0]);
#ifdef CFG_ENV_IS_IN_FLASH
@ -178,32 +394,38 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
printf("Erasing sector %2d ... ", sect);
PRINTK("\n");
/* arm simple, non interrupt dependent timer */
reset_timer_masked();
if (info->protect[sect] == 0) { /* not protected */
u32 * volatile addr = (u32 * volatile)(info->start[sect]);
u16 * volatile addr = (u16 * volatile)(info->start[sect]);
/* erase sector: */
/* The strata flashs are aligned side by side on */
/* the data bus, so we have to write the commands */
/* to both chips here: */
PRINTK("unlocking sector\n");
*addr = 0x0060;
*addr = 0x00d0;
*addr = 0x00ff;
*addr = 0x00200020; /* erase setup */
*addr = 0x00D000D0; /* erase confirm */
PRINTK("erasing sector\n");
*addr = 0x0020;
PRINTK("confirming erase\n");
*addr = 0x00D0;
while ((*addr & 0x00800080) != 0x00800080) {
while ((*addr & 0x0080) != 0x0080) {
PRINTK(".");
if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
*addr = 0x00B000B0; /* suspend erase*/
*addr = 0x00FF00FF; /* read mode */
*addr = 0x00B0; /* suspend erase*/
*addr = 0x00FF; /* read mode */
rc = ERR_TIMOUT;
goto outahere;
}
}
*addr = 0x00500050; /* clear status register cmd. */
*addr = 0x00FF00FF; /* resest to read mode */
PRINTK("clearing status register\n");
*addr = 0x0050;
PRINTK("resetting to read mode");
*addr = 0x00FF;
}
printf("ok.\n");
@ -233,7 +455,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
static int write_word (flash_info_t *info, ulong dest, ushort data)
{
ushort *addr = (ushort *)dest, val;
volatile u16 *addr = (u16 *)dest, val;
int rc = ERR_OK;
int flag;

50
board/innokom/innokom.c
View File

@ -25,6 +25,7 @@
#include <common.h>
#include <asm/arch/pxa-regs.h>
#include <asm/mach-types.h>
#ifdef CONFIG_SHOW_BOOT_PROGRESS
# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
@ -32,9 +33,52 @@
# define SHOW_BOOT_PROGRESS(arg)
#endif
/*
* Miscelaneous platform dependent initialisations
/**
* i2c_init_board - reset i2c bus. When the board is powercycled during a
* bus transfer it might hang; for details see doc/I2C_Edge_Conditions.
* The Innokom board has GPIO70 connected to SCLK which can be toggled
* until all chips think that their current cycles are finished.
*/
int i2c_init_board(void)
{
int i;
/* set gpio pin to output */
GPDR(70) |= GPIO_bit(70);
for (i = 0; i < 11; i++) {
GPCR(70) = GPIO_bit(70);
udelay(10);
GPSR(70) = GPIO_bit(70);
udelay(10);
}
/* set gpio pin to input */
GPDR(70) &= ~GPIO_bit(70);
return 0;
}
/**
* misc_init_r: - misc initialisation routines
*/
int misc_init_r(void)
{
uchar *str;
/* determine if the software update key is pressed during startup */
if (GPLR0 & 0x00000800) {
printf("using bootcmd_normal (sw-update button not pressed)\n");
str = getenv("bootcmd_normal");
} else {
printf("using bootcmd_update (sw-update button pressed)\n");
str = getenv("bootcmd_update");
}
setenv("bootcmd",str);
return 0;
}
/**
@ -51,7 +95,7 @@ int board_init (void)
/* so we do _nothing_ here */
/* arch number of Innokom board */
gd->bd->bi_arch_number = 258;
gd->bd->bi_arch_number = MACH_TYPE_INNOKOM;
/* adress of boot parameters */
gd->bd->bi_boot_params = 0xa0000100;

38
board/innokom/memsetup.S
View File

@ -38,6 +38,9 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
sub pc,pc,#4
.endm
_TEXT_BASE:
.word TEXT_BASE
/*
* Memory setup
@ -222,6 +225,12 @@ mem_init:
/* Step 2c: Write FLYCNFG FIXME: what's that??? */
/* ---------------------------------------------------------------- */
/* test if we run from flash or RAM - RAM/BDI: don't setup RAM */
adr r3, mem_init /* r0 <- current position of code */
ldr r2, =mem_init
cmp r3, r2 /* skip init if in place */
beq initirqs
/* ---------------------------------------------------------------- */
/* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
@ -313,17 +322,23 @@ mem_init:
/* documented in SDRAM data sheets. The address(es) used */
/* for this purpose must not be cacheable. */
ldr r3, =CFG_DRAM_BASE
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
/* There should 9 writes, since the first write doesn't */
/* trigger a refresh cycle on PXA250. See Intel PXA250 and */
/* PXA210 Processors Specification Update, */
/* Jan 2003, Errata #116, page 30. */
ldr r3, =CFG_DRAM_BASE
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
/* Step 4g: Write MDCNFG with enable bits asserted */
/* (MDCNFG:DEx set to 1). */
@ -339,7 +354,6 @@ mem_init:
/* We are finished with Intel's memory controller initialisation */
/* ---------------------------------------------------------------- */
/* Disable (mask) all interrupts at interrupt controller */
/* ---------------------------------------------------------------- */
@ -405,8 +419,7 @@ initclks:
/* FIXME */
#define NODEBUG
#ifdef NODEBUG
#ifndef DEBUG
/*Disable software and data breakpoints */
mov r0,#0
mcr p15,0,r0,c14,c8,0 /* ibcr0 */
@ -416,7 +429,6 @@ initclks:
/*Enable all debug functionality */
mov r0,#0x80000000
mcr p14,0,r0,c10,c0,0 /* dcsr */
#endif
/* ---------------------------------------------------------------- */

2
board/innokom/u-boot.lds
View File

@ -47,7 +47,9 @@ SECTIONS
armboot_end_data = .;
. = ALIGN(4);
bss_start = .;
.bss : { *(.bss) }
bss_end = .;
armboot_end = .;
}

2
board/lubbock/u-boot.lds
View File

@ -47,7 +47,9 @@ SECTIONS
armboot_end_data = .;
. = ALIGN(4);
bss_start = .;
.bss : { *(.bss) }
bss_end = .;
armboot_end = .;
}

2
board/mpl/common/common_util.c
View File

@ -301,7 +301,7 @@ extern char *stdio_names[];
void show_stdio_dev(void)
{
/* Print informations */
/* Print information */
printf ("In: ");
if (stdio_devices[stdin] == NULL) {
printf ("No input devices available!\n");

2
board/trab/u-boot.lds
View File

@ -38,7 +38,7 @@ SECTIONS
lib_generic/crc32.o (.text)
lib_generic/string.o (.text)
. = env_offset;
. = DEFINED(env_offset) ? env_offset : .;
common/environment.o (.ppcenv)
*(.text)

2
common/console.c
View File

@ -496,7 +496,7 @@ int console_init_r (void)
}
#ifndef CFG_CONSOLE_INFO_QUIET
/* Print informations */
/* Print information */
printf ("In: ");
if (stdio_devices[stdin] == NULL) {
printf ("No input devices available!\n");

43
common/env_flash.c
View File

@ -34,6 +34,7 @@
#include <environment.h>
#include <cmd_nvedit.h>
#include <linux/stddef.h>
#include <malloc.h>
#if ((CONFIG_COMMANDS&(CFG_CMD_ENV|CFG_CMD_FLASH)) == (CFG_CMD_ENV|CFG_CMD_FLASH))
#define CMD_SAVEENV
@ -41,11 +42,6 @@
#error Cannot use CFG_ENV_ADDR_REDUND without CFG_CMD_ENV & CFG_CMD_FLASH
#endif
#if defined(CFG_ENV_SECT_SIZE) && (CFG_ENV_SECT_SIZE > CFG_ENV_SIZE) && \
defined(CFG_ENV_ADDR_REDUND)
#error CFG_ENV_ADDR_REDUND should not be used when CFG_ENV_SECT_SIZE > CFG_ENV_SIZE
#endif
#if defined(CFG_ENV_SIZE_REDUND) && (CFG_ENV_SIZE_REDUND < CFG_ENV_SIZE)
#error CFG_ENV_SIZE_REDUND should not be less then CFG_ENV_SIZE
#endif
@ -80,8 +76,9 @@ static env_t *flash_addr = (env_t *)CFG_ENV_ADDR;
#ifdef CFG_ENV_ADDR_REDUND
static env_t *flash_addr_new = (env_t *)CFG_ENV_ADDR_REDUND;
static ulong end_addr = CFG_ENV_ADDR + CFG_ENV_SIZE - 1;
static ulong end_addr_new = CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1;
/* CFG_ENV_ADDR is supposed to be on sector boundary */
static ulong end_addr = CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1;
static ulong end_addr_new = CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1;
static uchar active_flag = 1;
static uchar obsolete_flag = 0;
@ -164,6 +161,8 @@ int env_init(void)
int saveenv(void)
{
int rc = 1;
ulong up_data = 0;
char *saved_data = NULL;
debug ("Protect off %08lX ... %08lX\n",
(ulong)flash_addr, end_addr);
@ -179,6 +178,22 @@ int saveenv(void)
goto Done;
}
#if CFG_ENV_SECT_SIZE > CFG_ENV_SIZE
up_data = (end_addr_new + 1 - ((long)flash_addr_new + CFG_ENV_SIZE));
debug ("Data to save 0x%x\n", up_data);
if (up_data) {
if ((saved_data = malloc(up_data)) == NULL) {
printf("Unable to save the rest of sector (%ld)\n",
up_data);
goto Done;
}
memcpy(saved_data,
(void *)((long)flash_addr_new + CFG_ENV_SIZE), up_data);
debug ("Data (start 0x%x, len 0x%x) saved at 0x%x\n",
(long)flash_addr_new + CFG_ENV_SIZE,
up_data, saved_data);
}
#endif
puts ("Erasing Flash...");
debug (" %08lX ... %08lX ...",
(ulong)flash_addr_new, end_addr_new);
@ -212,6 +227,18 @@ int saveenv(void)
}
puts ("done\n");
#if CFG_ENV_SECT_SIZE > CFG_ENV_SIZE
if (up_data) { /* restore the rest of sector */
debug ("Restoring the rest of data to 0x%x len 0x%x\n",
(long)flash_addr_new + CFG_ENV_SIZE, up_data);
if (flash_write(saved_data,
(long)flash_addr_new + CFG_ENV_SIZE,
up_data)) {
flash_perror(rc);
goto Done;
}
}
#endif
{
env_t * etmp = flash_addr;
ulong ltmp = end_addr;
@ -226,6 +253,8 @@ int saveenv(void)
rc = 0;
Done:
if (saved_data)
free (saved_data);
/* try to re-protect */
(void) flash_sect_protect (1, (ulong)flash_addr, end_addr);
(void) flash_sect_protect (1, (ulong)flash_addr_new, end_addr_new);

9
cpu/mpc824x/drivers/i2c/i2c1.c
View File

@ -1128,6 +1128,15 @@ static void I2C_Set_Stat (unsigned int eumbbar, I2C_STAT stat)
void i2c_init (int speed, int slaveadd)
{
#ifdef CFG_I2C_INIT_BOARD
/*
* call board specific i2c bus reset routine before accessing the
* environment, which might be in a chip on that bus. For details
* about this problem see doc/I2C_Edge_Conditions.
*/
i2c_init_board();
#endif
#ifdef DEBUG
I2C_Initialize (0x7f, 0, (void *) printf);
#else

7
cpu/mpc8260/i2c.c
View File

@ -221,6 +221,13 @@ void i2c_init(int speed, int slaveadd)
volatile I2C_BD *rxbd, *txbd;
uint dpaddr;
#ifdef CFG_I2C_INIT_BOARD
/* call board specific i2c bus reset routine before accessing the */
/* environment, which might be in a chip on that bus. For details */
/* about this problem see doc/I2C_Edge_Conditions. */
i2c_init_board();
#endif
dpaddr = *((unsigned short*)(&immap->im_dprambase[PROFF_I2C_BASE]));
if (dpaddr == 0) {
/* need to allocate dual port ram */

7
cpu/mpc8xx/i2c.c
View File

@ -215,6 +215,13 @@ i2c_init(int speed, int slaveaddr)
volatile I2C_BD *rxbd, *txbd;
uint dpaddr;
#ifdef CFG_I2C_INIT_BOARD
/* call board specific i2c bus reset routine before accessing the */
/* environment, which might be in a chip on that bus. For details */
/* about this problem see doc/I2C_Edge_Conditions. */
i2c_init_board();
#endif
#ifdef CFG_I2C_UCODE_PATCH
iip = (iic_t *)&cp->cp_dpmem[iip->iic_rpbase];
#else

8
cpu/ppc4xx/i2c.c
View File

@ -85,7 +85,15 @@ void i2c_init (int speed, int slaveadd)
unsigned long freqOPB;
int val, divisor;
#ifdef CFG_I2C_INIT_BOARD
/* call board specific i2c bus reset routine before accessing the */
/* environment, which might be in a chip on that bus. For details */
/* about this problem see doc/I2C_Edge_Conditions. */
i2c_init_board();
#endif
/* Handle possible failed I2C state */
/* FIXME: put this into i2c_init_board()? */
_i2c_bus_reset ();
/* clear lo master address */

7
cpu/xscale/i2c.c
View File

@ -41,6 +41,7 @@
* - I2C_PXA_SLAVE_ADDR
*/
#include <asm/arch/hardware.h>
#include <asm/arch/pxa-regs.h>
#include <i2c.h>
@ -244,6 +245,12 @@ i2c_transfer_finish:
void i2c_init(int speed, int slaveaddr)
{
#ifdef CFG_I2C_INIT_BOARD
/* call board specific i2c bus reset routine before accessing the */
/* environment, which might be in a chip on that bus. For details */
/* about this problem see doc/I2C_Edge_Conditions. */
i2c_init_board();
#endif
}

26
cpu/xscale/start.S
View File

@ -83,6 +83,17 @@ _armboot_end_data:
_armboot_end:
.word armboot_end
/*
* This is defined in the board specific linker script
*/
.globl _bss_start
_bss_start:
.word bss_start
.globl _bss_end
_bss_end:
.word bss_end
/*
* _armboot_real_end is the first usable RAM address behind armboot
* and the various stacks
@ -143,7 +154,20 @@ copy_loop:
ldr r0, _uboot_reloc /* upper 128 KiB: relocated uboot */
sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
/* FIXME: bdinfo should be here */
sub sp, r0, #12 /* leave 3 words for abort-stack */
sub sp, r0, #12 /* leave 3 words for abort-stack */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
ldr pc, _start_armboot

2
fs/fdos/dev.c
View File

@ -149,7 +149,7 @@ int check_dev (BootSector_t *boot, Fs_t *fs)
__le16_to_cpu (boot -> TimeF));
/* informations are extracted from boot sector */
/* information is extracted from boot sector */
heads = __le16_to_cpu (boot -> nheads);
sectors = __le16_to_cpu (boot -> nsect);
fs -> tot_sectors = __le32_to_cpu (boot -> bigsect);

2
include/cmd_console.h
View File

@ -30,7 +30,7 @@
#if (CONFIG_COMMANDS & CFG_CMD_CONSOLE)
#define CMD_TBL_CONINFO MK_CMD_TBL_ENTRY( \
"coninfo", 5, 3, 1, do_coninfo, \
"coninfo - print console devices and informations\n", \
"coninfo - print console devices and information\n", \
"" \
),
int do_coninfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);

13
include/configs/csb226.h
View File

@ -55,12 +55,13 @@
/*
* select serial console configuration
*/
#define CONFIG_FFUART 1 /* we use FFUART on CSB226 */
#define CONFIG_FFUART 1 /* we use FFUART on CSB226 */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 19200
#undef CONFIG_MISC_INIT_R /* not used yet */
#define CONFIG_COMMANDS (CONFIG_CMD_DFL & ~CFG_CMD_NET)
@ -68,7 +69,7 @@
#include <cmd_confdefs.h>
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "root=/dev/nfs ip=bootp console=ttyS0,19200"
#define CONFIG_BOOTARGS "console=ttyS0,19200 ip=dhcp root=/dev/nfs, ether=0,0x08000000,eth0"
#define CONFIG_ETHADDR FF:FF:FF:FF:FF:FF
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_IPADDR 192.168.1.56
@ -76,8 +77,10 @@
#define CONFIG_BOOTCOMMAND "bootm 0x40000"
#define CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_CMDLINE_TAG 1
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
#define CONFIG_KGDB_BAUDRATE 19200 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@ -90,7 +93,7 @@
* used for the RAM copy of the uboot code
*
*/
#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
#define CFG_MALLOC_LEN (128*1024)
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "uboot> " /* Monitor Command Prompt */
@ -104,7 +107,7 @@
#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CFG_LOAD_ADDR 0xa7fe0000 /* default load address */
#define CFG_LOAD_ADDR 0xa3000000 /* default load address */
/* RS: where is this documented? */
/* RS: is this where U-Boot is */
/* RS: relocated to in RAM? */

32
include/configs/trab.h
View File

@ -117,7 +117,6 @@
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
#define CONFIG_BOOTDELAY 5
#define CONFIG_PREBOOT "echo;echo *** booting ***;echo"
#define CONFIG_BOOTARGS "console=ttyS0"
@ -126,6 +125,8 @@
#define CONFIG_HOSTNAME trab
#define CONFIG_SERVERIP 192.168.3.1
#define CONFIG_BOOTCOMMAND "run flash_nfs"
#ifndef CONFIG_BIG_FLASH
#define CONFIG_EXTRA_ENV_SETTINGS \
"nfs_args=setenv bootargs root=/dev/nfs rw " \
"nfsroot=$(serverip):$(rootpath)\0" \
@ -137,7 +138,7 @@
"load=tftp 0xC100000 /tftpboot/TRAB/u-boot.bin\0" \
"update=protect off 1:0-8;era 1:0-8;cp.b 0xc100000 0 $(filesize);" \
"setenv filesize;saveenv\0" \
"loadfile=/tftpboot/TRAB/pImage\0" \
"loadfile=/tftpboot/TRAB/uImage\0" \
"loadaddr=c400000\0" \
"net_load=tftpboot $(loadaddr) $(loadfile)\0" \
"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
@ -146,6 +147,27 @@
"mdm_init1=ATZ\0" \
"mdm_init2=ATS0=1\0" \
"mdm_flow_control=rts/cts\0"
#else /* CONFIG_BIG_FLASH */
#define CONFIG_EXTRA_ENV_SETTINGS \
"nfs_args=setenv bootargs root=/dev/nfs rw " \
"nfsroot=$(serverip):$(rootpath)\0" \
"rootpath=/opt/eldk/arm_920TDI\0" \
"ram_args=setenv bootargs root=/dev/ram rw\0" \
"add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
"add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
"load=tftp 0xC100000 /tftpboot/TRAB/u-boot.bin\0" \
"update=protect off 1:0;era 1:0;cp.b 0xc100000 0 $(filesize)\0" \
"loadfile=/tftpboot/TRAB/uImage\0" \
"loadaddr=c400000\0" \
"net_load=tftpboot $(loadaddr) $(loadfile)\0" \
"net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
"kernel_addr=00040000\0" \
"flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
"mdm_init1=ATZ\0" \
"mdm_init2=ATS0=1\0" \
"mdm_flow_control=rts/cts\0"
#endif /* CONFIG_BIG_FLASH */
#if 0 /* disabled for development */
#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
@ -215,7 +237,11 @@
/* The following #defines are needed to get flash environment right */
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#ifndef CONFIG_BIG_FLASH
#define CFG_MONITOR_LEN (256 << 10)
#else
#define CFG_MONITOR_LEN (128 << 10)
#endif
/*-----------------------------------------------------------------------
* FLASH and environment organization
@ -239,7 +265,7 @@
#define CFG_ENV_SIZE 0x4000
#define CFG_ENV_SECT_SIZE 0x4000
#else
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x40000)
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x20000)
#define CFG_ENV_SIZE 0x4000
#define CFG_ENV_SECT_SIZE 0x20000
#endif

2
include/devices.h
View File

@ -35,7 +35,7 @@
#define DEV_FLAGS_SYSTEM 0x80000000 /* Device is a system device */
#define DEV_EXT_VIDEO 0x00000001 /* Video extensions supported */
/* Device informations */
/* Device information */
typedef struct {
int flags; /* Device flags: input/output/system */
int ext; /* Supported extensions */

2
lib_arm/board.c
View File

@ -269,7 +269,7 @@ void start_armboot (void)
board_post_init ();
#endif
printf ("### vfd_type=0x%02X vfd_data_lines_inv=%d\n",gd->vfd_type,gd->vfd_inv_data);
printf ("### FB @ %08lX vfd_type=0x%02X vfd_data_lines_inv=%d\n",gd->fb_base,gd->vfd_type,gd->vfd_inv_data);
/* main_loop() can return to retry autoboot, if so just run it again. */
for (;;) {

8
net/bootp.c
View File

@ -211,7 +211,7 @@ static void BootpVendorFieldProcess(u8 *ext)
break;
case 18: /* Extension path - Not yet supported */
/*
* This can be used to send the informations of the
* This can be used to send the information of the
* vendor area in another file that the client can
* access via TFTP.
*/
@ -229,7 +229,7 @@ static void BootpVendorFieldProcess(u8 *ext)
/* Application layer fields */
case 43: /* Vendor specific info - Not yet supported */
/*
* Binary informations to exchange specific
* Binary information to exchange specific
* product information.
*/
break;
@ -752,6 +752,7 @@ void DhcpSendRequestPkt(Bootp_t *bp_offer)
volatile uchar *pkt, *iphdr;
Bootp_t *bp;
int pktlen, iplen, extlen;
IPaddr_t OfferedIP;
debug ("DhcpSendRequestPkt: Sending DHCPREQUEST\n");
pkt = NetTxPacket;
@ -784,7 +785,8 @@ void DhcpSendRequestPkt(Bootp_t *bp_offer)
/*
* Copy options from OFFER packet if present
*/
extlen = DhcpExtended(bp->bp_vend, DHCP_REQUEST, NetServerIP, bp->bp_yiaddr);
NetCopyIP(&OfferedIP, &bp->bp_yiaddr);
extlen = DhcpExtended(bp->bp_vend, DHCP_REQUEST, NetServerIP, OfferedIP);
pktlen = BOOTP_SIZE - sizeof(bp->bp_vend) + extlen;
iplen = BOOTP_HDR_SIZE - sizeof(bp->bp_vend) + extlen;

2
tools/easylogo/easylogo.c
View File

@ -264,7 +264,7 @@ int image_save_header (image_t *image, char *filename, char *varname)
if (file==NULL)
return -1 ;
/* Author informations */
/* Author information */
fprintf(file, "/*\n * Generated by EasyLogo, (C) 2000 by Paolo Scaffardi\n/*\n"); */
fprintf(file, " * To use this, include it and call: easylogo_plot(screen,&%s, width,x,y)\n *\n", varname);
fprintf(file, " * Where:\t'screen'\tis the pointer to the frame buffer\n");