spl/powerpc: introduce CONFIG_SPL_INIT_MINIMAL
cpu_init_nand.c is renamed to spl_minimal.c as it is not really NAND-specific. Signed-off-by: Scott Wood <scottwood@freescale.com> --- v2: factor out START, and change cpu_init_nand.c to spl_minimal.c Cc: Andy Fleming <afleming@freescale.com>utp
Scott Wood
parent
a179eb0a4b
commit
4b919725b6
3
README
3
README
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@ -2677,6 +2677,9 @@ FIT uImage format:
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For ARM, enable an optional function to print more information
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about the running system.
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CONFIG_SPL_INIT_MINIMAL
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Arch init code should be built for a very small image
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CONFIG_SPL_LIBCOMMON_SUPPORT
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Support for common/libcommon.o in SPL binary
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@ -28,7 +28,22 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(CPU).o
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START = start.o resetvec.o
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MINIMAL=
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ifdef CONFIG_SPL_BUILD
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ifdef CONFIG_SPL_INIT_MINIMAL
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MINIMAL=y
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endif
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endif
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START = start.o resetvec.o
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ifdef MINIMAL
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COBJS-y += cpu_init_early.o tlb.o spl_minimal.o
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else
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SOBJS-$(CONFIG_MP) += release.o
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SOBJS = $(SOBJS-y)
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@ -132,6 +147,8 @@ COBJS-y += traps.o
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# Stub implementations of cache management functions for USB
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COBJS-y += cache.o
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endif # not minimal
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COBJS = $(COBJS-y)
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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@ -44,6 +44,15 @@
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#undef MSR_KERNEL
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#define MSR_KERNEL ( MSR_ME ) /* Machine Check */
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#if defined(CONFIG_NAND_SPL) || \
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(defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL))
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#define MINIMAL_SPL
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#endif
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#if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SECURE_BOOT)
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#define NOR_BOOT
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#endif
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/*
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* Set up GOT: Global Offset Table
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*
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@ -53,7 +62,7 @@
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GOT_ENTRY(_GOT2_TABLE_)
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GOT_ENTRY(_FIXUP_TABLE_)
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#ifndef CONFIG_NAND_SPL
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#ifndef MINIMAL_SPL
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GOT_ENTRY(_start)
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GOT_ENTRY(_start_of_vectors)
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GOT_ENTRY(_end_of_vectors)
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@ -282,11 +291,8 @@ l2_disabled:
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isync
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.endm
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/*
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* Ne need to setup interrupt vector for NAND SPL
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* because NAND SPL never compiles it.
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*/
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#if !defined(CONFIG_NAND_SPL)
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/* Interrupt vectors do not fit in minimal SPL. */
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#if !defined(MINIMAL_SPL)
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/* Setup interrupt vectors */
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lis r1,CONFIG_SYS_MONITOR_BASE@h
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mtspr IVPR,r1
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@ -518,7 +524,7 @@ nexti: mflr r1 /* R1 = our PC */
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* in AS1.
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*/
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#if !defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SECURE_BOOT)
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#ifdef NOR_BOOT
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/*
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* TLB entry is created for IVPR + IVOR15 to map on valid OP code address
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* bacause flash's virtual address maps to 0xff800000 - 0xffffffff.
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@ -1032,7 +1038,7 @@ create_init_ram_area:
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lis r6,FSL_BOOKE_MAS0(1, 15, 0)@h
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ori r6,r6,FSL_BOOKE_MAS0(1, 15, 0)@l
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#if !defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SECURE_BOOT)
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#ifdef NOR_BOOT
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/* create a temp mapping in AS=1 to the 4M boot window */
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create_tlb1_entry 15, \
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1, BOOKE_PAGESZ_4M, \
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@ -1107,7 +1113,8 @@ switch_as:
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bdnz 1b
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/* Jump out the last 4K page and continue to 'normal' start */
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#ifdef CONFIG_SYS_RAMBOOT
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#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)
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/* We assume that we're already running at the address we're linked at */
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b _start_cont
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#else
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/* Calculate absolute address in FLASH and jump there */
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@ -1153,7 +1160,7 @@ _start_cont:
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/* NOTREACHED - board_init_f() does not return */
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#ifndef CONFIG_NAND_SPL
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#ifndef MINIMAL_SPL
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. = EXC_OFF_SYS_RESET
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.globl _start_of_vectors
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_start_of_vectors:
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@ -1597,7 +1604,7 @@ in32:
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in32r:
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lwbrx r3,r0,r3
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blr
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#endif /* !CONFIG_NAND_SPL */
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#endif /* !MINIMAL_SPL */
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/*------------------------------------------------------------------------------*/
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@ -1794,7 +1801,7 @@ clear_bss:
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mr r4,r10 /* Destination Address */
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bl board_init_r
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#ifndef CONFIG_NAND_SPL
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#ifndef MINIMAL_SPL
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/*
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* Copy exception vector code to low memory
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*
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@ -1967,4 +1974,4 @@ setup_ivors:
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#include "fixed_ivor.S"
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blr
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#endif /* !CONFIG_NAND_SPL */
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#endif /* !MINIMAL_SPL */
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@ -10,6 +10,20 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib8xxx.o
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MINIMAL=
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ifdef CONFIG_SPL_BUILD
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ifdef CONFIG_SPL_INIT_MINIMAL
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MINIMAL=y
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endif
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endif
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ifdef MINIMAL
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COBJS-$(CONFIG_FSL_LAW) += law.o
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else
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ifneq ($(CPU),mpc83xx)
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COBJS-y += cpu.o
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endif
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@ -20,6 +34,8 @@ COBJS-$(CONFIG_FSL_LBC) += fsl_lbc.o
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COBJS-$(CONFIG_SYS_SRIO) += srio.o
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COBJS-$(CONFIG_FSL_LAW) += law.o
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endif
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SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
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@ -38,8 +38,21 @@ endif
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LIB = $(obj)lib$(ARCH).o
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SOBJS-y += ppccache.o
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MINIMAL=
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ifdef CONFIG_SPL_BUILD
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ifdef CONFIG_SPL_INIT_MINIMAL
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MINIMAL=y
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endif
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endif
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ifdef MINIMAL
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COBJS-y += cache.o
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else
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SOBJS-y += ppcstring.o
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SOBJS-y += ppccache.o
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SOBJS-y += ticks.o
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SOBJS-y += reloc.o
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@ -64,6 +77,8 @@ $(obj)ppcstring.o: AFLAGS += -Dmemcpy=__memcpy
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COBJS-y += memcpy_mpc5200.o
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endif
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endif # not minimal
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COBJS += $(sort $(COBJS-y))
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SRCS := $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \
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