drivers: net: cpsw: convert driver to adopt device driver model
adopt cpsw driver to device driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>utp
Mugunthan V N
Tom Rini
parent
bcd5eedf8f
commit
4cc77895eb
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@ -25,6 +25,9 @@
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#include <asm/io.h>
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#include <phy.h>
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#include <asm/arch/cpu.h>
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#include <dm.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define BITMASK(bits) (BIT(bits) - 1)
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#define PHY_REG_MASK 0x1f
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@ -37,6 +40,23 @@
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#define FULLDUPLEXEN BIT(0)
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#define MIIEN BIT(15)
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/* reg offset */
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#define CPSW_HOST_PORT_OFFSET 0x108
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#define CPSW_SLAVE0_OFFSET 0x208
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#define CPSW_SLAVE1_OFFSET 0x308
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#define CPSW_SLAVE_SIZE 0x100
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#define CPSW_CPDMA_OFFSET 0x800
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#define CPSW_HW_STATS 0x900
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#define CPSW_STATERAM_OFFSET 0xa00
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#define CPSW_CPTS_OFFSET 0xc00
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#define CPSW_ALE_OFFSET 0xd00
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#define CPSW_SLIVER0_OFFSET 0xd80
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#define CPSW_SLIVER1_OFFSET 0xdc0
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#define CPSW_BD_OFFSET 0x2000
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#define CPSW_MDIO_DIV 0xff
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#define AM335X_GMII_SEL_OFFSET 0x630
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/* DMA Registers */
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#define CPDMA_TXCONTROL 0x004
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#define CPDMA_RXCONTROL 0x014
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@ -218,7 +238,11 @@ struct cpdma_chan {
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(priv)->data.slaves; slave++)
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struct cpsw_priv {
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#ifdef CONFIG_DM_ETH
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struct udevice *dev;
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#else
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struct eth_device *dev;
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#endif
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struct cpsw_platform_data data;
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int host_port;
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@ -522,7 +546,7 @@ static int cpsw_mdio_write(struct mii_dev *bus, int phy_id, int dev_addr,
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return 0;
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}
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static void cpsw_mdio_init(char *name, u32 mdio_base, u32 div)
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static void cpsw_mdio_init(const char *name, u32 mdio_base, u32 div)
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{
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struct mii_dev *bus = mdio_alloc();
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@ -563,8 +587,15 @@ static inline void setbit_and_wait_for_clear32(void *addr)
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static void cpsw_set_slave_mac(struct cpsw_slave *slave,
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struct cpsw_priv *priv)
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{
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#ifdef CONFIG_DM_ETH
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struct eth_pdata *pdata = dev_get_platdata(priv->dev);
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writel(mac_hi(pdata->enetaddr), &slave->regs->sa_hi);
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writel(mac_lo(pdata->enetaddr), &slave->regs->sa_lo);
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#else
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__raw_writel(mac_hi(priv->dev->enetaddr), &slave->regs->sa_hi);
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__raw_writel(mac_lo(priv->dev->enetaddr), &slave->regs->sa_lo);
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#endif
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}
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static void cpsw_slave_update_link(struct cpsw_slave *slave,
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@ -973,6 +1004,7 @@ int _cpsw_register(struct cpsw_priv *priv)
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return 0;
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}
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#ifndef CONFIG_DM_ETH
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static int cpsw_init(struct eth_device *dev, bd_t *bis)
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{
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struct cpsw_priv *priv = dev->priv;
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@ -1049,3 +1081,214 @@ int cpsw_register(struct cpsw_platform_data *data)
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return 1;
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}
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#else
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static int cpsw_eth_start(struct udevice *dev)
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{
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struct eth_pdata *pdata = dev_get_platdata(dev);
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struct cpsw_priv *priv = dev_get_priv(dev);
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return _cpsw_init(priv, pdata->enetaddr);
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}
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static int cpsw_eth_send(struct udevice *dev, void *packet, int length)
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{
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struct cpsw_priv *priv = dev_get_priv(dev);
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return _cpsw_send(priv, packet, length);
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}
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static int cpsw_eth_recv(struct udevice *dev, int flags, uchar **packetp)
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{
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struct cpsw_priv *priv = dev_get_priv(dev);
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return _cpsw_recv(priv, packetp);
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}
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static int cpsw_eth_free_pkt(struct udevice *dev, uchar *packet,
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int length)
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{
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struct cpsw_priv *priv = dev_get_priv(dev);
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return cpdma_submit(priv, &priv->rx_chan, packet, PKTSIZE);
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}
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static void cpsw_eth_stop(struct udevice *dev)
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{
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struct cpsw_priv *priv = dev_get_priv(dev);
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return _cpsw_halt(priv);
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}
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static int cpsw_eth_probe(struct udevice *dev)
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{
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struct cpsw_priv *priv = dev_get_priv(dev);
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priv->dev = dev;
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return _cpsw_register(priv);
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}
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static const struct eth_ops cpsw_eth_ops = {
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.start = cpsw_eth_start,
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.send = cpsw_eth_send,
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.recv = cpsw_eth_recv,
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.free_pkt = cpsw_eth_free_pkt,
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.stop = cpsw_eth_stop,
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};
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static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
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{
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struct eth_pdata *pdata = dev_get_platdata(dev);
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struct cpsw_priv *priv = dev_get_priv(dev);
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const char *phy_mode;
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const void *fdt = gd->fdt_blob;
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int node = dev->of_offset;
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int subnode;
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int slave_index = 0;
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uint32_t mac_hi, mac_lo;
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fdt32_t gmii = 0;
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int active_slave;
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pdata->iobase = dev_get_addr(dev);
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priv->data.version = CPSW_CTRL_VERSION_2;
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priv->data.bd_ram_ofs = CPSW_BD_OFFSET;
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priv->data.ale_reg_ofs = CPSW_ALE_OFFSET;
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priv->data.cpdma_reg_ofs = CPSW_CPDMA_OFFSET;
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priv->data.mdio_div = CPSW_MDIO_DIV;
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priv->data.host_port_reg_ofs = CPSW_HOST_PORT_OFFSET,
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pdata->phy_interface = -1;
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priv->data.cpsw_base = pdata->iobase;
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priv->data.channels = fdtdec_get_int(fdt, node, "cpdma_channels", -1);
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if (priv->data.channels <= 0) {
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printf("error: cpdma_channels not found in dt\n");
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return -ENOENT;
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}
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priv->data.slaves = fdtdec_get_int(fdt, node, "slaves", -1);
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if (priv->data.slaves <= 0) {
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printf("error: slaves not found in dt\n");
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return -ENOENT;
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}
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priv->data.slave_data = malloc(sizeof(struct cpsw_slave_data) *
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priv->data.slaves);
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priv->data.ale_entries = fdtdec_get_int(fdt, node, "ale_entries", -1);
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if (priv->data.ale_entries <= 0) {
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printf("error: ale_entries not found in dt\n");
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return -ENOENT;
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}
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priv->data.bd_ram_ofs = fdtdec_get_int(fdt, node, "bd_ram_size", -1);
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if (priv->data.bd_ram_ofs <= 0) {
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printf("error: bd_ram_size not found in dt\n");
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return -ENOENT;
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}
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priv->data.mac_control = fdtdec_get_int(fdt, node, "mac_control", -1);
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if (priv->data.mac_control <= 0) {
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printf("error: ale_entries not found in dt\n");
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return -ENOENT;
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}
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active_slave = fdtdec_get_int(fdt, node, "active_slave", 0);
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priv->data.active_slave = active_slave;
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fdt_for_each_subnode(fdt, subnode, node) {
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int len;
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const char *name;
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name = fdt_get_name(fdt, subnode, &len);
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if (!strncmp(name, "mdio", 4)) {
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priv->data.mdio_base = fdtdec_get_addr(fdt, subnode,
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"reg");
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}
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if (!strncmp(name, "slave", 5)) {
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u32 phy_id[2];
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if (slave_index >= priv->data.slaves) {
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printf("error: num slaves and slave nodes did not match\n");
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return -EINVAL;
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}
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phy_mode = fdt_getprop(fdt, subnode, "phy-mode", NULL);
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if (phy_mode)
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priv->data.slave_data[slave_index].phy_if =
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phy_get_interface_by_name(phy_mode);
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fdtdec_get_int_array(fdt, subnode, "phy_id", phy_id, 2);
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priv->data.slave_data[slave_index].phy_addr = phy_id[1];
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slave_index++;
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}
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if (!strncmp(name, "cpsw-phy-sel", 12)) {
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priv->data.gmii_sel = fdtdec_get_addr(fdt, subnode,
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"reg");
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}
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}
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priv->data.slave_data[0].slave_reg_ofs = CPSW_SLAVE0_OFFSET;
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priv->data.slave_data[0].sliver_reg_ofs = CPSW_SLIVER0_OFFSET;
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if (priv->data.slaves == 2) {
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priv->data.slave_data[1].slave_reg_ofs = CPSW_SLAVE1_OFFSET;
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priv->data.slave_data[1].sliver_reg_ofs = CPSW_SLIVER1_OFFSET;
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}
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subnode = fdtdec_lookup_phandle(fdt, node, "syscon");
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priv->data.mac_id = fdt_translate_address((void *)fdt, subnode, &gmii);
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priv->data.mac_id += AM335X_GMII_SEL_OFFSET;
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priv->data.mac_id += active_slave * 8;
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/* try reading mac address from efuse */
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mac_lo = readl(priv->data.mac_id);
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mac_hi = readl(priv->data.mac_id + 4);
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pdata->enetaddr[0] = mac_hi & 0xFF;
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pdata->enetaddr[1] = (mac_hi & 0xFF00) >> 8;
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pdata->enetaddr[2] = (mac_hi & 0xFF0000) >> 16;
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pdata->enetaddr[3] = (mac_hi & 0xFF000000) >> 24;
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pdata->enetaddr[4] = mac_lo & 0xFF;
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pdata->enetaddr[5] = (mac_lo & 0xFF00) >> 8;
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pdata->phy_interface = priv->data.slave_data[active_slave].phy_if;
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if (pdata->phy_interface == -1) {
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debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
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return -EINVAL;
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}
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switch (pdata->phy_interface) {
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case PHY_INTERFACE_MODE_MII:
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writel(MII_MODE_ENABLE, priv->data.gmii_sel);
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break;
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case PHY_INTERFACE_MODE_RMII:
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writel(RMII_MODE_ENABLE, priv->data.gmii_sel);
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break;
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_ID:
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case PHY_INTERFACE_MODE_RGMII_RXID:
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case PHY_INTERFACE_MODE_RGMII_TXID:
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writel(RGMII_MODE_ENABLE, priv->data.gmii_sel);
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break;
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}
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return 0;
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}
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static const struct udevice_id cpsw_eth_ids[] = {
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{ .compatible = "ti,cpsw" },
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{ .compatible = "ti,am335x-cpsw" },
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{ }
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};
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U_BOOT_DRIVER(eth_cpsw) = {
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.name = "eth_cpsw",
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.id = UCLASS_ETH,
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.of_match = cpsw_eth_ids,
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.ofdata_to_platdata = cpsw_eth_ofdata_to_platdata,
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.probe = cpsw_eth_probe,
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.ops = &cpsw_eth_ops,
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.priv_auto_alloc_size = sizeof(struct cpsw_priv),
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.platdata_auto_alloc_size = sizeof(struct eth_pdata),
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.flags = DM_FLAG_ALLOC_PRIV_DMA,
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};
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#endif /* CONFIG_DM_ETH */
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@ -31,6 +31,8 @@ enum {
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struct cpsw_platform_data {
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u32 mdio_base;
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u32 cpsw_base;
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u32 mac_id;
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u32 gmii_sel;
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int mdio_div;
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int channels; /* number of cpdma channels (symmetric) */
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u32 cpdma_reg_ofs; /* cpdma register offset */
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