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board/b4860qds: Relax NOR flash teadc timing parameter 

Relax parameters to give address latching more time to setup.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
utp
Prabhakar Kushwaha 2013-05-17 13:40:52 +05:30 committed by Andy Fleming
parent 8212519254
commit 4d0e6e0d73
1 changed files with 1 additions and 1 deletions
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2
include/configs/B4860QDS.h
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@ -236,7 +236,7 @@ unsigned long get_board_ddr_clk(void);
/* NOR Flash Timing Params */
#define CONFIG_SYS_NOR_CSOR CSOR_NOR_ADM_SHIFT(4)
#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x01) | \
FTIM0_NOR_TEADC(0x01) | \
FTIM0_NOR_TEADC(0x04) | \
FTIM0_NOR_TEAHC(0x20))
#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \
FTIM1_NOR_TRAD_NOR(0x1A) |\