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ppc: Zap Hymod board 

Remove this board as this is the only one last user of eeprom_probe(),
which is pretty non-standard stuff.

This patch also removes all the PHP, SQL and CSS stuff from U-Boot,
which probably makes U-Boot a bit less IoT ;-)

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
utp
Marek Vasut 2014-10-22 21:34:48 +02:00 committed by Wolfgang Denk
parent 1655f9f6c7
commit 5038d7f189
47 changed files with 3 additions and 6743 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/powerpc/cpu/mpc8260/Kconfig
View File

@ -28,9 +28,6 @@ config TARGET_EP82XXM
config TARGET_GW8260
bool "Support gw8260"
config TARGET_HYMOD
bool "Support hymod"
config TARGET_IPHASE4539
bool "Support IPHASE4539"
@ -78,7 +75,6 @@ source "board/ep82xxm/Kconfig"
source "board/freescale/mpc8266ads/Kconfig"
source "board/funkwerk/vovpn-gw/Kconfig"
source "board/gw8260/Kconfig"
source "board/hymod/Kconfig"
source "board/ids/ids8247/Kconfig"
source "board/iphase4539/Kconfig"
source "board/keymile/km82xx/Kconfig"

27
arch/powerpc/cpu/mpc8260/ether_fcc.c
View File

@ -645,32 +645,7 @@ eth_loopback_test (void)
/* 28.9 - (1-2): ioports have been set up already */
#if defined(CONFIG_HYMOD)
/*
* Attention: this is board-specific
* 0, FCC1
* 1, FCC2
* 2, FCC3
*/
# define FCC_START_LOOP 0
# define FCC_END_LOOP 2
/*
* Attention: this is board-specific
* - FCC1 Rx-CLK is CLK10
* - FCC1 Tx-CLK is CLK11
* - FCC2 Rx-CLK is CLK13
* - FCC2 Tx-CLK is CLK14
* - FCC3 Rx-CLK is CLK15
* - FCC3 Tx-CLK is CLK16
*/
/* 28.9 - (3): connect FCC's tx and rx clocks */
immr->im_cpmux.cmx_uar = 0;
immr->im_cpmux.cmx_fcr = CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK11|\
CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14|\
CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16;
#elif defined(CONFIG_SACSng)
#if defined(CONFIG_SACSng)
/*
* Attention: this is board-specific
* 1, FCC2

10
arch/powerpc/cpu/mpc8260/interrupts.c
View File

@ -142,15 +142,7 @@ int interrupt_init_cpu (unsigned *decrementer_count)
immr->im_intctl.ic_sipnrh = 0xffffffff;
immr->im_intctl.ic_sipnrl = 0xffffffff;
#ifdef CONFIG_HYMOD
/*
* ensure all external interrupt sources default to trigger on
* high-to-low transition (i.e. edge triggered active low)
*/
immr->im_intctl.ic_siexr = -1;
#endif
return (0);
return 0;
}
/****************************************************************************/

14
arch/powerpc/cpu/mpc8260/start.S
View File

@ -48,9 +48,6 @@
GOT_ENTRY(__init_end)
GOT_ENTRY(__bss_end)
GOT_ENTRY(__bss_start)
#if defined(CONFIG_HYMOD)
GOT_ENTRY(environment)
#endif
END_GOT
/*
@ -878,18 +875,7 @@ clear_bss:
* Now clear BSS segment
*/
lwz r3,GOT(__bss_start)
#if defined(CONFIG_HYMOD)
/*
* For HYMOD - the environment is the very last item in flash.
* The real .bss stops just before environment starts, so only
* clear up to that point.
*
* taken from mods for FADS board
*/
lwz r4,GOT(environment)
#else
lwz r4,GOT(__bss_end)
#endif
cmplw 0, r3, r4
beq 6f

11
arch/powerpc/cpu/mpc83xx/start.S
View File

@ -958,18 +958,7 @@ clear_bss:
* Now clear BSS segment
*/
lwz r3,GOT(__bss_start)
#if defined(CONFIG_HYMOD)
/*
* For HYMOD - the environment is the very last item in flash.
* The real .bss stops just before environment starts, so only
* clear up to that point.
*
* taken from mods for FADS board
*/
lwz r4,GOT(environment)
#else
lwz r4,GOT(__bss_end)
#endif
cmplw 0, r3, r4
beq 6f

3
arch/powerpc/include/asm/u-boot.h
View File

@ -77,9 +77,6 @@ typedef struct bd_info {
unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
#endif
#if defined(CONFIG_HYMOD)
hymod_conf_t bi_hymod_conf; /* hymod configuration information */
#endif
#ifdef CONFIG_HAS_ETH1
unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */

9
board/hymod/Kconfig
View File

@ -1,9 +0,0 @@
if TARGET_HYMOD
config SYS_BOARD
default "hymod"
config SYS_CONFIG_NAME
default "hymod"
endif

6
board/hymod/MAINTAINERS
View File

@ -1,6 +0,0 @@
HYMOD BOARD
M: Murray Jensen <Murray.Jensen@csiro.au>
S: Maintained
F: board/hymod/
F: include/configs/hymod.h
F: configs/hymod_defconfig

8
board/hymod/Makefile
View File

@ -1,8 +0,0 @@
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y = hymod.o flash.o bsp.o eeprom.o fetch.o input.o env.o

387
board/hymod/bsp.c
View File

@ -1,387 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*
* hacked for Hymod FPGA support by Murray.Jensen@csiro.au, 29-Jan-01
*/
#include <common.h>
#include <command.h>
#include <net.h>
#include <asm/iopin_8260.h>
DECLARE_GLOBAL_DATA_PTR;
/*-----------------------------------------------------------------------
* Board Special Commands: FPGA load/store, EEPROM erase
*/
#if defined(CONFIG_CMD_BSP)
#define LOAD_SUCCESS 0
#define LOAD_FAIL_NOCONF 1
#define LOAD_FAIL_NOINIT 2
#define LOAD_FAIL_NODONE 3
#define STORE_SUCCESS 0
/*
* Programming the Hymod FPGAs
*
* The 8260 io port config table is set up so that the INIT pin is
* held Low (Open Drain output 0) - this will delay the automatic
* Power-On config until INIT is released (by making it an input).
*
* If the FPGA has been programmed before, then the assertion of PROGRAM
* will initiate configuration (i.e. it begins clearing the RAM).
*
* When the FPGA is ready to receive configuration data (either after
* releasing INIT after Power-On, or after asserting PROGRAM), it will
* pull INIT high.
*
* Notes from Paul Dunn:
*
* 1. program pin should be forced low for >= 300ns
* (about 20 bus clock cycles minimum).
*
* 2. then wait for init to go high, which signals
* that the FPGA has cleared its internal memory
* and is ready to load
*
* 3. perform load writes of entire config file
*
* 4. wait for done to go high, which should be
* within a few bus clock cycles. If done has not
* gone high after reasonable period, then load
* has not worked (wait several ms?)
*/
int
fpga_load(int mezz, const uchar *addr, ulong size)
{
hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
xlx_info_t *fp;
xlx_iopins_t *fpgaio;
volatile uchar *fpgabase;
volatile uint cnt;
const uchar *eaddr = addr + size;
int result;
if (mezz)
fp = &cp->mezz.xlx[0];
else
fp = &cp->main.xlx[0];
if (!fp->mmap.prog.exists)
return (LOAD_FAIL_NOCONF);
fpgabase = (uchar *)fp->mmap.prog.base;
fpgaio = &fp->iopins;
/* set enable HIGH if required */
if (fpgaio->enable_pin.flag)
iopin_set_high (&fpgaio->enable_pin);
/* ensure INIT is released (set it to be an input) */
iopin_set_in (&fpgaio->init_pin);
/* toggle PROG Low then High (will already be Low after Power-On) */
iopin_set_low (&fpgaio->prog_pin);
udelay (1); /* minimum 300ns - 1usec should do it */
iopin_set_high (&fpgaio->prog_pin);
/* wait for INIT High */
cnt = 0;
while (!iopin_is_high (&fpgaio->init_pin))
if (++cnt == 10000000) {
result = LOAD_FAIL_NOINIT;
goto done;
}
/* write configuration data */
while (addr < eaddr)
*fpgabase = *addr++;
/* wait for DONE High */
cnt = 0;
while (!iopin_is_high (&fpgaio->done_pin))
if (++cnt == 100000000) {
result = LOAD_FAIL_NODONE;
goto done;
}
/* success */
result = LOAD_SUCCESS;
done:
if (fpgaio->enable_pin.flag)
iopin_set_low (&fpgaio->enable_pin);
return (result);
}
/* ------------------------------------------------------------------------- */
int
do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
uchar *addr, *save_addr;
ulong size;
int mezz, arg, result;
switch (argc) {
case 0:
case 1:
break;
case 2:
if (strcmp (argv[1], "info") == 0) {
printf ("\nHymod FPGA Info...\n");
printf ("\t\t\t\tAddress\t\tSize\n");
printf ("\tMain Configuration:\t0x%08x\t%d\n",
FPGA_MAIN_CFG_BASE, FPGA_MAIN_CFG_SIZE);
printf ("\tMain Register:\t\t0x%08x\t%d\n",
FPGA_MAIN_REG_BASE, FPGA_MAIN_REG_SIZE);
printf ("\tMain Port:\t\t0x%08x\t%d\n",
FPGA_MAIN_PORT_BASE, FPGA_MAIN_PORT_SIZE);
printf ("\tMezz Configuration:\t0x%08x\t%d\n",
FPGA_MEZZ_CFG_BASE, FPGA_MEZZ_CFG_SIZE);
return 0;
}
break;
case 3:
if (strcmp (argv[1], "store") == 0) {
addr = (uchar *) simple_strtoul (argv[2], NULL, 16);
save_addr = addr;
#if 0
/* fpga readback unimplemented */
while (more readback data)
*addr++ = *fpga;
result = error ? STORE_FAIL_XXX : STORE_SUCCESS;
#else
result = STORE_SUCCESS;
#endif
if (result == STORE_SUCCESS) {
printf ("SUCCEEDED (%d bytes)\n",
addr - save_addr);
return 0;
} else
printf ("FAILED (%d bytes)\n",
addr - save_addr);
return 1;
}
break;
case 4:
if (strcmp (argv[1], "tftp") == 0) {
copy_filename (BootFile, argv[2], sizeof (BootFile));
load_addr = simple_strtoul (argv[3], NULL, 16);
NetBootFileXferSize = 0;
if (NetLoop(TFTPGET) <= 0) {
printf ("tftp transfer failed - aborting "
"fgpa load\n");
return 1;
}
if (NetBootFileXferSize == 0) {
printf ("can't determine file size - "
"aborting fpga load\n");
return 1;
}
printf ("File transfer succeeded - "
"beginning fpga load...");
result = fpga_load (0, (uchar *) load_addr,
NetBootFileXferSize);
if (result == LOAD_SUCCESS) {
printf ("SUCCEEDED\n");
return 0;
} else if (result == LOAD_FAIL_NOCONF)
printf ("FAILED (no CONF)\n");
else if (result == LOAD_FAIL_NOINIT)
printf ("FAILED (no INIT)\n");
else
printf ("FAILED (no DONE)\n");
return 1;
}
/* fall through ... */
case 5:
if (strcmp (argv[1], "load") == 0) {
if (argc == 5) {
if (strcmp (argv[2], "main") == 0)
mezz = 0;
else if (strcmp (argv[2], "mezz") == 0)
mezz = 1;
else {
printf ("FPGA type must be either "
"`main' or `mezz'\n");
return 1;
}
arg = 3;
} else {
mezz = 0;
arg = 2;
}
addr = (uchar *) simple_strtoul (argv[arg++], NULL, 16);
size = (ulong) simple_strtoul (argv[arg], NULL, 16);
result = fpga_load (mezz, addr, size);
if (result == LOAD_SUCCESS) {
printf ("SUCCEEDED\n");
return 0;
} else if (result == LOAD_FAIL_NOCONF)
printf ("FAILED (no CONF)\n");
else if (result == LOAD_FAIL_NOINIT)
printf ("FAILED (no INIT)\n");
else
printf ("FAILED (no DONE)\n");
return 1;
}
break;
default:
break;
}
return cmd_usage(cmdtp);
}
U_BOOT_CMD(
fpga, 6, 1, do_fpga,
"FPGA sub-system",
"load [type] addr size\n"
" - write the configuration data at memory address `addr',\n"
" size `size' bytes, into the FPGA of type `type' (either\n"
" `main' or `mezz', default `main'). e.g.\n"
" `fpga load 100000 7d8f'\n"
" loads the main FPGA with config data at address 100000\n"
" HEX, size 7d8f HEX (32143 DEC) bytes\n"
"fpga tftp file addr\n"
" - transfers `file' from the tftp server into memory at\n"
" address `addr', then writes the entire file contents\n"
" into the main FPGA\n"
"fpga store addr\n"
" - read configuration data from the main FPGA (the mezz\n"
" FPGA is write-only), into address `addr'. There must be\n"
" enough memory available at `addr' to hold all the config\n"
" data - the size of which is determined by VC:???\n"
"fpga info\n"
" - print information about the Hymod FPGA, namely the\n"
" memory addresses at which the four FPGA local bus\n"
" address spaces appear in the physical address space"
);
/* ------------------------------------------------------------------------- */
int
do_eecl (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
uchar data[HYMOD_EEPROM_SIZE];
uint addr = CONFIG_SYS_I2C_EEPROM_ADDR;
switch (argc) {
case 1:
addr |= HYMOD_EEOFF_MAIN;
break;
case 2:
if (strcmp (argv[1], "main") == 0) {
addr |= HYMOD_EEOFF_MAIN;
break;
}
if (strcmp (argv[1], "mezz") == 0) {
addr |= HYMOD_EEOFF_MEZZ;
break;
}
/* fall through ... */
default:
return cmd_usage(cmdtp);
}
memset (data, 0, HYMOD_EEPROM_SIZE);
eeprom_write (addr, 0, data, HYMOD_EEPROM_SIZE);
return 0;
}
U_BOOT_CMD(
eeclear, 1, 0, do_eecl,
"Clear the eeprom on a Hymod board",
"[type]\n"
" - write zeroes into the EEPROM on the board of type `type'\n"
" (`type' is either `main' or `mezz' - default `main')\n"
" Note: the EEPROM write enable jumper must be installed"
);
/* ------------------------------------------------------------------------- */
int
do_htest (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
#if 0
int rc;
#endif
#ifdef CONFIG_ETHER_LOOPBACK_TEST
extern void eth_loopback_test (void);
#endif /* CONFIG_ETHER_LOOPBACK_TEST */
printf ("HYMOD tests - ensure loopbacks etc. are connected\n\n");
#if 0
/* Load FPGA with test program */
printf ("Loading test FPGA program ...");
rc = fpga_load (0, test_bitfile, sizeof (test_bitfile));
switch (rc) {
case LOAD_SUCCESS:
printf (" SUCCEEDED\n");
break;
case LOAD_FAIL_NOCONF:
printf (" FAILED (no configuration space defined)\n");
return 1;
case LOAD_FAIL_NOINIT:
printf (" FAILED (timeout - no INIT signal seen)\n");
return 1;
case LOAD_FAIL_NODONE:
printf (" FAILED (timeout - no DONE signal seen)\n");
return 1;
default:
printf (" FAILED (unknown return code from fpga_load\n");
return 1;
}
/* run Local Bus <=> Xilinx tests */
/* tell Xilinx to run ZBT Ram, High Speed serial and Mezzanine tests */
/* run SDRAM test */
#endif
#ifdef CONFIG_ETHER_LOOPBACK_TEST
/* run Ethernet test */
eth_loopback_test ();
#endif /* CONFIG_ETHER_LOOPBACK_TEST */
return 0;
}
#endif

14
board/hymod/config.mk
View File

@ -1,14 +0,0 @@
#
# (C) Copyright 2000
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# SPDX-License-Identifier: GPL-2.0+
#
#
# HYMOD boards
#
PLATFORM_CPPFLAGS += -I$(srctree)
OBJCOPYFLAGS = --remove-section=.ppcenv

678
board/hymod/eeprom.c
View File

@ -1,678 +0,0 @@
/*
* (C) Copyright 2001
* Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <mpc8260.h>
/* imports from fetch.c */
extern int fetch_and_parse (char *, ulong, int (*)(uchar *, uchar *));
/* imports from input.c */
extern int hymod_get_serno (const char *);
/* this is relative to the root of the server's tftp directory */
static char *def_bddb_cfgdir = "/hymod/bddb";
static int
hymod_eeprom_load (int which, hymod_eeprom_t *ep)
{
unsigned dev_addr = CONFIG_SYS_I2C_EEPROM_ADDR | \
(which ? HYMOD_EEOFF_MEZZ : HYMOD_EEOFF_MAIN);
unsigned offset = 0;
uchar data[HYMOD_EEPROM_MAXLEN], *dp, *edp;
hymod_eehdr_t hdr;
ulong len, crc;
memset (ep, 0, sizeof *ep);
eeprom_read (dev_addr, offset, (uchar *)&hdr, sizeof (hdr));
offset += sizeof (hdr);
if (hdr.id != HYMOD_EEPROM_ID || hdr.ver > HYMOD_EEPROM_VER ||
(len = hdr.len) > HYMOD_EEPROM_MAXLEN)
return (0);
eeprom_read (dev_addr, offset, data, len);
offset += len;
eeprom_read (dev_addr, offset, (uchar *)&crc, sizeof (ulong));
offset += sizeof (ulong);
if (crc32 (crc32 (0, (uchar *)&hdr, sizeof hdr), data, len) != crc)
return (0);
ep->ver = hdr.ver;
dp = data; edp = dp + len;
for (;;) {
ulong rtyp;
uchar rlen, *rdat;
rtyp = *dp++;
if ((rtyp & 0x80) == 0)
rlen = *dp++;
else {
uchar islarge = rtyp & 0x40;
rtyp = ((rtyp & 0x3f) << 8) | *dp++;
if (islarge) {
rtyp = (rtyp << 8) | *dp++;
rtyp = (rtyp << 8) | *dp++;
}
rlen = *dp++;
rlen = (rlen << 8) | *dp++;
if (islarge) {
rlen = (rlen << 8) | *dp++;
rlen = (rlen << 8) | *dp++;
}
}
if (rtyp == 0)
break;
rdat = dp;
dp += rlen;
if (dp > edp) /* error? */
break;
switch (rtyp) {
case HYMOD_EEREC_SERNO: /* serial number */
if (rlen == sizeof (ulong))
ep->serno = \
((ulong)rdat[0] << 24) | \
((ulong)rdat[1] << 16) | \
((ulong)rdat[2] << 8) | \
(ulong)rdat[3];
break;
case HYMOD_EEREC_DATE: /* date */
if (rlen == sizeof (hymod_date_t)) {
ep->date.year = ((ushort)rdat[0] << 8) | \
(ushort)rdat[1];
ep->date.month = rdat[2];
ep->date.day = rdat[3];
}
break;
case HYMOD_EEREC_BATCH: /* batch */
if (rlen <= HYMOD_MAX_BATCH)
memcpy (ep->batch, rdat, ep->batchlen = rlen);
break;
case HYMOD_EEREC_TYPE: /* board type */
if (rlen == 1)
ep->bdtype = *rdat;
break;
case HYMOD_EEREC_REV: /* board revision */
if (rlen == 1)
ep->bdrev = *rdat;
break;
case HYMOD_EEREC_SDRAM: /* sdram size(s) */
if (rlen > 0 && rlen <= HYMOD_MAX_SDRAM) {
int i;
for (i = 0; i < rlen; i++)
ep->sdramsz[i] = rdat[i];
ep->nsdram = rlen;
}
break;
case HYMOD_EEREC_FLASH: /* flash size(s) */
if (rlen > 0 && rlen <= HYMOD_MAX_FLASH) {
int i;
for (i = 0; i < rlen; i++)
ep->flashsz[i] = rdat[i];
ep->nflash = rlen;
}
break;
case HYMOD_EEREC_ZBT: /* zbt ram size(s) */
if (rlen > 0 && rlen <= HYMOD_MAX_ZBT) {
int i;
for (i = 0; i < rlen; i++)
ep->zbtsz[i] = rdat[i];
ep->nzbt = rlen;
}
break;
case HYMOD_EEREC_XLXTYP: /* xilinx fpga type(s) */
if (rlen > 0 && rlen <= HYMOD_MAX_XLX) {
int i;
for (i = 0; i < rlen; i++)
ep->xlx[i].type = rdat[i];
ep->nxlx = rlen;
}
break;
case HYMOD_EEREC_XLXSPD: /* xilinx fpga speed(s) */
if (rlen > 0 && rlen <= HYMOD_MAX_XLX) {
int i;
for (i = 0; i < rlen; i++)
ep->xlx[i].speed = rdat[i];
}
break;
case HYMOD_EEREC_XLXTMP: /* xilinx fpga temperature(s) */
if (rlen > 0 && rlen <= HYMOD_MAX_XLX) {
int i;
for (i = 0; i < rlen; i++)
ep->xlx[i].temp = rdat[i];
}
break;
case HYMOD_EEREC_XLXGRD: /* xilinx fpga grade(s) */
if (rlen > 0 && rlen <= HYMOD_MAX_XLX) {
int i;
for (i = 0; i < rlen; i++)
ep->xlx[i].grade = rdat[i];
}
break;
case HYMOD_EEREC_CPUTYP: /* CPU type */
if (rlen == 1)
ep->mpc.type = *rdat;
break;
case HYMOD_EEREC_CPUSPD: /* CPU speed */
if (rlen == 1)
ep->mpc.cpuspd = *rdat;
break;
case HYMOD_EEREC_CPMSPD: /* CPM speed */
if (rlen == 1)
ep->mpc.cpmspd = *rdat;
break;
case HYMOD_EEREC_BUSSPD: /* bus speed */
if (rlen == 1)
ep->mpc.busspd = *rdat;
break;
case HYMOD_EEREC_HSTYPE: /* hs-serial chip type */
if (rlen == 1)
ep->hss.type = *rdat;
break;
case HYMOD_EEREC_HSCHIN: /* num hs-serial input chans */
if (rlen == 1)
ep->hss.nchin = *rdat;
break;
case HYMOD_EEREC_HSCHOUT: /* num hs-serial output chans */
if (rlen == 1)
ep->hss.nchout = *rdat;
break;
default: /* ignore */
break;
}
}
return (1);
}
/* maps an ascii "name=value" into a binary eeprom data record */
typedef
struct _eerec_map {
char *name;
uint type;
uchar *(*handler) \
(struct _eerec_map *, uchar *, uchar *, uchar *);
uint length;
uint maxlen;
}
eerec_map_t;
static uchar *
uint_handler (eerec_map_t *rp, uchar *val, uchar *dp, uchar *edp)
{
char *eval;
ulong lval;
lval = simple_strtol ((char *)val, &eval, 10);
if ((uchar *)eval == val || *eval != '\0') {
printf ("%s rec (%s) is not a valid uint\n", rp->name, val);
return (NULL);
}
if (dp + 2 + rp->length > edp) {
printf ("can't fit %s rec into eeprom\n", rp->name);
return (NULL);
}
*dp++ = rp->type;
*dp++ = rp->length;
switch (rp->length) {
case 1:
if (lval >= 256) {
printf ("%s rec value (%lu) out of range (0-255)\n",
rp->name, lval);
return (NULL);
}
*dp++ = lval;
break;
case 2:
if (lval >= 65536) {
printf ("%s rec value (%lu) out of range (0-65535)\n",
rp->name, lval);
return (NULL);
}
*dp++ = lval >> 8;
*dp++ = lval;
break;
case 4:
*dp++ = lval >> 24;
*dp++ = lval >> 16;
*dp++ = lval >> 8;
*dp++ = lval;
break;
default:
printf ("huh? rp->length not 1, 2 or 4! (%d)\n", rp->length);
return (NULL);
}
return (dp);
}
static uchar *
date_handler (eerec_map_t *rp, uchar *val, uchar *dp, uchar *edp)
{
hymod_date_t date;
char *p = (char *)val;
char *ep;
ulong lval;
lval = simple_strtol (p, &ep, 10);
if (ep == p || *ep++ != '-') {
bad_date:
printf ("%s rec (%s) is not a valid date\n", rp->name, val);
return (NULL);
}
if (lval >= 65536)
goto bad_date;
date.year = lval;
lval = simple_strtol (p = ep, &ep, 10);
if (ep == p || *ep++ != '-' || lval == 0 || lval > 12)
goto bad_date;
date.month = lval;
lval = simple_strtol (p = ep, &ep, 10);
if (ep == p || *ep != '\0' || lval == 0 || lval > 31)
goto bad_date;
date.day = lval;
if (dp + 2 + rp->length > edp) {
printf ("can't fit %s rec into eeprom\n", rp->name);
return (NULL);
}
*dp++ = rp->type;
*dp++ = rp->length;
*dp++ = date.year >> 8;
*dp++ = date.year;
*dp++ = date.month;
*dp++ = date.day;
return (dp);
}
static uchar *
string_handler (eerec_map_t *rp, uchar *val, uchar *dp, uchar *edp)
{
uint len;
if ((len = strlen ((char *)val)) > rp->maxlen) {
printf ("%s rec (%s) string is too long (%d>%d)\n",
rp->name, val, len, rp->maxlen);
return (NULL);
}
if (dp + 2 + len > edp) {
printf ("can't fit %s rec into eeprom\n", rp->name);
return (NULL);
}
*dp++ = rp->type;
*dp++ = len;
memcpy (dp, val, len);
dp += len;
return (dp);
}
static uchar *
bytes_handler (eerec_map_t *rp, uchar *val, uchar *dp, uchar *edp)
{
uchar bytes[HYMOD_MAX_BYTES], nbytes, *p;
char *ep;
for (nbytes = 0, p = val; *p != '\0'; p = (uchar *)ep) {
ulong lval;
lval = simple_strtol ((char *)p, &ep, 10);
if ((uchar *)ep == p || (*ep != '\0' && *ep != ',') || \
lval >= 256) {
printf ("%s rec (%s) byte array has invalid uint\n",
rp->name, val);
return (NULL);
}
if (nbytes >= HYMOD_MAX_BYTES) {
printf ("%s rec (%s) byte array too long\n",
rp->name, val);
return (NULL);
}
bytes[nbytes++] = lval;
if (*ep != '\0')
ep++;
}
if (dp + 2 + nbytes > edp) {
printf ("can't fit %s rec into eeprom\n", rp->name);
return (NULL);
}
*dp++ = rp->type;
*dp++ = nbytes;
memcpy (dp, bytes, nbytes);
dp += nbytes;
return (dp);
}
static eerec_map_t eerec_map[] = {
/* name type handler len max */
{ "serno", HYMOD_EEREC_SERNO, uint_handler, 4, 0 },
{ "date", HYMOD_EEREC_DATE, date_handler, 4, 0 },
{ "batch", HYMOD_EEREC_BATCH, string_handler, 0, HYMOD_MAX_BATCH },
{ "type", HYMOD_EEREC_TYPE, uint_handler, 1, 0 },
{ "rev", HYMOD_EEREC_REV, uint_handler, 1, 0 },
{ "sdram", HYMOD_EEREC_SDRAM, bytes_handler, 0, HYMOD_MAX_SDRAM },
{ "flash", HYMOD_EEREC_FLASH, bytes_handler, 0, HYMOD_MAX_FLASH },
{ "zbt", HYMOD_EEREC_ZBT, bytes_handler, 0, HYMOD_MAX_ZBT },
{ "xlxtyp", HYMOD_EEREC_XLXTYP, bytes_handler, 0, HYMOD_MAX_XLX },
{ "xlxspd", HYMOD_EEREC_XLXSPD, bytes_handler, 0, HYMOD_MAX_XLX },
{ "xlxtmp", HYMOD_EEREC_XLXTMP, bytes_handler, 0, HYMOD_MAX_XLX },
{ "xlxgrd", HYMOD_EEREC_XLXGRD, bytes_handler, 0, HYMOD_MAX_XLX },
{ "cputyp", HYMOD_EEREC_CPUTYP, uint_handler, 1, 0 },
{ "cpuspd", HYMOD_EEREC_CPUSPD, uint_handler, 1, 0 },
{ "cpmspd", HYMOD_EEREC_CPMSPD, uint_handler, 1, 0 },
{ "busspd", HYMOD_EEREC_BUSSPD, uint_handler, 1, 0 },
{ "hstype", HYMOD_EEREC_HSTYPE, uint_handler, 1, 0 },
{ "hschin", HYMOD_EEREC_HSCHIN, uint_handler, 1, 0 },
{ "hschout", HYMOD_EEREC_HSCHOUT, uint_handler, 1, 0 },
};
static int neerecs = sizeof eerec_map / sizeof eerec_map[0];
static uchar data[HYMOD_EEPROM_SIZE], *sdp, *dp, *edp;
static int
eerec_callback (uchar *name, uchar *val)
{
eerec_map_t *rp;
for (rp = eerec_map; rp < &eerec_map[neerecs]; rp++)
if (strcmp ((char *)name, rp->name) == 0)
break;
if (rp >= &eerec_map[neerecs])
return (0);
if ((dp = (*rp->handler) (rp, val, dp, edp)) == NULL)
return (0);
return (1);
}
static int
hymod_eeprom_fetch(int which, char *filename, ulong addr)
{
unsigned dev_addr = CONFIG_SYS_I2C_EEPROM_ADDR | \
(which ? HYMOD_EEOFF_MEZZ : HYMOD_EEOFF_MAIN);
hymod_eehdr_t *hp = (hymod_eehdr_t *)&data[0];
ulong crc;
memset (hp, 0, sizeof *hp);
hp->id = HYMOD_EEPROM_ID;
hp->ver = HYMOD_EEPROM_VER;
dp = sdp = (uchar *)(hp + 1);
edp = dp + HYMOD_EEPROM_MAXLEN;
if (fetch_and_parse (filename, addr, eerec_callback) == 0)
return (0);
hp->len = dp - sdp;
crc = crc32 (0, data, dp - data);
memcpy (dp, &crc, sizeof (ulong));
dp += sizeof (ulong);
eeprom_write (dev_addr, 0, data, dp - data);
return (1);
}
static char *type_vals[] = {
"NONE", "IO", "CLP", "DSP", "INPUT", "ALT-INPUT", "DISPLAY"
};
static char *xlxtyp_vals[] = {
"NONE", "XCV300E", "XCV400E", "XCV600E"
};
static char *xlxspd_vals[] = {
"NONE", "6", "7", "8"
};
static char *xlxtmp_vals[] = {
"NONE", "COM", "IND"
};
static char *xlxgrd_vals[] = {
"NONE", "NORMAL", "ENGSAMP"
};
static char *cputyp_vals[] = {
"NONE", "MPC8260"
};
static char *clk_vals[] = {
"NONE", "33", "66", "100", "133", "166", "200"
};
static char *hstype_vals[] = {
"NONE", "AMCC-S2064A"
};
static void
print_mem (char *l, char *s, uchar n, uchar a[])
{
if (n > 0) {
if (n == 1)
printf ("%s%dMB %s", s, 1 << (a[0] - 20), l);
else {
ulong t = 0;
int i;
for (i = 0; i < n; i++)
t += 1 << (a[i] - 20);
printf ("%s%luMB %s (%d banks:", s, t, l, n);
for (i = 0; i < n; i++)
printf ("%dMB%s",
1 << (a[i] - 20),
(i == n - 1) ? ")" : ",");
}
}
else
printf ("%sNO %s", s, l);
}
void
hymod_eeprom_print (hymod_eeprom_t *ep)
{
int i;
printf (" Hymod %s board, rev %03d\n",
type_vals[ep->bdtype], ep->bdrev);
printf (" serial #: %010lu, date %04d-%02d-%02d",
ep->serno, ep->date.year, ep->date.month, ep->date.day);
if (ep->batchlen > 0)
printf (", batch \"%.*s\"", ep->batchlen, ep->batch);
puts ("\n");
switch (ep->bdtype) {
case HYMOD_BDTYPE_IO:
case HYMOD_BDTYPE_CLP:
case HYMOD_BDTYPE_DSP:
printf (" Motorola %s CPU, speeds: %s/%s/%s",
cputyp_vals[ep->mpc.type], clk_vals[ep->mpc.cpuspd],
clk_vals[ep->mpc.cpmspd], clk_vals[ep->mpc.busspd]);
print_mem ("SDRAM", ", ", ep->nsdram, ep->sdramsz);
print_mem ("FLASH", ", ", ep->nflash, ep->flashsz);
puts ("\n");
print_mem ("ZBT", " ", ep->nzbt, ep->zbtsz);
if (ep->nxlx > 0) {
hymod_xlx_t *xp;
if (ep->nxlx == 1) {
xp = &ep->xlx[0];
printf (", Xilinx %s FPGA (%s/%s/%s)",
xlxtyp_vals[xp->type],
xlxspd_vals[xp->speed],
xlxtmp_vals[xp->temp],
xlxgrd_vals[xp->grade]);
}
else {
printf (", %d Xilinx FPGAs (", ep->nxlx);
for (i = 0; i < ep->nxlx; i++) {
xp = &ep->xlx[i];
printf ("%s[%s/%s/%s]%s",
xlxtyp_vals[xp->type],
xlxspd_vals[xp->speed],
xlxtmp_vals[xp->temp],
xlxgrd_vals[xp->grade],
(i == ep->nxlx - 1) ? ")" : ", ");
}
}
}
else
puts(", NO FPGAs");
puts ("\n");
if (ep->hss.type > 0)
printf (" High Speed Serial: "
"%s, %d input%s, %d output%s\n",
hstype_vals[ep->hss.type],
ep->hss.nchin,
(ep->hss.nchin == 1 ? "" : "s"),
ep->hss.nchout,
(ep->hss.nchout == 1 ? "" : "s"));
break;
case HYMOD_BDTYPE_INPUT:
case HYMOD_BDTYPE_ALTINPUT:
case HYMOD_BDTYPE_DISPLAY:
break;
default:
/* crap! */
printf (" UNKNOWN BOARD TYPE: %d\n", ep->bdtype);
break;
}
}
int
hymod_eeprom_read (int which, hymod_eeprom_t *ep)
{
char *label = which ? "mezzanine" : "main";
unsigned dev_addr = CONFIG_SYS_I2C_EEPROM_ADDR | \
(which ? HYMOD_EEOFF_MEZZ : HYMOD_EEOFF_MAIN);
char filename[50], prompt[50], *dir;
int serno, count = 0, rc;
rc = eeprom_probe (dev_addr, 0);
if (rc > 0) {
printf ("*** probe for eeprom failed with code %d\n", rc);
return (0);
}
if (rc < 0)
return (rc);
sprintf (prompt, "Enter %s board serial number: ", label);
if ((dir = getenv ("bddb_cfgdir")) == NULL)
dir = def_bddb_cfgdir;
for (;;) {
int rc;
if (hymod_eeprom_load (which, ep))
return (1);
printf ("*** %s board EEPROM contents are %sinvalid\n",
label, count == 0 ? "" : "STILL ");
puts ("*** will fetch from server (Ctrl-C to abort)\n");
serno = hymod_get_serno (prompt);
if (serno < 0) {
if (serno == -1)
puts ("\n*** interrupted!");
else
puts ("\n*** timeout!");
puts (" - ignoring eeprom contents\n");
return (0);
}
sprintf (filename, "%s/%010d.cfg", dir, serno);
printf ("*** fetching %s board EEPROM contents from server\n",
label);
rc = hymod_eeprom_fetch (which, filename, CONFIG_SYS_LOAD_ADDR);
if (rc == 0) {
puts ("*** fetch failed - ignoring eeprom contents\n");
return (0);
}
count++;
}
}

221
board/hymod/env.c
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@ -1,221 +0,0 @@
/*
* (C) Copyright 2003
* Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/ctype.h>
DECLARE_GLOBAL_DATA_PTR;
/* imports from fetch.c */
extern int fetch_and_parse (char *, ulong, int (*)(uchar *, uchar *));
/* this is relative to the root of the server's tftp directory */
static char *def_global_env_path = "/hymod/global_env";
static int
env_callback (uchar *name, uchar *value)
{
hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
char ov[CONFIG_SYS_CBSIZE], nv[CONFIG_SYS_CBSIZE], *p, *q, *nn, c, *curver, *newver;
int override = 1, append = 0, remove = 0, nnl, ovl, nvl;
nn = (char *)name;
if (*nn == '-') {
override = 0;
nn++;
}
while (isblank(*nn))
nn++;
if ((nnl = strlen (nn)) == 0) {
printf ("Empty name in global env file\n");
return (0);
}
if ((c = nn[nnl - 1]) == '+' || c == '-') {
if (c == '+')
append = 1;
else
remove = 1;
nn[--nnl] = '\0';
}
while (nnl > 0 && isblank(nn[nnl - 1]))
nn[--nnl] = '\0';
if (nnl == 0) {
printf ("Empty name in global env file\n");
return (0);
}
p = (char *)value;
q = nv;
while (isblank(*p))
p++;
nvl = strlen (p);
while (nvl > 0 && isblank(p[nvl - 1]))
p[--nvl] = '\0';
while ((*q = *p++) != '\0') {
if (*q == '%') {
switch (*p++) {
case '\0': /* whoops - back up */
p--;
break;
case '%': /* a single percent character */
q++;
break;
case 's': /* main board serial number as string */
q += sprintf (q, "%010lu",
cp->main.eeprom.serno);
break;
case 'S': /* main board serial number as number */
q += sprintf (q, "%lu", cp->main.eeprom.serno);
break;
default: /* ignore any others */
break;
}
}
else
q++;
}
if ((nvl = q - nv) == 0) {
setenv (nn, NULL);
return (1);
}
if ((curver = getenv ("global_env_version")) == NULL)
curver = "unknown";
if ((newver = getenv ("new_genv_version")) == NULL || \
strcmp (curver, newver) == 0) {
if (strcmp (nn, "version") == 0)
setenv ("new_genv_version", nv);
return (1);
}
if ((p = getenv (nn)) != NULL) {
strcpy (ov, p);
ovl = strlen (ov);
if (append) {
if (strstr (ov, nv) == NULL) {
printf ("Appending '%s' to env var '%s'\n",
nv, nn);
while (nvl >= 0) {
nv[ovl + 1 + nvl] = nv[nvl];
nvl--;
}
nv[ovl] = ' ';
while (--ovl >= 0)
nv[ovl] = ov[ovl];
setenv (nn, nv);
}
return (1);
}
if (remove) {
if (strstr (ov, nv) != NULL) {
printf ("Removing '%s' from env var '%s'\n",
nv, nn);
while ((p = strstr (ov, nv)) != NULL) {
q = p + nvl;
if (*q == ' ')
q++;
strcpy(p, q);
}
setenv (nn, ov);
}
return (1);
}
if (!override || strcmp (ov, nv) == 0)
return (1);
printf ("Re-setting env cmd '%s' from '%s' to '%s'\n",
nn, ov, nv);
}
else
printf ("Setting env cmd '%s' to '%s'\n", nn, nv);
setenv (nn, nv);
return (1);
}
void
hymod_check_env (void)
{
char *p, *path, *curver, *newver;
int firsttime = 0, needsave = 0;
if (getenv ("global_env_loaded") == NULL) {
puts ("*** global environment has never been loaded\n");
puts ("*** fetching from server");
firsttime = 1;
}
else if ((p = getenv ("always_check_env")) != NULL &&
strcmp (p, "yes") == 0)
puts ("*** checking for updated global environment");
else
return;
puts (" (Control-C to Abort)\n");
if ((path = getenv ("global_env_path")) == NULL || *path == '\0')
path = def_global_env_path;
if (fetch_and_parse (path, CONFIG_SYS_LOAD_ADDR, env_callback) == 0) {
puts ("*** Fetch of global environment failed!\n");
return;
}
if ((newver = getenv ("new_genv_version")) == NULL) {
puts ("*** Version number not set - contents ignored!\n");
return;
}
if ((curver = getenv ("global_env_version")) == NULL || \
strcmp (curver, newver) != 0) {
setenv ("global_env_version", newver);
needsave = 1;
}
else
printf ("*** Global environment up-to-date (ver %s)\n", curver);
setenv ("new_genv_version", NULL);
if (firsttime) {
setenv ("global_env_loaded", "yes");
needsave = 1;
}
if (needsave)
puts ("\n*** Remember to run the 'saveenv' "
"command to save the changes\n\n");
}

91
board/hymod/fetch.c
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@ -1,91 +0,0 @@
/*
* (C) Copyright 2001
* Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <net.h>
/* imports from input.c */
extern int hymod_get_ethaddr (void);
int
fetch_and_parse (char *fn, ulong addr, int (*cback)(uchar *, uchar *))
{
char *ethaddr;
uchar *fp, *efp;
int rc, count = 0;
while ((ethaddr = getenv ("ethaddr")) == NULL || *ethaddr == '\0') {
printf ("*** Ethernet address is%s not set\n",
count == 0 ? "" : " STILL");
if ((rc = hymod_get_ethaddr ()) < 0) {
if (rc == -1)
puts ("\n*** interrupted!");
else
puts ("\n*** timeout!");
printf (" - fetch of '%s' aborted\n", fn);
return (0);
}
count++;
}
copy_filename (BootFile, fn, sizeof (BootFile));
load_addr = addr;
NetBootFileXferSize = 0;
if (NetLoop(TFTPGET) == 0) {
printf ("tftp transfer of file '%s' failed\n", fn);
return (0);
}
if (NetBootFileXferSize == 0) {
printf ("can't determine size of file '%s'\n", fn);
return (0);
}
fp = (uchar *)load_addr;
efp = fp + NetBootFileXferSize;
do {
uchar *name, *value;
if (*fp == '#' || *fp == '\n') {
/* skip this line */
while (fp < efp && *fp++ != '\n')
;
continue;
}
name = fp;
while (fp < efp && *fp != '=' && *fp != '\n')
fp++;
if (fp >= efp)
break;
if (*fp == '\n') {
fp++;
continue;
}
*fp++ = '\0';
value = fp;
while (fp < efp && *fp != '\n')
fp++;
if (fp[-1] == '\r')
fp[-1] = '\0';
*fp++ = '\0'; /* ok if we go off the end here */
if ((*cback)(name, value) == 0)
return (0);
} while (fp < efp);
return (1);
}

490
board/hymod/flash.c
View File

@ -1,490 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Hacked for the Hymod board by Murray.Jensen@csiro.au, 20-Oct-00
*/
#include <common.h>
#include <mpc8260.h>
#include <board/hymod/flash.h>
flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
/*-----------------------------------------------------------------------
* Protection Flags:
*/
#define FLAG_PROTECT_SET 0x01
#define FLAG_PROTECT_CLEAR 0x02
/*-----------------------------------------------------------------------
*/
/*
* probe for flash bank at address "base" and store info about it
* in the flash_info entry "fip". Fatal error if nothing there.
*/
static void
bank_probe (flash_info_t *fip, volatile bank_addr_t base)
{
volatile bank_addr_t addr;
bank_word_t word;
int i;
/* reset the flash */
*base = BANK_CMD_RST;
/* put flash into read id mode */
*base = BANK_CMD_RD_ID;
/* check the manufacturer id - must be intel */
word = *BANK_REG_MAN_CODE (base);
if (word != BANK_FILL_WORD (INTEL_MANUFACT&0xff))
panic ("\nbad manufacturer's code (0x%08lx) at addr 0x%08lx",
(unsigned long)word, (unsigned long)base);
/* check the device id */
word = *BANK_REG_DEV_CODE (base);
switch (word) {
case BANK_FILL_WORD (INTEL_ID_28F320J5&0xff):
fip->flash_id = FLASH_MAN_INTEL | FLASH_28F320J5;
fip->sector_count = 32;
break;
case BANK_FILL_WORD (INTEL_ID_28F640J5&0xff):
fip->flash_id = FLASH_MAN_INTEL | FLASH_28F640J5;
fip->sector_count = 64;
break;
case BANK_FILL_WORD (INTEL_ID_28F320J3A&0xff):
fip->flash_id = FLASH_MAN_INTEL | FLASH_28F320J3A;
fip->sector_count = 32;
break;
case BANK_FILL_WORD (INTEL_ID_28F640J3A&0xff):
fip->flash_id = FLASH_MAN_INTEL | FLASH_28F640J3A;
fip->sector_count = 64;
break;
case BANK_FILL_WORD (INTEL_ID_28F128J3A&0xff):
fip->flash_id = FLASH_MAN_INTEL | FLASH_28F128J3A;
fip->sector_count = 128;
break;
default:
panic ("\nbad device code (0x%08lx) at addr 0x%08lx",
(unsigned long)word, (unsigned long)base);
}
if (fip->sector_count >= CONFIG_SYS_MAX_FLASH_SECT)
panic ("\ntoo many sectors (%d) in flash at address 0x%08lx",
fip->sector_count, (unsigned long)base);
addr = base;
for (i = 0; i < fip->sector_count; i++) {
fip->start[i] = (unsigned long)addr;
fip->protect[i] = 0;
addr = BANK_ADDR_NEXT_BLK (addr);
}
fip->size = (bank_size_t)addr - (bank_size_t)base;
/* reset the flash */
*base = BANK_CMD_RST;
}
static void
bank_reset (flash_info_t *info, int sect)
{
volatile bank_addr_t addr = (bank_addr_t)info->start[sect];
#ifdef FLASH_DEBUG
printf ("writing reset cmd to addr 0x%08lx\n", (unsigned long)addr);
#endif
*addr = BANK_CMD_RST;
}
static void
bank_erase_init (flash_info_t *info, int sect)
{
volatile bank_addr_t addr = (bank_addr_t)info->start[sect];
int flag;
#ifdef FLASH_DEBUG
printf ("erasing sector %d, addr = 0x%08lx\n",
sect, (unsigned long)addr);
#endif
/* Disable intrs which might cause a timeout here */
flag = disable_interrupts ();
#ifdef FLASH_DEBUG
printf ("writing erase cmd to addr 0x%08lx\n", (unsigned long)addr);
#endif
*addr = BANK_CMD_ERASE1;
*addr = BANK_CMD_ERASE2;
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts ();
}
static int
bank_erase_poll (flash_info_t *info, int sect)
{
volatile bank_addr_t addr = (bank_addr_t)info->start[sect];
bank_word_t stat = *addr;
#ifdef FLASH_DEBUG
printf ("checking status at addr 0x%08lx [0x%08lx]\n",
(unsigned long)addr, (unsigned long)stat);
#endif
if ((stat & BANK_STAT_RDY) == BANK_STAT_RDY) {
if ((stat & BANK_STAT_ERR) != 0) {
printf ("failed on sector %d [0x%08lx] at "
"address 0x%08lx\n", sect,
(unsigned long)stat, (unsigned long)addr);
*addr = BANK_CMD_CLR_STAT;
return (-1);
}
else
return (1);
}
else
return (0);
}
static int
bank_write_word (volatile bank_addr_t addr, bank_word_t value)
{
bank_word_t stat;
ulong start;
int flag, retval;
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts ();
*addr = BANK_CMD_PROG;
*addr = value;
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts ();
retval = 0;
/* data polling for D7 */
start = get_timer (0);
do {
if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
retval = 1;
goto done;
}
stat = *addr;
} while ((stat & BANK_STAT_RDY) != BANK_STAT_RDY);
if ((stat & BANK_STAT_ERR) != 0) {
printf ("flash program failed [0x%08lx] at address 0x%08lx\n",
(unsigned long)stat, (unsigned long)addr);
*addr = BANK_CMD_CLR_STAT;
retval = 3;
}
done:
/* reset to read mode */
*addr = BANK_CMD_RST;
return (retval);
}
/*-----------------------------------------------------------------------
*/
unsigned long
flash_init (void)
{
int i;
/* Init: no FLASHes known */
for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
bank_probe (&flash_info[0], (bank_addr_t)CONFIG_SYS_FLASH_BASE);
/*
* protect monitor and environment sectors
*/
#if CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
(void)flash_protect (FLAG_PROTECT_SET,
CONFIG_SYS_MONITOR_BASE,
CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
&flash_info[0]);
#endif
#if defined(CONFIG_SYS_FLASH_ENV_ADDR)
(void)flash_protect (FLAG_PROTECT_SET,
CONFIG_SYS_FLASH_ENV_ADDR,
#if defined(CONFIG_SYS_FLASH_ENV_BUF)
CONFIG_SYS_FLASH_ENV_ADDR + CONFIG_SYS_FLASH_ENV_BUF - 1,
#else
CONFIG_SYS_FLASH_ENV_ADDR + CONFIG_SYS_FLASH_ENV_SIZE - 1,
#endif
&flash_info[0]);
#endif
return flash_info[0].size;
}
/*-----------------------------------------------------------------------
*/
void
flash_print_info (flash_info_t *info)
{
int i;
if (info->flash_id == FLASH_UNKNOWN) {
printf ("missing or unknown FLASH type\n");
return;
}
switch (info->flash_id & FLASH_VENDMASK) {
case FLASH_MAN_INTEL: printf ("INTEL "); break;
default: printf ("Unknown Vendor "); break;
}
switch (info->flash_id & FLASH_TYPEMASK) {
case FLASH_28F320J5: printf ("28F320J5 (32 Mbit, 2 x 16bit)\n");
break;
case FLASH_28F640J5: printf ("28F640J5 (64 Mbit, 2 x 16bit)\n");
break;
case FLASH_28F320J3A: printf ("28F320J3A (32 Mbit, 2 x 16bit)\n");
break;
case FLASH_28F640J3A: printf ("28F640J3A (64 Mbit, 2 x 16bit)\n");
break;
case FLASH_28F128J3A: printf ("28F320J3A (128 Mbit, 2 x 16bit)\n");
break;
default: printf ("Unknown Chip Type\n");
break;
}
printf (" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
printf (" Sector Start Addresses:");
for (i=0; i<info->sector_count; ++i) {
if ((i % 5) == 0)
printf ("\n ");
printf (" %08lX%s",
info->start[i],
info->protect[i] ? " (RO)" : " "
);
}
printf ("\n");
return;
}
/*
* The following code cannot be run from FLASH!
*/
/*-----------------------------------------------------------------------
*/
int
flash_erase (flash_info_t *info, int s_first, int s_last)
{
int prot, sect, haderr;
ulong start, now, last;
int rcode = 0;
#ifdef FLASH_DEBUG
printf ("\nflash_erase: erase %d sectors (%d to %d incl.) from\n"
" Bank # %d: ", s_last - s_first + 1, s_first, s_last,
(info - flash_info) + 1);
flash_print_info (info);
#endif
if ((s_first < 0) || (s_first > s_last)) {
if (info->flash_id == FLASH_UNKNOWN) {
printf ("- missing\n");
} else {
printf ("- no sectors to erase\n");
}
return 1;
}
prot = 0;
for (sect = s_first; sect <= s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot) {
printf ("- Warning: %d protected sector%s will not be erased\n",
prot, (prot > 1 ? "s" : ""));
}
start = get_timer (0);
last = 0;
haderr = 0;
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
ulong estart;
int sectdone;
bank_erase_init (info, sect);
/* wait at least 80us - let's wait 1 ms */
udelay (1000);
estart = get_timer (start);
do {
now = get_timer (start);
if (now - estart > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout (sect %d)\n", sect);
haderr = 1;
rcode = 1;
break;
}
#ifndef FLASH_DEBUG
/* show that we're waiting */
if ((now - last) > 1000) { /* every second */
putc ('.');
last = now;
}
#endif
sectdone = bank_erase_poll (info, sect);
if (sectdone < 0) {
haderr = 1;
rcode = 1;
break;
}
} while (!sectdone);
if (haderr)
break;
}
}
if (haderr > 0)
printf (" failed\n");
else
printf (" done\n");
/* reset to read mode */
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
bank_reset (info, sect);
}
}
return rcode;
}
/*-----------------------------------------------------------------------
* Write a word to Flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
* 3 - Program failed
*/
static int
write_word (flash_info_t *info, ulong dest, ulong data)
{
/* Check if Flash is (sufficiently) erased */
if ((*(ulong *)dest & data) != data)
return (2);
return (bank_write_word ((bank_addr_t)dest, (bank_word_t)data));
}
/*-----------------------------------------------------------------------
* Copy memory to flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
* 3 - Program failed
*/
int
write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
{
ulong cp, wp, data;
int i, l, rc;
wp = (addr & ~3); /* get lower word aligned address */
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
data = 0;
for (i=0, cp=wp; i<l; ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
}
for (; i<4 && cnt>0; ++i) {
data = (data << 8) | *src++;
--cnt;
++cp;
}
for (; cnt==0 && i<4; ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
}
if ((rc = write_word (info, wp, data)) != 0) {
return (rc);
}
wp += 4;
}
/*
* handle word aligned part
*/
while (cnt >= 4) {
data = 0;
for (i=0; i<4; ++i) {
data = (data << 8) | *src++;
}
if ((rc = write_word (info, wp, data)) != 0) {
return (rc);
}
wp += 4;
cnt -= 4;
}
if (cnt == 0) {
return (0);
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
data = (data << 8) | *src++;
--cnt;
}
for (; i<4; ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
}
return (write_word (info, wp, data));
}
/*-----------------------------------------------------------------------
*/

140
board/hymod/flash.h
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@ -1,140 +0,0 @@
/*
* (C) Copyright 2000
* Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*************** DEFINES for Intel StrataFlash FLASH chip ********************/
/* Commands */
#define ISF_CMD_RST 0xFF /* reset flash */
#define ISF_CMD_RD_ID 0x90 /* read the id and lock bits */
#define ISF_CMD_RD_QUERY 0x98 /* read device capabilities */
#define ISF_CMD_RD_STAT 0x70 /* read the status register */
#define ISF_CMD_CLR_STAT 0x50 /* clear the staus register */
#define ISF_CMD_WR_BUF 0xE8 /* clear the staus register */
#define ISF_CMD_PROG 0x40 /* program word command */
#define ISF_CMD_ERASE1 0x20 /* 1st word for block erase */
#define ISF_CMD_ERASE2 0xD0 /* 2nd word for block erase */
#define ISF_CMD_ERASE_SUSP 0xB0 /* suspend block erase */
#define ISF_CMD_LOCK 0x60 /* 1st word for all lock cmds */
#define ISF_CMD_SET_LOCK_BLK 0x01 /* 2nd wrd set block lock bit */
#define ISF_CMD_SET_LOCK_MSTR 0xF1 /* 2nd wrd set master lck bit */
#define ISF_CMD_CLR_LOCK_BLK 0xD0 /* 2nd wrd clear blk lck bit */
/* status register bits */
#define ISF_STAT_DPS 0x02 /* Device Protect Status */
#define ISF_STAT_VPPS 0x08 /* VPP Status */
#define ISF_STAT_PSLBS 0x10 /* Program+Set Lock Bit Stat */
#define ISF_STAT_ECLBS 0x20 /* Erase+Clr Lock Bit Stat */
#define ISF_STAT_ESS 0x40 /* Erase Suspend Status */
#define ISF_STAT_RDY 0x80 /* WSM Mach Status, 1=rdy */
#define ISF_STAT_ERR (ISF_STAT_VPPS | ISF_STAT_DPS | \
ISF_STAT_ECLBS | ISF_STAT_PSLBS)
/* register addresses, valid only following an ISF_CMD_RD_ID command */
#define ISF_REG_MAN_CODE 0x00 /* manufacturer code */
#define ISF_REG_DEV_CODE 0x01 /* device code */
#define ISF_REG_BLK_LCK 0x02 /* block lock configuration */
#define ISF_REG_MST_LCK 0x03 /* master lock configuration */
/********************** DEFINES for Hymod Flash ******************************/
/*
* this code requires that the flash on any Hymod board appear as a bank
* of two (identical) 16bit Intel StrataFlash chips with 64Kword erase
* sectors (or blocks), running in x16 bit mode and connected side-by-side
* to make a 32-bit wide bus.
*/
typedef unsigned long bank_word_t;
typedef bank_word_t bank_blk_t[64 * 1024];
#define BANK_FILL_WORD(b) (((bank_word_t)(b) << 16) | (bank_word_t)(b))
#ifdef EXAMPLE
/* theoretically the following examples should also work */
/* one flash chip in x8 mode with 128Kword sectors and 8bit bus */
typedef unsigned char bank_word_t;
typedef bank_word_t bank_blk_t[128 * 1024];
#define BANK_FILL_WORD(b) ((bank_word_t)(b))
/* four flash chips in x16 mode with 32Kword sectors and 64bit bus */
typedef unsigned long long bank_word_t;
typedef bank_word_t bank_blk_t[32 * 1024];
#define BANK_FILL_WORD(b) ( \
((bank_word_t)(b) << 48) \
((bank_word_t)(b) << 32) \
((bank_word_t)(b) << 16) \
((bank_word_t)(b) << 0) \
)
#endif /* EXAMPLE */
/* the sizes of these two types should probably be the same */
typedef bank_word_t *bank_addr_t;
typedef unsigned long bank_size_t;
/* align bank addresses and sizes to bank word boundaries */
#define BANK_ADDR_WORD_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \
& ~(sizeof (bank_word_t) - 1)))
#define BANK_SIZE_WORD_ALIGN(s) (((bank_size_t)(s) + sizeof (bank_word_t) - 1) \
& ~(sizeof (bank_word_t) - 1))
/* align bank addresses and sizes to bank block boundaries */
#define BANK_ADDR_BLK_ALIGN(a) ((bank_addr_t)((bank_size_t)(a) \
& ~(sizeof (bank_blk_t) - 1)))
#define BANK_SIZE_BLK_ALIGN(s) (((bank_size_t)(s) + sizeof (bank_blk_t) - 1) \
& ~(sizeof (bank_blk_t) - 1))
/* add an offset to a bank address */
#define BANK_ADDR_OFFSET(a, o) ((bank_addr_t)((bank_size_t)(a) + \
(bank_size_t)(o)))
/* adjust a bank address to start of next word, block or bank */
#define BANK_ADDR_NEXT_WORD(a) BANK_ADDR_OFFSET(BANK_ADDR_WORD_ALIGN(a), \
sizeof (bank_word_t))
#define BANK_ADDR_NEXT_BLK(a) BANK_ADDR_OFFSET(BANK_ADDR_BLK_ALIGN(a), \
sizeof (bank_blk_t))
/* get bank address of register r given a bank base address a and block num b */
#define BANK_ADDR_REG(a, b, r) BANK_ADDR_OFFSET(BANK_ADDR_OFFSET((a), \
(bank_size_t)(b) * sizeof (bank_blk_t)), \
(bank_size_t)(r) * sizeof (bank_word_t))
/* make a bank word value for each StrataFlash value */
/* Commands */
#define BANK_CMD_RST BANK_FILL_WORD(ISF_CMD_RST)
#define BANK_CMD_RD_ID BANK_FILL_WORD(ISF_CMD_RD_ID)
#define BANK_CMD_RD_STAT BANK_FILL_WORD(ISF_CMD_RD_STAT)
#define BANK_CMD_CLR_STAT BANK_FILL_WORD(ISF_CMD_CLR_STAT)
#define BANK_CMD_ERASE1 BANK_FILL_WORD(ISF_CMD_ERASE1)
#define BANK_CMD_ERASE2 BANK_FILL_WORD(ISF_CMD_ERASE2)
#define BANK_CMD_PROG BANK_FILL_WORD(ISF_CMD_PROG)
#define BANK_CMD_LOCK BANK_FILL_WORD(ISF_CMD_LOCK)
#define BANK_CMD_SET_LOCK_BLK BANK_FILL_WORD(ISF_CMD_SET_LOCK_BLK)
#define BANK_CMD_SET_LOCK_MSTR BANK_FILL_WORD(ISF_CMD_SET_LOCK_MSTR)
#define BANK_CMD_CLR_LOCK_BLK BANK_FILL_WORD(ISF_CMD_CLR_LOCK_BLK)
/* status register bits */
#define BANK_STAT_DPS BANK_FILL_WORD(ISF_STAT_DPS)
#define BANK_STAT_PSS BANK_FILL_WORD(ISF_STAT_PSS)
#define BANK_STAT_VPPS BANK_FILL_WORD(ISF_STAT_VPPS)
#define BANK_STAT_PSLBS BANK_FILL_WORD(ISF_STAT_PSLBS)
#define BANK_STAT_ECLBS BANK_FILL_WORD(ISF_STAT_ECLBS)
#define BANK_STAT_ESS BANK_FILL_WORD(ISF_STAT_ESS)
#define BANK_STAT_RDY BANK_FILL_WORD(ISF_STAT_RDY)
#define BANK_STAT_ERR BANK_FILL_WORD(ISF_STAT_ERR)
/* make a bank register address for each StrataFlash register address */
#define BANK_REG_MAN_CODE(a) BANK_ADDR_REG((a), 0, ISF_REG_MAN_CODE)
#define BANK_REG_DEV_CODE(a) BANK_ADDR_REG((a), 0, ISF_REG_DEV_CODE)
#define BANK_REG_BLK_LCK(a, b) BANK_ADDR_REG((a), (b), ISF_REG_BLK_LCK)
#define BANK_REG_MST_LCK(a) BANK_ADDR_REG((a), 0, ISF_REG_MST_LCK)

145
board/hymod/global_env
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@ -1,145 +0,0 @@
# DONT FORGET TO CHANGE THE "version" VAR BELOW IF YOU MAKE CHANGES TO THIS FILE
# (C) Copyright 2001
# Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
#
# SPDX-License-Identifier: GPL-2.0+
#
# global_env
#
# file used by Hymod boards to initialise the u-boot non-volatile
# environment when u-boot is first run (it determines this by the
# absence of the environment variable "global_env_loaded")
#
# format of this file is:
#
# 1. blank lines and lines beginning with '#' are ignored
# 2. all other lines must have the form <name>=<value>
# 3. if a percent appears anywhere, it is replaced like so:
#
# %s serial number of the main board (10 digit zero filled)
# %S serial number of the main board (plain number)
# %% a percentage character
# ... otherwise the %x is discarded
#
# if first character in <name> is a dash ('-'), then an existing env var
# will not be overwritten (the dash is removed). i.e. it is only set if
# it does not exist
#
# if last character in <name> is a plus ('+'), then <value> will be appended
# to any existing env var (the plus is ignored). Duplicates of <value> are
# removed.
#
# similarly, if the last character in <name> is a minus ('-'), then any
# occurences of <value> in the current value of <name> will removed (the
# minus is ignored).
#
# leading and trailing whitespace is removed in both <name> and <value>
# (after processing any initial or final plus/minus in <name>).
#
# MISCELLANEOUS PARAMETERS
# version must always come first
version=4
# set the ip address based on the main board serial number
ipaddr=192.168.1.%S
serverip=192.168.1.254
# stop auto execute after tftp (not a very good name really)
autostart=no
# setting this to "yes" forces the global_env file to be loaded and processed
# if the current version is different to the version in the file
always_check_env=no
# BOOTING COMMANDS AND PARAMETERS
# command to run when "auto-booting"
bootcmd=bootm 40080000
# how long the "countdown" to automatically running "bootcmd" is
bootdelay=2
# how long before it "times out" console input and attempts to run "bootcmd"
bootretry=5
# arguments passed to the boot program (i.e. linux kernel) via register 6
# the linux kernel (v2.4) uses the following registers:
# r3 - address of board information structure
# r4 - address of initial ramdisk image (0 means no initrd)
# r5 - size of initial ramdisk image
# r6 - address of command line string
-bootargs=root=/dev/mtdblock5 rootfstype=squashfs ro
# these four are for hymod linux integrated into our Sun network
bootargs+=serialno=%S
bootargs+=nisclient nisdomain=mlb.dmt.csiro.au nissrvadr=138.194.112.4
bootargs+=nfsclient
bootargs+=automount
# start a web server by default
bootargs+=webserver
# give negotiation time to finish
bootargs+=netsleep=5
# then our ciscos don't pass packets for 25-30 secs after that, so
# pinging the server until it responds prevents network connections
# from failing...
bootargs+=netping
# these are old bootargs - we don't need them anymore
bootargs-=preload=unix,i2c-cpm,i2c-dev
bootargs-=ramdisk_size=32768
bootargs-=ramdisk_size=24576
# FLASH MANIPULATION COMMANDS
#
# 16M flash, 64 x 256K sectors, mapped at address 0x40000000
#
# Sector(s) Address Size Description
#
# 0 - 0 0x40000000 256K boot code
# 1 - 1 0x40040000 256K non volatile environment
# 2 - 4 0x40080000 768K linux kernel image
# 5 - 7 0x40140000 768K alternate linux kernel image
# 8 - 47 0x40200000 10M linux initial ramdisk image
# 48 - 63 0x40c00000 4M ramdisk image for applications
#
fetchboot=tftp 100000 /hymod/u-boot.bin
eraseboot=protect off 1:0 ; erase 1:0 ; protect on 1:0
copyboot=protect off 1:0 ; cp.b 100000 40000000 40000 ; protect on 1:0
cmpboot=cmp.b 100000 40000000 40000
newboot=run fetchboot eraseboot copyboot cmpboot
fetchlinux=tftp 100000 /hymod/linux.bin
eraselinux=erase 1:2-4
copylinux=cp.b 100000 40080000 ${filesize}
cmplinux=cmp.b 100000 40080000 ${filesize}
newlinux=run fetchlinux eraselinux copylinux cmplinux
fetchaltlinux=tftp 100000 /hymod/altlinux.bin
erasealtlinux=erase 1:5-7
copyaltlinux=cp.b 100000 40140000 ${filesize}
cmpaltlinux=cmp.b 100000 40140000 ${filesize}
newaltlinux=run fetchaltlinux erasealtlinux copyaltlinux cmpaltlinux
fetchroot=tftp 100000 /hymod/root.bin
eraseroot=erase 1:8-47
copyroot=cp.b 100000 40200000 ${filesize}
cmproot=cmp.b 100000 40200000 ${filesize}
newroot=run fetchroot eraseroot copyroot cmproot
fetchard=tftp 100000 /hymod/apprd.bin
eraseard=erase 1:48-63
copyard=cp.b 100000 40c00000 ${filesize}
cmpard=cmp.b 100000 40c00000 ${filesize}
newapprd=run fetchard eraseard copyard cmpard
# pass above map to linux mtd driver
bootargs+=mtdparts=phys:256k(u-boot),256k(u-boot-env),768k(linux),768k(altlinux),10m(root),4m(hymod)

521
board/hymod/hymod.c
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/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Hacked for the Hymod board by Murray.Jensen@csiro.au, 20-Oct-00
*/
#include <common.h>
#include <bootretry.h>
#include <cli.h>
#include <mpc8260.h>
#include <mpc8260_irq.h>
#include <ioports.h>
#include <i2c.h>
#include <asm/iopin_8260.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/* imports from eeprom.c */
extern int hymod_eeprom_read (int, hymod_eeprom_t *);
extern void hymod_eeprom_print (hymod_eeprom_t *);
/* imports from env.c */
extern void hymod_check_env (void);
/* ------------------------------------------------------------------------- */
/*
* I/O Port configuration table
*
* if conf is 1, then that port pin will be configured at boot time
* according to the five values podr/pdir/ppar/psor/pdat for that entry
*/
const iop_conf_t iop_conf_tab[4][32] = {
/* Port A configuration */
{
/* cnf par sor dir odr dat */
{ 1, 1, 1, 0, 0, 0 }, /* PA31: FCC1 MII COL */
{ 1, 1, 1, 0, 0, 0 }, /* PA30: FCC1 MII CRS */
{ 1, 1, 1, 1, 0, 0 }, /* PA29: FCC1 MII TX_ER */
{ 1, 1, 1, 1, 0, 0 }, /* PA28: FCC1 MII TX_EN */
{ 1, 1, 1, 0, 0, 0 }, /* PA27: FCC1 MII RX_DV */
{ 1, 1, 1, 0, 0, 0 }, /* PA26: FCC1 MII RX_ER */
{ 1, 0, 0, 1, 0, 0 }, /* PA25: FCC2 MII MDIO */
{ 1, 0, 0, 1, 0, 0 }, /* PA24: FCC2 MII MDC */
{ 1, 0, 0, 1, 0, 0 }, /* PA23: FCC3 MII MDIO */
{ 1, 0, 0, 1, 0, 0 }, /* PA22: FCC3 MII MDC */
{ 1, 1, 0, 1, 0, 0 }, /* PA21: FCC1 MII TxD[3] */
{ 1, 1, 0, 1, 0, 0 }, /* PA20: FCC1 MII TxD[2] */
{ 1, 1, 0, 1, 0, 0 }, /* PA19: FCC1 MII TxD[1] */
{ 1, 1, 0, 1, 0, 0 }, /* PA18: FCC1 MII TxD[0] */
{ 1, 1, 0, 0, 0, 0 }, /* PA17: FCC1 MII RxD[3] */
{ 1, 1, 0, 0, 0, 0 }, /* PA16: FCC1 MII RxD[2] */
{ 1, 1, 0, 0, 0, 0 }, /* PA15: FCC1 MII RxD[1] */
{ 1, 1, 0, 0, 0, 0 }, /* PA14: FCC1 MII RxD[0] */
{ 1, 0, 0, 1, 0, 0 }, /* PA13: FCC1 MII MDIO */
{ 1, 0, 0, 1, 0, 0 }, /* PA12: FCC1 MII MDC */
{ 1, 0, 0, 1, 0, 0 }, /* PA11: SEL_CD */
{ 1, 0, 0, 0, 0, 0 }, /* PA10: FLASH STS1 */
{ 1, 0, 0, 0, 0, 0 }, /* PA09: FLASH STS0 */
{ 1, 0, 0, 0, 0, 0 }, /* PA08: FLASH ~PE */
{ 1, 0, 0, 0, 0, 0 }, /* PA07: WATCH ~HRESET */
{ 1, 0, 0, 0, 1, 0 }, /* PA06: VC DONE */
{ 1, 0, 0, 1, 1, 0 }, /* PA05: VC INIT */
{ 1, 0, 0, 1, 0, 0 }, /* PA04: VC ~PROG */
{ 1, 0, 0, 1, 0, 0 }, /* PA03: VM ENABLE */
{ 1, 0, 0, 0, 1, 0 }, /* PA02: VM DONE */
{ 1, 0, 0, 1, 1, 0 }, /* PA01: VM INIT */
{ 1, 0, 0, 1, 0, 0 } /* PA00: VM ~PROG */
},
/* Port B configuration */
{
/* cnf par sor dir odr dat */
{ 1, 1, 0, 1, 0, 0 }, /* PB31: FCC2 MII TX_ER */
{ 1, 1, 0, 0, 0, 0 }, /* PB30: FCC2 MII RX_DV */
{ 1, 1, 1, 1, 0, 0 }, /* PB29: FCC2 MII TX_EN */
{ 1, 1, 0, 0, 0, 0 }, /* PB28: FCC2 MII RX_ER */
{ 1, 1, 0, 0, 0, 0 }, /* PB27: FCC2 MII COL */
{ 1, 1, 0, 0, 0, 0 }, /* PB26: FCC2 MII CRS */
{ 1, 1, 0, 1, 0, 0 }, /* PB25: FCC2 MII TxD[3] */
{ 1, 1, 0, 1, 0, 0 }, /* PB24: FCC2 MII TxD[2] */
{ 1, 1, 0, 1, 0, 0 }, /* PB23: FCC2 MII TxD[1] */
{ 1, 1, 0, 1, 0, 0 }, /* PB22: FCC2 MII TxD[0] */
{ 1, 1, 0, 0, 0, 0 }, /* PB21: FCC2 MII RxD[0] */
{ 1, 1, 0, 0, 0, 0 }, /* PB20: FCC2 MII RxD[1] */
{ 1, 1, 0, 0, 0, 0 }, /* PB19: FCC2 MII RxD[2] */
{ 1, 1, 0, 0, 0, 0 }, /* PB18: FCC2 MII RxD[3] */
{ 1, 1, 0, 0, 0, 0 }, /* PB17: FCC3 MII RX_DV */
{ 1, 1, 0, 0, 0, 0 }, /* PB16: FCC3 MII RX_ER */
{ 1, 1, 0, 1, 0, 0 }, /* PB15: FCC3 MII TX_ER */
{ 1, 1, 0, 1, 0, 0 }, /* PB14: FCC3 MII TX_EN */
{ 1, 1, 0, 0, 0, 0 }, /* PB13: FCC3 MII COL */
{ 1, 1, 0, 0, 0, 0 }, /* PB12: FCC3 MII CRS */
{ 1, 1, 0, 0, 0, 0 }, /* PB11: FCC3 MII RxD[3] */
{ 1, 1, 0, 0, 0, 0 }, /* PB10: FCC3 MII RxD[2] */
{ 1, 1, 0, 0, 0, 0 }, /* PB09: FCC3 MII RxD[1] */
{ 1, 1, 0, 0, 0, 0 }, /* PB08: FCC3 MII RxD[0] */
{ 1, 1, 0, 1, 0, 0 }, /* PB07: FCC3 MII TxD[3] */
{ 1, 1, 0, 1, 0, 0 }, /* PB06: FCC3 MII TxD[2] */
{ 1, 1, 0, 1, 0, 0 }, /* PB05: FCC3 MII TxD[1] */
{ 1, 1, 0, 1, 0, 0 }, /* PB04: FCC3 MII TxD[0] */
{ 0, 0, 0, 0, 0, 0 }, /* PB03: pin doesn't exist */
{ 0, 0, 0, 0, 0, 0 }, /* PB02: pin doesn't exist */
{ 0, 0, 0, 0, 0, 0 }, /* PB01: pin doesn't exist */
{ 0, 0, 0, 0, 0, 0 } /* PB00: pin doesn't exist */
},
/* Port C configuration */
{
/* cnf par sor dir odr dat */
{ 1, 0, 0, 0, 0, 0 }, /* PC31: MEZ ~IACK */
{ 0, 0, 0, 0, 0, 0 }, /* PC30: ? */
{ 1, 1, 0, 0, 0, 0 }, /* PC29: CLK SCCx */
{ 1, 1, 0, 0, 0, 0 }, /* PC28: CLK4 */
{ 1, 1, 0, 0, 0, 0 }, /* PC27: CLK SCCF */
{ 1, 1, 0, 0, 0, 0 }, /* PC26: CLK 32K */
{ 1, 1, 0, 0, 0, 0 }, /* PC25: BRG4/CLK7 */
{ 0, 0, 0, 0, 0, 0 }, /* PC24: ? */
{ 1, 1, 0, 0, 0, 0 }, /* PC23: CLK SCCx */
{ 1, 1, 0, 0, 0, 0 }, /* PC22: FCC1 MII RX_CLK */
{ 1, 1, 0, 0, 0, 0 }, /* PC21: FCC1 MII TX_CLK */
{ 1, 1, 0, 0, 0, 0 }, /* PC20: CLK SCCF */
{ 1, 1, 0, 0, 0, 0 }, /* PC19: FCC2 MII RX_CLK */
{ 1, 1, 0, 0, 0, 0 }, /* PC18: FCC2 MII TX_CLK */
{ 1, 1, 0, 0, 0, 0 }, /* PC17: FCC3 MII RX_CLK */
{ 1, 1, 0, 0, 0, 0 }, /* PC16: FCC3 MII TX_CLK */
{ 1, 0, 0, 0, 0, 0 }, /* PC15: SCC1 UART ~CTS */
{ 1, 0, 0, 0, 0, 0 }, /* PC14: SCC1 UART ~CD */
{ 1, 0, 0, 0, 0, 0 }, /* PC13: SCC2 UART ~CTS */
{ 1, 0, 0, 0, 0, 0 }, /* PC12: SCC2 UART ~CD */
{ 1, 0, 0, 1, 0, 0 }, /* PC11: SCC1 UART ~DTR */
{ 1, 0, 0, 1, 0, 0 }, /* PC10: SCC1 UART ~DSR */
{ 1, 0, 0, 1, 0, 0 }, /* PC09: SCC2 UART ~DTR */
{ 1, 0, 0, 1, 0, 0 }, /* PC08: SCC2 UART ~DSR */
{ 1, 0, 0, 0, 0, 0 }, /* PC07: TEMP ~ALERT */
{ 1, 0, 0, 0, 0, 0 }, /* PC06: FCC3 INT */
{ 1, 0, 0, 0, 0, 0 }, /* PC05: FCC2 INT */
{ 1, 0, 0, 0, 0, 0 }, /* PC04: FCC1 INT */
{ 0, 1, 1, 1, 0, 0 }, /* PC03: SDMA IDMA2 ~DACK */
{ 0, 1, 1, 0, 0, 0 }, /* PC02: SDMA IDMA2 ~DONE */
{ 0, 1, 0, 0, 0, 0 }, /* PC01: SDMA IDMA2 ~DREQ */
{ 1, 1, 0, 1, 0, 0 } /* PC00: BRG7 */
},
/* Port D configuration */
{
/* cnf par sor dir odr dat */
{ 1, 1, 0, 0, 0, 0 }, /* PD31: SCC1 UART RxD */
{ 1, 1, 1, 1, 0, 0 }, /* PD30: SCC1 UART TxD */
{ 1, 0, 0, 1, 0, 0 }, /* PD29: SCC1 UART ~RTS */
{ 1, 1, 0, 0, 0, 0 }, /* PD28: SCC2 UART RxD */
{ 1, 1, 0, 1, 0, 0 }, /* PD27: SCC2 UART TxD */
{ 1, 0, 0, 1, 0, 0 }, /* PD26: SCC2 UART ~RTS */
{ 1, 0, 0, 0, 0, 0 }, /* PD25: SCC1 UART ~RI */
{ 1, 0, 0, 0, 0, 0 }, /* PD24: SCC2 UART ~RI */
{ 1, 0, 0, 1, 0, 0 }, /* PD23: CLKGEN PD */
{ 1, 0, 0, 0, 0, 0 }, /* PD22: USER3 */
{ 1, 0, 0, 0, 0, 0 }, /* PD21: USER2 */
{ 1, 0, 0, 0, 0, 0 }, /* PD20: USER1 */
{ 1, 1, 1, 0, 0, 0 }, /* PD19: SPI ~SEL */
{ 1, 1, 1, 0, 0, 0 }, /* PD18: SPI CLK */
{ 1, 1, 1, 0, 0, 0 }, /* PD17: SPI MOSI */
{ 1, 1, 1, 0, 0, 0 }, /* PD16: SPI MISO */
{ 1, 1, 1, 0, 1, 0 }, /* PD15: I2C SDA */
{ 1, 1, 1, 0, 1, 0 }, /* PD14: I2C SCL */
{ 1, 0, 0, 1, 0, 1 }, /* PD13: TEMP ~STDBY */
{ 1, 0, 0, 1, 0, 1 }, /* PD12: FCC3 ~RESET */
{ 1, 0, 0, 1, 0, 1 }, /* PD11: FCC2 ~RESET */
{ 1, 0, 0, 1, 0, 1 }, /* PD10: FCC1 ~RESET */
{ 1, 0, 0, 0, 0, 0 }, /* PD09: PD9 */
{ 1, 0, 0, 0, 0, 0 }, /* PD08: PD8 */
{ 1, 0, 0, 1, 0, 1 }, /* PD07: PD7 */
{ 1, 0, 0, 1, 0, 1 }, /* PD06: PD6 */
{ 1, 0, 0, 1, 0, 1 }, /* PD05: PD5 */
{ 1, 0, 0, 1, 0, 1 }, /* PD04: PD4 */
{ 0, 0, 0, 0, 0, 0 }, /* PD03: pin doesn't exist */
{ 0, 0, 0, 0, 0, 0 }, /* PD02: pin doesn't exist */
{ 0, 0, 0, 0, 0, 0 }, /* PD01: pin doesn't exist */
{ 0, 0, 0, 0, 0, 0 } /* PD00: pin doesn't exist */
}
};
/* ------------------------------------------------------------------------- */
/*
* AMI FS6377 Clock Generator configuration table
*
* the "fs6377_regs[]" table entries correspond to FS6377 registers
* 0 - 15 (total of 16 bytes).
*
* the data is written to the FS6377 via the i2c bus using address in
* "fs6377_addr" (address is 7 bits - R/W bit not included).
*
* The fs6377 has four clock outputs: A, B, C and D.
*
* Outputs C and D can each provide two different clock outputs C1/D1 or
* C2/D2 depending on the state of the SEL_CD input which is connected to
* the MPC8260 I/O port pin PA11. PA11 output (SEL_CD input) low (or 0)
* selects C1/D1 and PA11 output (SEL_CD input) high (or 1) selects C2/D2.
*
* PA11 defaults to output low (or 0) in the i/o port config table above.
*
* Output A provides a 100MHz for the High Speed Serial chips. Output B
* provides a 3.6864MHz clock for more accurate asynchronous serial bit
* rates. Output C is routed to the mezzanine connector but is currently
* unused - both C1 and C2 are set to 16MHz. Output D is used by both the
* alt-input and display mezzanine boards for their video chips. The
* alt-input board requires a clock of 24.576MHz and this is available on
* D1 (PA11=SEL_CD=0). The display board requires a clock of 27MHz and this
* is available on D2 (PA11=SEL_CD=1).
*
* So the default is a clock suitable for the alt-input board. PA11 is toggled
* later in misc_init_r(), if a display board is detected.
*/
uchar fs6377_addr = 0x5c;
uchar fs6377_regs[16] = {
12, 75, 64, 25, 144, 128, 25, 192,
0, 16, 135, 192, 224, 64, 64, 192
};
/* ------------------------------------------------------------------------- */
/*
* special board initialisation, after clocks and timebase have been
* set up but before environment and serial are initialised.
*
* added so that very early initialisations can be done using the i2c
* driver (which requires the clocks, to calculate the dividers, and
* the timebase, for udelay())
*/
int
board_postclk_init (void)
{
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
/*
* Initialise the FS6377 clock chip
*
* the secondary address is the register number from where to
* start the write - I want to write all the registers
*
* don't bother checking return status - we have no console yet
* to print it on, nor any RAM to store it in - it will be obvious
* if this doesn't work
*/
(void) i2c_write (fs6377_addr, 0, 1, fs6377_regs,
sizeof (fs6377_regs));
return (0);
}
/* ------------------------------------------------------------------------- */
/*
* Check Board Identity: Hardwired to HYMOD
*/
int
checkboard (void)
{
puts ("Board: HYMOD\n");
return (0);
}
/* ------------------------------------------------------------------------- */
/*
* miscellaneous (early - while running in flash) initialisations.
*/
#define _NOT_USED_ 0xFFFFFFFF
uint upmb_table[] = {
/* Read Single Beat (RSS) - offset 0x00 */
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
/* Read Burst (RBS) - offset 0x08 */
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
/* Write Single Beat (WSS) - offset 0x18 */
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
/* Write Burst (WSS) - offset 0x20 */
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
/* Refresh Timer (PTS) - offset 0x30 */
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
/* Exception Condition (EXS) - offset 0x3c */
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_
};
uint upmc_table[] = {
/* Read Single Beat (RSS) - offset 0x00 */
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
/* Read Burst (RBS) - offset 0x08 */
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
/* Write Single Beat (WSS) - offset 0x18 */
0xF0E00000, 0xF0A00000, 0x00A00000, 0x30A00000,
0xF0F40007, _NOT_USED_, _NOT_USED_, _NOT_USED_,
/* Write Burst (WSS) - offset 0x20 */
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
/* Refresh Timer (PTS) - offset 0x30 */
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
/* Exception Condition (EXS) - offset 0x3c */
_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_
};
int
misc_init_f (void)
{
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8260_t *memctl = &immap->im_memctl;
printf ("UPMs: ");
upmconfig (UPMB, upmb_table, sizeof upmb_table / sizeof upmb_table[0]);
memctl->memc_mbmr = CONFIG_SYS_MBMR;
upmconfig (UPMC, upmc_table, sizeof upmc_table / sizeof upmc_table[0]);
memctl->memc_mcmr = CONFIG_SYS_MCMR;
printf ("configured\n");
return (0);
}
/* ------------------------------------------------------------------------- */
phys_size_t
initdram (int board_type)
{
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8260_t *memctl = &immap->im_memctl;
volatile uchar c = 0, *ramaddr = (uchar *) (CONFIG_SYS_SDRAM_BASE + 0x8);
ulong psdmr = CONFIG_SYS_PSDMR;
int i;
/*
* Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
*
* "At system reset, initialization software must set up the
* programmable parameters in the memory controller banks registers
* (ORx, BRx, P/LSDMR). After all memory parameters are configured,
* system software should execute the following initialization sequence
* for each SDRAM device.
*
* 1. Issue a PRECHARGE-ALL-BANKS command
* 2. Issue eight CBR REFRESH commands
* 3. Issue a MODE-SET command to initialize the mode register
*
* The initial commands are executed by setting P/LSDMR[OP] and
* accessing the SDRAM with a single-byte transaction."
*
* The appropriate BRx/ORx registers have already been set when we
* get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE.
*/
memctl->memc_psrt = CONFIG_SYS_PSRT;
memctl->memc_mptpr = CONFIG_SYS_MPTPR;
memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
*ramaddr = c;
memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR;
for (i = 0; i < 8; i++)
*ramaddr = c;
memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;
*ramaddr = c;
memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN;
*ramaddr = c;
return (CONFIG_SYS_SDRAM_SIZE << 20);
}
/* ------------------------------------------------------------------------- */
/* miscellaneous initialisations after relocation into ram (misc_init_r) */
/* */
/* loads the data in the main board and mezzanine board eeproms into */
/* the hymod configuration struct stored in the board information area. */
/* */
/* if the contents of either eeprom is invalid, prompts for a serial */
/* number (and an ethernet address if required) then fetches a file */
/* containing information to be stored in the eeprom from the tftp server */
/* (the file name is based on the serial number and a built-in path) */
int
last_stage_init (void)
{
hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
int rc;
/*
* we use the cli_readline() function, but we also want
* command timeout enabled
*/
bootretry_init_cmd_timeout();
memset ((void *) cp, 0, sizeof (*cp));
/* set up main board config info */
rc = hymod_eeprom_read (0, &cp->main.eeprom);
puts ("EEPROM:main...");
if (rc < 0)
puts ("NOT PRESENT\n");
else if (rc == 0)
puts ("INVALID\n");
else {
cp->main.eeprom.valid = 1;
printf ("OK (ver %u)\n", cp->main.eeprom.ver);
hymod_eeprom_print (&cp->main.eeprom);
/*
* hard-wired assumption here: all hymod main boards will have
* one xilinx fpga, with the interrupt line connected to IRQ2
*
* One day, this might be based on the board type
*/
cp->main.xlx[0].mmap.prog.exists = 1;
cp->main.xlx[0].mmap.prog.size = FPGA_MAIN_CFG_SIZE;
cp->main.xlx[0].mmap.prog.base = FPGA_MAIN_CFG_BASE;
cp->main.xlx[0].mmap.reg.exists = 1;
cp->main.xlx[0].mmap.reg.size = FPGA_MAIN_REG_SIZE;
cp->main.xlx[0].mmap.reg.base = FPGA_MAIN_REG_BASE;
cp->main.xlx[0].mmap.port.exists = 1;
cp->main.xlx[0].mmap.port.size = FPGA_MAIN_PORT_SIZE;
cp->main.xlx[0].mmap.port.base = FPGA_MAIN_PORT_BASE;
cp->main.xlx[0].iopins.prog_pin.port = FPGA_MAIN_PROG_PORT;
cp->main.xlx[0].iopins.prog_pin.pin = FPGA_MAIN_PROG_PIN;
cp->main.xlx[0].iopins.prog_pin.flag = 1;
cp->main.xlx[0].iopins.init_pin.port = FPGA_MAIN_INIT_PORT;
cp->main.xlx[0].iopins.init_pin.pin = FPGA_MAIN_INIT_PIN;
cp->main.xlx[0].iopins.init_pin.flag = 1;
cp->main.xlx[0].iopins.done_pin.port = FPGA_MAIN_DONE_PORT;
cp->main.xlx[0].iopins.done_pin.pin = FPGA_MAIN_DONE_PIN;
cp->main.xlx[0].iopins.done_pin.flag = 1;
#ifdef FPGA_MAIN_ENABLE_PORT
cp->main.xlx[0].iopins.enable_pin.port = FPGA_MAIN_ENABLE_PORT;
cp->main.xlx[0].iopins.enable_pin.pin = FPGA_MAIN_ENABLE_PIN;
cp->main.xlx[0].iopins.enable_pin.flag = 1;
#endif
cp->main.xlx[0].irq = FPGA_MAIN_IRQ;
}
/* set up mezzanine board config info */
rc = hymod_eeprom_read (1, &cp->mezz.eeprom);
puts ("EEPROM:mezz...");
if (rc < 0)
puts ("NOT PRESENT\n");
else if (rc == 0)
puts ("INVALID\n");
else {
cp->main.eeprom.valid = 1;
printf ("OK (ver %u)\n", cp->mezz.eeprom.ver);
hymod_eeprom_print (&cp->mezz.eeprom);
}
cp->crc = crc32 (0, (unsigned char *)cp, offsetof (hymod_conf_t, crc));
hymod_check_env ();
return (0);
}
#ifdef CONFIG_SHOW_ACTIVITY
void board_show_activity (ulong timebase)
{
#ifdef CONFIG_SYS_HYMOD_DBLEDS
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
volatile iop8260_t *iop = &immr->im_ioport;
static int shift = 0;
if ((timestamp % CONFIG_SYS_HZ) == 0) {
if (++shift > 3)
shift = 0;
iop->iop_pdatd =
(iop->iop_pdatd & ~0x0f000000) | (1 << (24 + shift));
}
#endif /* CONFIG_SYS_HYMOD_DBLEDS */
}
void show_activity(int arg)
{
}
#endif /* CONFIG_SHOW_ACTIVITY */

305
board/hymod/hymod.h
View File

@ -1,305 +0,0 @@
/*
* (C) Copyright 2001
* Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _HYMOD_H_
#define _HYMOD_H_
#ifdef CONFIG_MPC8260
#include <asm/iopin_8260.h>
#endif
/*
* hymod configuration data - passed by boot code via the board information
* structure (only U-Boot has support for this at the moment)
*
* there are three types of data passed up from the boot monitor. the first
* (type hymod_eeprom_t) is the eeprom data that was read off both the main
* (or mother) board and the mezzanine board (if any). this data defines how
* many Xilinx fpgas are on each board, and their types (among other things).
* the second type of data (type xlx_mmap_t, one per Xilinx fpga) defines where
* in the physical address space the various Xilinx fpga access regions have
* been mapped by the boot rom. the third type of data (type xlx_iopins_t,
* one per Xilinx fpga) defines which io port pins are connected to the various
* signals required to program a Xilinx fpga.
*
* A ram/flash "bank" refers to memory controlled by the same chip select.
*
* the eeprom contents are defined as in technical note #2 - basically,
* a header, zero or more records in no particular order, and a 32 bit crc
* a record is 1 or more type bytes, a length byte and "length" bytes.
*/
#define HYMOD_EEPROM_ID 0xAA /* eeprom id byte */
#define HYMOD_EEPROM_VER 1 /* eeprom contents version (0-127) */
#define HYMOD_EEPROM_SIZE 256 /* number of bytes in the eeprom */
/* eeprom header */
typedef
struct {
unsigned char id; /* eeprom id byte */
unsigned char :1;
unsigned char ver:7; /* eeprom contents version number */
unsigned long len; /* total # of bytes btw hdr and crc */
}
hymod_eehdr_t;
/* maximum number of bytes available for eeprom data records */
#define HYMOD_EEPROM_MAXLEN (HYMOD_EEPROM_SIZE \
- sizeof (hymod_eehdr_t) \
- sizeof (unsigned long))
/* eeprom data record */
typedef
union {
struct {
unsigned char topbit:1;
unsigned char type:7;
unsigned char len;
unsigned char data[1]; /* variable length */
} small;
struct {
unsigned short topbit:1;
unsigned short nxtbit:1;
unsigned short type:14;
unsigned short len;
unsigned char data[1]; /* variable length */
} medium;
struct {
unsigned long topbit:1;
unsigned long nxtbit:1;
unsigned long type:30;
unsigned long len;
unsigned char data[1]; /* variable length */
} large;
}
hymod_eerec_t;
#define HYMOD_EEOFF_MAIN 0x00 /* i2c addr offset for main eeprom */
#define HYMOD_EEOFF_MEZZ 0x04 /* i2c addr offset for mezz eepomr */
/* eeprom record types */
#define HYMOD_EEREC_SERNO 1 /* serial number */
#define HYMOD_EEREC_DATE 2 /* date */
#define HYMOD_EEREC_BATCH 3 /* batch id */
#define HYMOD_EEREC_TYPE 4 /* board type */
#define HYMOD_EEREC_REV 5 /* revision number */
#define HYMOD_EEREC_SDRAM 6 /* sdram sizes */
#define HYMOD_EEREC_FLASH 7 /* flash sizes */
#define HYMOD_EEREC_ZBT 8 /* zbt ram sizes */
#define HYMOD_EEREC_XLXTYP 9 /* Xilinx fpga types */
#define HYMOD_EEREC_XLXSPD 10 /* Xilinx fpga speeds */
#define HYMOD_EEREC_XLXTMP 11 /* Xilinx fpga temperatures */
#define HYMOD_EEREC_XLXGRD 12 /* Xilinx fpga grades */
#define HYMOD_EEREC_CPUTYP 13 /* Motorola CPU type */
#define HYMOD_EEREC_CPUSPD 14 /* CPU speed */
#define HYMOD_EEREC_BUSSPD 15 /* bus speed */
#define HYMOD_EEREC_CPMSPD 16 /* CPM speed */
#define HYMOD_EEREC_HSTYPE 17 /* high-speed serial chip type */
#define HYMOD_EEREC_HSCHIN 18 /* high-speed serial input channels */
#define HYMOD_EEREC_HSCHOUT 19 /* high-speed serial output channels */
/* some dimensions */
#define HYMOD_MAX_BATCH 32 /* max no. of bytes in batch id */
#define HYMOD_MAX_SDRAM 4 /* max sdram "banks" on any board */
#define HYMOD_MAX_FLASH 4 /* max flash "banks" on any board */
#define HYMOD_MAX_ZBT 16 /* max ZBT rams on any board */
#define HYMOD_MAX_XLX 4 /* max Xilinx fpgas on any board */
#define HYMOD_MAX_BYTES 16 /* enough to store any bytes array */
/* board types */
#define HYMOD_BDTYPE_NONE 0 /* information not present */
#define HYMOD_BDTYPE_IO 1 /* I/O main board */
#define HYMOD_BDTYPE_CLP 2 /* CLP main board */
#define HYMOD_BDTYPE_DSP 3 /* DSP main board */
#define HYMOD_BDTYPE_INPUT 4 /* video input mezzanine board */
#define HYMOD_BDTYPE_ALTINPUT 5 /* video input mezzanine board */
#define HYMOD_BDTYPE_DISPLAY 6 /* video display mezzanine board */
#define HYMOD_BDTYPE_MAX 7 /* first invalid value */
/* Xilinx fpga types */
#define HYMOD_XTYP_NONE 0 /* information not present */
#define HYMOD_XTYP_XCV300E 1 /* Xilinx Virtex 300 */
#define HYMOD_XTYP_XCV400E 2 /* Xilinx Virtex 400 */
#define HYMOD_XTYP_XCV600E 3 /* Xilinx Virtex 600 */
#define HYMOD_XTYP_MAX 4 /* first invalid value */
/* Xilinx fpga speeds */
#define HYMOD_XSPD_NONE 0 /* information not present */
#define HYMOD_XSPD_SIX 1
#define HYMOD_XSPD_SEVEN 2
#define HYMOD_XSPD_EIGHT 3
#define HYMOD_XSPD_MAX 4 /* first invalid value */
/* Xilinx fpga temperatures */
#define HYMOD_XTMP_NONE 0 /* information not present */
#define HYMOD_XTMP_COM 1
#define HYMOD_XTMP_IND 2
#define HYMOD_XTMP_MAX 3 /* first invalid value */
/* Xilinx fpga grades */
#define HYMOD_XTMP_NONE 0 /* information not present */
#define HYMOD_XTMP_NORMAL 1
#define HYMOD_XTMP_ENGSAMP 2
#define HYMOD_XTMP_MAX 3 /* first invalid value */
/* CPU types */
#define HYMOD_CPUTYPE_NONE 0 /* information not present */
#define HYMOD_CPUTYPE_MPC8260 1 /* Motorola MPC8260 embedded powerpc */
#define HYMOD_CPUTYPE_MAX 2 /* first invalid value */
/* CPU/BUS/CPM clock speeds */
#define HYMOD_CLKSPD_NONE 0 /* information not present */
#define HYMOD_CLKSPD_33MHZ 1
#define HYMOD_CLKSPD_66MHZ 2
#define HYMOD_CLKSPD_100MHZ 3
#define HYMOD_CLKSPD_133MHZ 4
#define HYMOD_CLKSPD_166MHZ 5
#define HYMOD_CLKSPD_200MHZ 6
#define HYMOD_CLKSPD_MAX 7 /* first invalid value */
/* high speed serial chip types */
#define HYMOD_HSSTYPE_NONE 0 /* information not present */
#define HYMOD_HSSTYPE_AMCC52064 1
#define HYMOD_HSSTYPE_MAX 2 /* first invalid value */
/* a date (yyyy-mm-dd) */
typedef
struct {
unsigned short year;
unsigned char month;
unsigned char day;
}
hymod_date_t;
/* describes a Xilinx fpga */
typedef
struct {
unsigned char type; /* chip type */
unsigned char speed; /* chip speed rating */
unsigned char temp; /* chip temperature rating */
unsigned char grade; /* chip grade */
}
hymod_xlx_t;
/* describes a Motorola embedded processor */
typedef
struct {
unsigned char type; /* CPU type */
unsigned char cpuspd; /* speed of the PowerPC core */
unsigned char busspd; /* speed of the system and 60x bus */
unsigned char cpmspd; /* speed of the CPM co-processor */
}
hymod_mpc_t;
/* info about high-speed (1Gbit) serial interface */
typedef
struct {
unsigned char type; /* high-speed serial chip type */
unsigned char nchin; /* number of input channels mounted */
unsigned char nchout; /* number of output channels mounted */
}
hymod_hss_t;
/*
* this defines the contents of the serial eeprom that exists on every
* hymod board, including mezzanine boards (the serial eeprom will be
* faked for early development boards that don't have one)
*/
typedef
struct {
unsigned char valid:1; /* contents of this struct is valid */
unsigned char ver:7; /* eeprom contents version */
unsigned char bdtype; /* board type */
unsigned char bdrev; /* board revision */
unsigned char batchlen; /* length of batch string below */
unsigned long serno; /* serial number */
hymod_date_t date; /* manufacture date */
unsigned char batch[32]; /* manufacturer specific batch id */
unsigned char nsdram; /* # of ram "banks" */
unsigned char nflash; /* # of flash "banks" */
unsigned char nzbt; /* # of ZBT rams */
unsigned char nxlx; /* # of Xilinx fpgas */
unsigned char sdramsz[HYMOD_MAX_SDRAM]; /* log2 of sdram size */
unsigned char flashsz[HYMOD_MAX_FLASH]; /* log2 of flash size */
unsigned char zbtsz[HYMOD_MAX_ZBT]; /* log2 of ZBT ram size */
hymod_xlx_t xlx[HYMOD_MAX_XLX]; /* Xilinx fpga info */
hymod_mpc_t mpc; /* Motorola MPC CPU info */
hymod_hss_t hss; /* high-speed serial info */
}
hymod_eeprom_t;
/*
* this defines a region in the processor's physical address space
*/
typedef
struct {
unsigned long exists:1; /* 1 if the region exists, 0 if not */
unsigned long size:31; /* size in bytes */
unsigned long base; /* base address */
}
xlx_prgn_t;
/*
* this defines where the various Xilinx fpga access regions are mapped
* into the physical address space of the processor
*/
typedef
struct {
xlx_prgn_t prog; /* program access region */
xlx_prgn_t reg; /* register access region */
xlx_prgn_t port; /* port access region */
}
xlx_mmap_t;
/*
* this defines which 8260 i/o port pins are connected to the various
* signals required for programming a Xilinx fpga
*/
typedef
struct {
iopin_t prog_pin; /* assert for >= 300ns to program */
iopin_t init_pin; /* goes high when fpga is cleared */
iopin_t done_pin; /* goes high when program is done */
iopin_t enable_pin; /* some fpgas need enabling */
}
xlx_iopins_t;
/* all info about one Xilinx chip */
typedef
struct {
xlx_mmap_t mmap;
xlx_iopins_t iopins;
unsigned long irq:8; /* h/w intr req number for this fpga */
}
xlx_info_t;
/* all info about one hymod board */
typedef
struct {
hymod_eeprom_t eeprom;
xlx_info_t xlx[HYMOD_MAX_XLX];
}
hymod_board_t;
/*
* this defines the configuration information of a hymod board-set
* (main board + possible mezzanine board). In future, there may be
* more than one mezzanine board (stackable?) - if so, add a "mezz2"
* field, and so on... or make mezz an array?
*/
typedef
struct {
unsigned long ver:8; /* version control */
hymod_board_t main; /* main board info */
hymod_board_t mezz; /* mezzanine board info */
unsigned long crc; /* ensures kernel and boot prom agree */
}
hymod_conf_t;
#endif /* _HYMOD_H_ */

91
board/hymod/input.c
View File

@ -1,91 +0,0 @@
/*
* (C) Copyright 2003
* Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <bootretry.h>
#include <cli.h>
int
hymod_get_serno (const char *prompt)
{
for (;;) {
int n, serno;
char *p;
bootretry_reset_cmd_timeout();
n = cli_readline(prompt);
if (n < 0)
return (n);
if (n == 0)
continue;
serno = (int) simple_strtol (console_buffer, &p, 10);
if (p > console_buffer && *p == '\0' && serno > 0)
return (serno);
printf ("Invalid number (%s) - please re-enter\n",
console_buffer);
}
}
int
hymod_get_ethaddr (void)
{
for (;;) {
int n;
bootretry_reset_cmd_timeout();
n = cli_readline("Enter board ethernet address: ");
if (n < 0)
return (n);
if (n == 0)
continue;
if (n == 17) {
int i;
char *p, *q;
/* see if it looks like an ethernet address */
p = console_buffer;
for (i = 0; i < 6; i++) {
char term = (i == 5 ? '\0' : ':');
(void)simple_strtol (p, &q, 16);
if ((q - p) != 2 || *q++ != term)
break;
p = q;
}
if (i == 6) {
/* it looks ok - set it */
printf ("Setting ethernet addr to %s\n",
console_buffer);
setenv ("ethaddr", console_buffer);
puts ("Remember to do a 'saveenv' to "
"make it permanent\n");
return (0);
}
}
printf ("Invalid ethernet addr (%s) - please re-enter\n",
console_buffer);
}
}

132
board/hymod/u-boot.lds
View File

@ -1,132 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
arch/powerpc/cpu/mpc8260/start.o (.text)
/*
common/dlmalloc.o (.text)
arch/powerpc/lib/ppcstring.o (.text)
lib/vsprintf.o (.text)
lib/crc32.o (.text)
lib/zlib.o (.text)
. = env_offset;
*/
common/env_embedded.o(.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x0FFF) & 0xFFFFF000;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
_GOT2_TABLE_ = .;
KEEP(*(.got2))
KEEP(*(.got))
PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
}
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(4096);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(4096);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
. = ALIGN(256 * 1024);
.ppcenv :
{
common/env_embedded.o (.ppcenv)
}
. = ALIGN(4);
__bss_end = . ;
PROVIDE (end = .);
}

121
board/hymod/u-boot.lds.debug
View File

@ -1,121 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
arch/powerpc/cpu/mpc8xx/start.o (.text)
common/dlmalloc.o (.text)
lib/vsprintf.o (.text)
lib/crc32.o (.text)
. = env_offset;
common/env_embedded.o(.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
*(.eh_frame)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x0FFF) & 0xFFFFF000;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
}
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(4096);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(4096);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
__bss_end = . ;
PROVIDE (end = .);
}

3
configs/hymod_defconfig
View File

@ -1,3 +0,0 @@
CONFIG_PPC=y
CONFIG_MPC8260=y
CONFIG_TARGET_HYMOD=y

1
doc/README.scrapyard
View File

@ -12,6 +12,7 @@ The list should be sorted in reverse chronological order.
Board Arch CPU Commit Removed Last known maintainer/contact
=================================================================================================
hymod powerpc mpc8260 - - Murray Jensen <Murray.Jensen@csiro.au>
MHPC powerpc mpc8xx - - Frank Gottschling <fgottschling@eltec.de>
ICU862 powerpc mpc8xx - - Wolfgang Denk <wd@denx.de>
CPCI750 powerpc 74xx_7xx - - Reinhard Arlt <reinhard.arlt@esd-electronics.com>

3
include/asm-generic/u-boot.h
View File

@ -79,9 +79,6 @@ typedef struct bd_info {
unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
#endif
#if defined(CONFIG_HYMOD)
hymod_conf_t bi_hymod_conf; /* hymod configuration information */
#endif
#ifdef CONFIG_HAS_ETH1
unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */

3
include/common.h
View File

@ -69,9 +69,6 @@ typedef volatile unsigned char vu_char;
#ifdef CONFIG_4xx
#include <asm/ppc4xx.h>
#endif
#ifdef CONFIG_HYMOD
#include <board/hymod/hymod.h>
#endif
#ifdef CONFIG_ARM
#define asmlinkage /* nothing */
#endif

728
include/configs/hymod.h
View File

@ -1,728 +0,0 @@
/*
* (C) Copyright 2000
* Murray Jensen <Murray.Jensen@cmst.csiro.au>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* Config header file for Hymod board
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_HYMOD 1 /* ...on a Hymod board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
#define CONFIG_SYS_TEXT_BASE 0x40000000
#define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */
#define CONFIG_BOARD_POSTCLK_INIT /* have board_postclk_init() function */
/*
* select serial console configuration
*
* if either CONFIG_CONS_ON_SMC or CONFIG_CONS_ON_SCC is selected, then
* CONFIG_CONS_INDEX must be set to the channel number (1-2 for SMC, 1-4
* for SCC).
*
* if CONFIG_CONS_NONE is defined, then the serial console routines must
* defined elsewhere (for example, on the cogent platform, there are serial
* ports on the motherboard which are used for the serial console - see
* cogent/cma101/serial.[ch]).
*/
#undef CONFIG_CONS_ON_SMC /* define if console on SMC */
#define CONFIG_CONS_ON_SCC /* define if console on SCC */
#undef CONFIG_CONS_NONE /* define if console on something else*/
#define CONFIG_CONS_INDEX 1 /* which serial channel for console */
#define CONFIG_CONS_USE_EXTC /* SMC/SCC use ext clock not brg_clk */
#define CONFIG_CONS_EXTC_RATE 3686400 /* SMC/SCC ext clk rate in Hz */
#define CONFIG_CONS_EXTC_PINSEL 0 /* pin select 0=CLK3/CLK9,1=CLK5/CLK15*/
/*
* select ethernet configuration
*
* if either CONFIG_ETHER_ON_SCC or CONFIG_ETHER_ON_FCC is selected, then
* CONFIG_ETHER_INDEX must be set to the channel number (1-4 for SCC, 1-3
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
* defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */
#define CONFIG_ETHER_ON_FCC /* define if ether on FCC */
#undef CONFIG_ETHER_NONE /* define if ether on something else */
#define CONFIG_ETHER_INDEX 1 /* which channel for ether */
#define CONFIG_ETHER_LOOPBACK_TEST /* add ether external loopback test */
#ifdef CONFIG_ETHER_ON_FCC
#if (CONFIG_ETHER_INDEX == 1)
/*
* - Rx-CLK is CLK10
* - Tx-CLK is CLK11
* - RAM for BD/Buffers is on the 60x Bus (see 28-13)
* - Enable Full Duplex in FSMR
*/
# define CONFIG_SYS_CMXFCR_MASK1 (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
# define CONFIG_SYS_CMXFCR_VALUE1 (CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK11)
# define CONFIG_SYS_CPMFCR_RAMTYPE 0
# define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
# define MDIO_PORT 0 /* Port A */
# define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
# define MDC_DECLARE MDIO_DECLARE
# define MDIO_DATA_PINMASK 0x00040000 /* Pin 13 */
# define MDIO_CLCK_PINMASK 0x00080000 /* Pin 12 */
#elif (CONFIG_ETHER_INDEX == 2)
/*
* - Rx-CLK is CLK13
* - Tx-CLK is CLK14
* - RAM for BD/Buffers is on the 60x Bus (see 28-13)
* - Enable Full Duplex in FSMR
*/
# define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
# define CONFIG_SYS_CPMFCR_RAMTYPE 0
# define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
# define MDIO_PORT 0 /* Port A */
# define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
# define MDC_DECLARE MDIO_DECLARE
# define MDIO_DATA_PINMASK 0x00000040 /* Pin 25 */
# define MDIO_CLCK_PINMASK 0x00000080 /* Pin 24 */
#elif (CONFIG_ETHER_INDEX == 3)
/*
* - Rx-CLK is CLK15
* - Tx-CLK is CLK16
* - RAM for BD/Buffers is on the 60x Bus (see 28-13)
* - Enable Full Duplex in FSMR
*/
# define CONFIG_SYS_CMXFCR_MASK3 (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
# define CONFIG_SYS_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
# define CONFIG_SYS_CPMFCR_RAMTYPE 0
# define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
# define MDIO_PORT 0 /* Port A */
# define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
(immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
# define MDC_DECLARE MDIO_DECLARE
# define MDIO_DATA_PINMASK 0x00000100 /* Pin 23 */
# define MDIO_CLCK_PINMASK 0x00000200 /* Pin 22 */
#endif /* CONFIG_ETHER_INDEX */
#define CONFIG_MII /* MII PHY management */
#define CONFIG_BITBANGMII /* bit-bang MII PHY management */
#define MDIO_ACTIVE (iop->pdir |= MDIO_DATA_PINMASK)
#define MDIO_TRISTATE (iop->pdir &= ~MDIO_DATA_PINMASK)
#define MDIO_READ ((iop->pdat & MDIO_DATA_PINMASK) != 0)
#define MDIO(bit) if(bit) iop->pdat |= MDIO_DATA_PINMASK; \
else iop->pdat &= ~MDIO_DATA_PINMASK
#define MDC(bit) if(bit) iop->pdat |= MDIO_CLCK_PINMASK; \
else iop->pdat &= ~MDIO_CLCK_PINMASK
#define MIIDELAY udelay(1)
#endif /* CONFIG_ETHER_ON_FCC */
/* other options */
#define CONFIG_HARD_I2C 1 /* To enable I2C hardware support */
#define CONFIG_DTT_ADM1021 1 /* ADM1021 temp sensor support */
/* system clock rate (CLKIN) - equal to the 60x and local bus speed */
#ifdef DEBUG
#define CONFIG_8260_CLKIN 33333333 /* in Hz */
#else
#define CONFIG_8260_CLKIN 66666666 /* in Hz */
#endif
#if defined(CONFIG_CONS_USE_EXTC)
#define CONFIG_BAUDRATE 115200
#else
#define CONFIG_BAUDRATE 9600
#endif
/* default ip addresses - these will be overridden */
#define CONFIG_IPADDR 192.168.1.1 /* hymod "boot" address */
#define CONFIG_SERVERIP 192.168.1.254 /* hymod "server" address */
#define CONFIG_LAST_STAGE_INIT
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_BSP
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_CDP
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_DTT
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_ELF
#define CONFIG_CMD_FAT
#define CONFIG_CMD_I2C
#define CONFIG_CMD_IMMAP
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_KGDB
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_PORTIO
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_SNTP
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_XIMG
#ifdef DEBUG
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
#else
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_BOOT_RETRY_TIME 30 /* retry autoboot after 30 secs */
#define CONFIG_BOOT_RETRY_MIN 1 /* can go down to 1 second timeout */
/* Be selective on what keys can delay or stop the autoboot process
* To stop use: " "
*/
#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \
"press <SPACE> to stop\n", bootdelay
#define CONFIG_AUTOBOOT_STOP_STR " "
#undef CONFIG_AUTOBOOT_DELAY_STR
#define DEBUG_BOOTKEYS 0
#endif
#if defined(CONFIG_CMD_KGDB)
#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
#define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */
#undef CONFIG_KGDB_NONE /* define if kgdb on something else */
#define CONFIG_KGDB_INDEX 2 /* which serial channel for kgdb */
#define CONFIG_KGDB_USE_EXTC /* SMC/SCC use ext clock not brg_clk */
#define CONFIG_KGDB_EXTC_RATE 3686400 /* serial ext clk rate in Hz */
#define CONFIG_KGDB_EXTC_PINSEL 0 /* pin select 0=CLK3/CLK9,1=CLK5/CLK15*/
# if defined(CONFIG_KGDB_USE_EXTC)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port at */
# else
#define CONFIG_KGDB_BAUDRATE 9600 /* speed to run kgdb serial port at */
# endif
#endif
#undef CONFIG_WATCHDOG /* disable platform specific watchdog */
#define CONFIG_RTC_PCF8563 /* use Philips PCF8563 RTC */
/*
* Hymod specific configurable options
*/
#undef CONFIG_SYS_HYMOD_DBLEDS /* walk mezz board LEDs */
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x03c00000 /* 4 ... 60 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_SYS_I2C_SPEED 50000
#define CONFIG_SYS_I2C_SLAVE 0x7e
/* these are for the ST M24C02 2kbit serial i2c eeprom */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
/* mask of address bits that overflow into the "EEPROM chip address" */
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16 byte write page size */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
#define CONFIG_SYS_I2C_MULTI_EEPROMS 1 /* hymod has two eeproms */
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* philips PCF8563 RTC address */
/*
* standard dtt sensor configuration - bottom bit will determine local or
* remote sensor of the ADM1021, the rest determines index into
* CONFIG_SYS_DTT_ADM1021 array below.
*
* On HYMOD board, the remote sensor should be connected to the MPC8260
* temperature diode thingy, but an errata said this didn't work and
* should be disabled - so it isn't connected.
*/
#if 0
#define CONFIG_DTT_SENSORS { 0, 1 }
#else
#define CONFIG_DTT_SENSORS { 0 }
#endif
/*
* ADM1021 temp sensor configuration (see dtt/adm1021.c for details).
* there will be one entry in this array for each two (dummy) sensors in
* CONFIG_DTT_SENSORS.
*
* For HYMOD board:
* - only one ADM1021
* - i2c addr 0x2a (both ADD0 and ADD1 are N/C)
* - conversion rate 0x02 = 0.25 conversions/second
* - ALERT ouput disabled
* - local temp sensor enabled, min set to 0 deg, max set to 85 deg
* - remote temp sensor disabled (see comment for CONFIG_DTT_SENSORS above)
*/
#define CONFIG_SYS_DTT_ADM1021 { { 0x2a, 0x02, 0, 1, 0, 85, 0, } }
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* You should know what you are doing if you make changes here.
*/
/*-----------------------------------------------------------------------
* Hard Reset Configuration Words
*
* if you change bits in the HRCW, you must also change the CONFIG_SYS_*
* defines for the various registers affected by the HRCW e.g. changing
* HRCW_DPPCxx requires you to also change CONFIG_SYS_SIUMCR.
*/
#ifdef DEBUG
#define CONFIG_SYS_HRCW_MASTER (HRCW_BPS11|HRCW_CIP|HRCW_L2CPC01|HRCW_DPPC10|\
HRCW_ISB100|HRCW_BMS|HRCW_MMR11|HRCW_APPC10|\
HRCW_MODCK_H0010)
#else
#define CONFIG_SYS_HRCW_MASTER (HRCW_BPS11|HRCW_CIP|HRCW_L2CPC01|HRCW_DPPC10|\
HRCW_ISB100|HRCW_BMS|HRCW_MMR11|HRCW_APPC10|\
HRCW_MODCK_H0101)
#endif
/* no slaves so just duplicate the master hrcw */
#define CONFIG_SYS_HRCW_SLAVE1 CONFIG_SYS_HRCW_MASTER
#define CONFIG_SYS_HRCW_SLAVE2 CONFIG_SYS_HRCW_MASTER
#define CONFIG_SYS_HRCW_SLAVE3 CONFIG_SYS_HRCW_MASTER
#define CONFIG_SYS_HRCW_SLAVE4 CONFIG_SYS_HRCW_MASTER
#define CONFIG_SYS_HRCW_SLAVE5 CONFIG_SYS_HRCW_MASTER
#define CONFIG_SYS_HRCW_SLAVE6 CONFIG_SYS_HRCW_MASTER
#define CONFIG_SYS_HRCW_SLAVE7 CONFIG_SYS_HRCW_MASTER
/*-----------------------------------------------------------------------
* Internal Memory Mapped Register
*/
#define CONFIG_SYS_IMMR 0xF0000000
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR
#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in DPRAM */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
* (Set up by the startup code)
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_FPGA_BASE 0x80000000
/*
* unfortunately, CONFIG_SYS_MONITOR_LEN must include the
* (very large i.e. 256kB) environment flash sector
*/
#define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor*/
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/
/*-----------------------------------------------------------------------
* FLASH organization
*/
#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT 67 /* max num of sects on one chip */
#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Flash Erase Timeout (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */
#define CONFIG_ENV_SECT_SIZE 0x40000 /* see README - env sect real size */
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_MONITOR_LEN-CONFIG_ENV_SECT_SIZE)
#define CONFIG_SYS_USE_PPCENV /* Environment embedded in sect .ppcenv */
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC8260 CPU */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value*/
#endif
/*-----------------------------------------------------------------------
* HIDx - Hardware Implementation-dependent Registers 2-11
*-----------------------------------------------------------------------
* HID0 also contains cache control - initially enable both caches and
* invalidate contents, then the final state leaves only the instruction
* cache enabled. Note that Power-On and Hard reset invalidate the caches,
* but Soft reset does not.
*
* HID1 has only read-only information - nothing to set.
*/
#define CONFIG_SYS_HID0_INIT (HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI|\
HID0_IFEM|HID0_ABE)
#ifdef DEBUG
#define CONFIG_SYS_HID0_FINAL 0
#else
#define CONFIG_SYS_HID0_FINAL (HID0_ICE|HID0_IFEM|HID0_ABE)
#endif
#define CONFIG_SYS_HID2 0
/*-----------------------------------------------------------------------
* RMR - Reset Mode Register 5-5
*-----------------------------------------------------------------------
* turn on Checkstop Reset Enable
*/
#ifdef DEBUG
#define CONFIG_SYS_RMR 0
#else
#define CONFIG_SYS_RMR RMR_CSRE
#endif
/*-----------------------------------------------------------------------
* BCR - Bus Configuration 4-25
*-----------------------------------------------------------------------
*/
#define CONFIG_SYS_BCR (BCR_ETM)
/*-----------------------------------------------------------------------
* SIUMCR - SIU Module Configuration 4-31
*-----------------------------------------------------------------------
*/
#define CONFIG_SYS_SIUMCR (SIUMCR_DPPC10|SIUMCR_L2CPC01|\
SIUMCR_APPC10|SIUMCR_MMR11)
/*-----------------------------------------------------------------------
* SYPCR - System Protection Control 4-35
* SYPCR can only be written once after reset!
*-----------------------------------------------------------------------
* Watchdog & Bus Monitor Timer max, 60x & Local Bus Monitor enable
*/
#if defined(CONFIG_WATCHDOG)
#define CONFIG_SYS_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\
SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE)
#else
#define CONFIG_SYS_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\
SYPCR_SWRI|SYPCR_SWP)
#endif /* CONFIG_WATCHDOG */
/*-----------------------------------------------------------------------
* TMCNTSC - Time Counter Status and Control 4-40
*-----------------------------------------------------------------------
* Clear once per Second and Alarm Interrupt Status, Set 32KHz timersclk,
* and enable Time Counter
*/
#define CONFIG_SYS_TMCNTSC (TMCNTSC_SEC|TMCNTSC_ALR|TMCNTSC_TCF|TMCNTSC_TCE)
/*-----------------------------------------------------------------------
* PISCR - Periodic Interrupt Status and Control 4-42
*-----------------------------------------------------------------------
* Clear Periodic Interrupt Status, Set 32KHz timersclk, and enable
* Periodic timer
*/
#define CONFIG_SYS_PISCR (PISCR_PS|PISCR_PTF|PISCR_PTE)
/*-----------------------------------------------------------------------
* SCCR - System Clock Control 9-8
*-----------------------------------------------------------------------
* Ensure DFBRG is Divide by 16
*/
#define CONFIG_SYS_SCCR (SCCR_DFBRG01)
/*-----------------------------------------------------------------------
* RCCR - RISC Controller Configuration 13-7
*-----------------------------------------------------------------------
*/
#define CONFIG_SYS_RCCR 0
/*
* Init Memory Controller:
*
* Bank Bus Machine PortSz Device
* ---- --- ------- ------ ------
* 0 60x GPCM 32 bit FLASH
* 1 60x GPCM 32 bit FLASH (same as 0 - unused for now)
* 2 60x SDRAM 64 bit SDRAM
* 3 Local UPMC 8 bit Main Xilinx configuration
* 4 Local GPCM 32 bit Main Xilinx register mode
* 5 Local UPMB 32 bit Main Xilinx port mode
* 6 Local UPMC 8 bit Mezz Xilinx configuration
*/
/*
* Bank 0 - FLASH
*
* Quotes from the HYMOD IO Board Reference manual:
*
* "The flash memory is two Intel StrataFlash chips, each configured for
* 16 bit operation and connected to give a 32 bit wide port."
*
* "The chip select logic is configured to respond to both *CS0 and *CS1.
* Therefore the FLASH memory will be mapped to both bank 0 and bank 1.
* It is suggested that bank 0 be read-only and bank 1 be read/write. The
* FLASH will then appear as ROM during boot."
*
* Initially, we are only going to use bank 0 in read/write mode.
*/
/* 32 bit, read-write, GPCM on 60x bus */
#define CONFIG_SYS_BR0_PRELIM ((CONFIG_SYS_FLASH_BASE&BRx_BA_MSK)|\
BRx_PS_32|BRx_MS_GPCM_P|BRx_V)
/* up to 32 Mb */
#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(32)|ORxG_CSNT|ORxG_ACS_DIV2|ORxG_SCY_10_CLK)
/*
* Bank 2 - SDRAM
*
* Quotes from the HYMOD IO Board Reference manual:
*
* "The main memory is implemented using TC59SM716FTL-10 SDRAM and has a
* fixed size of 64 Mbytes. The Toshiba TC59SM716FTL-10 is a CMOS synchronous
* dynamic random access memory organised as 4 banks by 4096 rows by 512
* columns by 16 bits. Four chips provide a 64-bit port on the 60x bus."
*
* "The locations in SDRAM are accessed using multiplexed address pins to
* specify row and column. The pins also act to specify commands. The state
* of the inputs *RAS, *CAS and *WE defines the required action. The a10/AP
* pin may function as a row address or as the AUTO PRECHARGE control line,
* depending on the cycle type. The 60x bus SDRAM machine allows the MPC8260
* address lines to be configured to the required multiplexing scheme."
*/
#define CONFIG_SYS_SDRAM_SIZE 64
/* 64 bit, read-write, SDRAM on 60x bus */
#define CONFIG_SYS_BR2_PRELIM ((CONFIG_SYS_SDRAM_BASE&BRx_BA_MSK)|\
BRx_PS_64|BRx_MS_SDRAM_P|BRx_V)
/* 64 Mb, 4 int banks per dev, row start addr bit = A6, 12 row addr lines */
#define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_SDRAM_SIZE)|\
ORxS_BPD_4|ORxS_ROWST_PBI1_A6|ORxS_NUMR_12)
/*
* The 60x Bus SDRAM Mode Register (PDSMR) is set as follows:
*
* Page Based Interleaving, Refresh Enable, Address Multiplexing where A5
* is output on A16 pin (A6 on A17, and so on), use address pins A14-A16
* as bank select, A7 is output on SDA10 during an ACTIVATE command,
* earliest timing for ACTIVATE command after REFRESH command is 6 clocks,
* earliest timing for ACTIVATE or REFRESH command after PRECHARGE command
* is 2 clocks, earliest timing for READ/WRITE command after ACTIVATE
* command is 2 clocks, earliest timing for PRECHARGE after last data
* was read is 1 clock, earliest timing for PRECHARGE after last data
* was written is 1 clock, CAS Latency is 2.
*/
#define CONFIG_SYS_PSDMR (PSDMR_PBI|PSDMR_SDAM_A16_IS_A5|\
PSDMR_BSMA_A14_A16|PSDMR_SDA10_PBI1_A7|\
PSDMR_RFRC_6_CLK|PSDMR_PRETOACT_2W|\
PSDMR_ACTTORW_2W|PSDMR_LDOTOPRE_1C|\
PSDMR_WRC_1C|PSDMR_CL_2)
/*
* The 60x bus-assigned SDRAM Refresh Timer (PSRT) (10-31) and the Refresh
* Timers Prescale (PTP) value in the Memory Refresh Timer Prescaler Register
* (MPTPR) (10-32) must also be set up (it used to be called the Periodic Timer
* Prescaler, hence the P instead of the R). The refresh timer period is given
* by (note that there was a change in the 8260 UM Errata):
*
* TimerPeriod = (PSRT + 1) / Fmptc
*
* where Fmptc is the BusClock divided by PTP. i.e.
*
* TimerPeriod = (PSRT + 1) / (BusClock / PTP)
*
* or
*
* TImerPeriod = (PTP * (PSRT + 1)) / BusClock
*
* The requirement for the Toshiba TC59SM716FTL-10 is that there must be
* 4K refresh cycles every 64 ms. i.e. one refresh cycle every 64000/4096
* = 15.625 usecs.
*
* So PTP * (PSRT + 1) <= 15.625 * BusClock. At 66.666MHz, PSRT=31 and PTP=32
* appear to be reasonable.
*/
#ifdef DEBUG
#define CONFIG_SYS_PSRT 39
#define CONFIG_SYS_MPTPR MPTPR_PTP_DIV8
#else
#define CONFIG_SYS_PSRT 31
#define CONFIG_SYS_MPTPR MPTPR_PTP_DIV32
#endif
/*
* Banks 3,4,5 and 6 - FPGA access
*
* Quotes from the HYMOD IO Board Reference manual:
*
* "The IO Board is fitted with a Xilinx XCV300E main FPGA. Provision is made
* for configuring an optional FPGA on the mezzanine interface.
*
* Access to the FPGAs may be divided into several catagories:
*
* 1. Configuration
* 2. Register mode access
* 3. Port mode access
*
* The main FPGA is supported for modes 1, 2 and 3. The mezzanine FPGA can be
* configured only (mode 1). Consequently there are four access types.
*
* To improve interface performance and simplify software design, the four
* possible access types are separately mapped to different memory banks.
*
* All are accessed using the local bus."
*
* Device Mode Memory Bank Machine Port Size Access
*
* Main Configuration 3 UPMC 8bit R/W
* Main Register 4 GPCM 32bit R/W
* Main Port 5 UPMB 32bit R/W
* Mezzanine Configuration 6 UPMC 8bit W/O
*
* "Note that mezzanine mode 1 access is write-only."
*/
/* all the bank sizes must be a power of two, greater or equal to 32768 */
#define FPGA_MAIN_CFG_BASE (CONFIG_SYS_FPGA_BASE)
#define FPGA_MAIN_CFG_SIZE 32768
#define FPGA_MAIN_REG_BASE (FPGA_MAIN_CFG_BASE + FPGA_MAIN_CFG_SIZE)
#define FPGA_MAIN_REG_SIZE 32768
#define FPGA_MAIN_PORT_BASE (FPGA_MAIN_REG_BASE + FPGA_MAIN_REG_SIZE)
#define FPGA_MAIN_PORT_SIZE 32768
#define FPGA_MEZZ_CFG_BASE (FPGA_MAIN_PORT_BASE + FPGA_MAIN_PORT_SIZE)
#define FPGA_MEZZ_CFG_SIZE 32768
/* 8 bit, read-write, UPMC */
#define CONFIG_SYS_BR3_PRELIM (FPGA_MAIN_CFG_BASE|BRx_PS_8|BRx_MS_UPMC|BRx_V)
/* up to 32Kbyte, burst inhibit */
#define CONFIG_SYS_OR3_PRELIM (P2SZ_TO_AM(FPGA_MAIN_CFG_SIZE)|ORxU_BI)
/* 32 bit, read-write, GPCM */
#define CONFIG_SYS_BR4_PRELIM (FPGA_MAIN_REG_BASE|BRx_PS_32|BRx_MS_GPCM_L|BRx_V)
/* up to 32Kbyte */
#define CONFIG_SYS_OR4_PRELIM (P2SZ_TO_AM(FPGA_MAIN_REG_SIZE))
/* 32 bit, read-write, UPMB */
#define CONFIG_SYS_BR5_PRELIM (FPGA_MAIN_PORT_BASE|BRx_PS_32|BRx_MS_UPMB|BRx_V)
/* up to 32Kbyte */
#define CONFIG_SYS_OR5_PRELIM (P2SZ_TO_AM(FPGA_MAIN_PORT_SIZE)|ORxU_BI)
/* 8 bit, write-only, UPMC */
#define CONFIG_SYS_BR6_PRELIM (FPGA_MEZZ_CFG_BASE|BRx_PS_8|BRx_MS_UPMC|BRx_V)
/* up to 32Kbyte, burst inhibit */
#define CONFIG_SYS_OR6_PRELIM (P2SZ_TO_AM(FPGA_MEZZ_CFG_SIZE)|ORxU_BI)
/*-----------------------------------------------------------------------
* MBMR - Machine B Mode 10-27
*-----------------------------------------------------------------------
*/
#define CONFIG_SYS_MBMR (MxMR_BSEL|MxMR_OP_NORM) /* XXX - needs more */
/*-----------------------------------------------------------------------
* MCMR - Machine C Mode 10-27
*-----------------------------------------------------------------------
*/
#define CONFIG_SYS_MCMR (MxMR_BSEL|MxMR_DSx_2_CYCL) /* XXX - needs more */
/*
* FPGA I/O Port/Bit information
*/
#define FPGA_MAIN_PROG_PORT IOPIN_PORTA
#define FPGA_MAIN_PROG_PIN 4 /* PA4 */
#define FPGA_MAIN_INIT_PORT IOPIN_PORTA
#define FPGA_MAIN_INIT_PIN 5 /* PA5 */
#define FPGA_MAIN_DONE_PORT IOPIN_PORTA
#define FPGA_MAIN_DONE_PIN 6 /* PA6 */
#define FPGA_MEZZ_PROG_PORT IOPIN_PORTA
#define FPGA_MEZZ_PROG_PIN 0 /* PA0 */
#define FPGA_MEZZ_INIT_PORT IOPIN_PORTA
#define FPGA_MEZZ_INIT_PIN 1 /* PA1 */
#define FPGA_MEZZ_DONE_PORT IOPIN_PORTA
#define FPGA_MEZZ_DONE_PIN 2 /* PA2 */
#define FPGA_MEZZ_ENABLE_PORT IOPIN_PORTA
#define FPGA_MEZZ_ENABLE_PIN 3 /* PA3 */
/*
* FPGA Interrupt configuration
*/
#define FPGA_MAIN_IRQ SIU_INT_IRQ2
/*
* JFFS2 partitions
*
*/
/* No command line, one static partition, whole device */
#undef CONFIG_CMD_MTDPARTS
#define CONFIG_JFFS2_DEV "nor0"
#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
#define CONFIG_JFFS2_PART_OFFSET 0x00000000
/* mtdparts command line support */
/*
#define CONFIG_CMD_MTDPARTS
#define MTDIDS_DEFAULT ""
#define MTDPARTS_DEFAULT ""
*/
#endif /* __CONFIG_H */

116
tools/bddb/README
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@ -1,116 +0,0 @@
Hymod Board Database
(C) Copyright 2001
Murray Jensen <Murray.Jensen@csiro.au>
CSIRO Manufacturing Science and Technology, Preston Lab
25-Jun-01
This stuff is a set of PHP/MySQL scripts to implement a custom board
database. It will need *extensive* hacking to modify it to keep the
information about your custom boards that you want, however it is a good
starting point.
How it is used:
1. a board has gone through all the hardware testing etc and is
ready to have the flash programmed for the first time - first you
go to a web page and fill in information about the board in a form
to register it in a database
2. the web stuff allocates a (unique) serial number and (optionally)
a (locally administered) ethernet address and stores the information
in a database using the serial number as the key (can do whole
batches of boards in one go and/or use a previously registered board
as defaults for the new board(s))
3. it then creates a file in the tftp area of a server somewhere
containing the board information in a simple text format (one
per serial number)
4. all hymod boards have an i2c eeprom, and when U-Boot sees that
the eeprom is unitialised, it prompts for a serial number and
ethernet address (if not set), then transfers the file created
in step 3 from the server and initialises the eeprom from its
contents
What this means is you can't boot the board until you have allocated a serial
number, but you don't have to type it all twice - you do it once on the web
and the board then finds the info it needs to initialise its eeprom. The
other side of the coin is the reading of the eeprom and how it gets passed
to Linux (or another O/S).
To see how this is all done for the hymod boards look at the code in the
"board/hymod" directory and in the file "include/asm/hymod.h". Hymod boards
can have a mezzanine card which also have an eeprom that needs allocating,
the same process is used for these as well - just a different i2c address.
Other forms provide the following functions:
- browsing the board database
- editing board information (one at a time)
- maintaining/browsing a (simple) per board event log
You will need: MySQL (I use version 3.23.7-alpha), PHP4 (with MySQL
support enabled) and a web server (I use Apache 1.3.x).
I originally started by using phpMyBuilder (http://kyber.dk/phpMyBuilder)
but it soon got far more complicated than that could handle (but I left
the copyright messages in there anyway). Most of the code resides in the
common defs.php file, which shouldn't need much alteration - all the work
will be in shaping the front-end php files to your liking.
Here's a quick summary of what needs doing to use it for your boards:
1. get phpMyAdmin (http://phpwizard.net/projects/phpMyAdmin/) - it's an
invaluable tool for this sort of stuff (this step is optional of course)
2. edit "bddb.css" to your taste, if you could be bothered - I have no
idea what is in there or what it does - I copied it from somewhere else
("user.css" from the phpMyEdit (http://phpmyedit.sourcerforge.net) package,
I think) - I figure one day I'll see what sort of things I can change
in there.
3. create a mysql database - call it whatever you like
4. edit "create_tables.sql" and modify the "boards" table schema to
reflect the information you want to keep about your boards. It may or
may not be easier to do this and the next step in phpMyAdmin. Check out
the MySQL documentation at http://www.mysql.com/doc/ in particular the
column types at http://www.mysql.com/doc/C/o/Column_types.html - Note
there is only support for a few data types:
int - presented as an html text input
char/text - presented as an html text input
date - presented as an html text input
enum - presented as an html radio input
I also have what I call "enum_multi" which is a set of enums with the
same name, but suffixed with a number e.g. fred0, fred1, fred2. These
are presented as a number of html select's with a single label "fred"
this is useful for board characteristics that have multiple items of
the same type e.g. multiple banks of sdram.
5. use the "create_tables.sql" file to create the "boards" table in the
database e.g. mysql dbname < create_tables.sql
6. create a user and password for the web server to log into the MySQL
database with; give this user select, insert and update privileges
to the database created in 3 (and delete, if you want the "delete"
functions in the edit forms to work- I have this turned off). phpMyAdmin
helps in this step.
7. edit "config.php" and set the variables: $mysql_user, $mysql_pw, $mysql_db,
$bddb_cfgdir and $bddb_label - keep the contents of this file secret - it
contains the web servers username and password (the three $mysql_* vars
are set from the previous step)
8. edit "defs.php" and a. adjust the various enum value arrays and b. edit
the function "pg_foot()" to remove my email address :-)
9. do major hacking on the following files: browse.php, doedit.php, donew.php,
edit.php and new.php to reflect your database schema - fortunately the
hacking is fairly straight-forward, but it is boring and time-consuming.
These notes were written rather hastily - if you find any obvious problems
please let me know.

23
tools/bddb/badsubmit.php
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@ -1,23 +0,0 @@
<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
require("defs.php");
pg_head("$bddb_label - Unknown Submit Type");
?>
<center>
<font size="+4">
<b>
The <?php echo "$bddb_label"; ?> form was submitted with an
unknown SUBMIT type <?php echo "(value was '$submit')" ?>.
<br></br>
Perhaps you typed the URL in directly? Click here to go to the
home page of the <a href="index.php"><?php echo "$bddb_label"; ?></a>.
</b>
</font>
</center>
<?php
pg_foot();
?>

207
tools/bddb/bddb.css
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@ -1,207 +0,0 @@
BODY {
background: #e0ffff;
color: #000000;
font-family: Arial, Verdana, Helvetica;
}
H1 {
font-family: "Copperplate Gothic Bold";
background: transparent;
color: #993300;
text-align: center;
}
H2, H3, H4, H5 {
background: transparent;
color: #993300;
margin-top: 4%;
text-align: center;
}
Body.Plain Div.Abstract, Body.Plain P.Abstract {
background: #cccc99;
color: #333300;
border: white;
padding: 3%;
font-family: Times, Verdana;
}
TH.Nav {
background: #0000cc;
color: #ff9900;
}
TH.Menu {
background: #3366cc;
color: #ff9900;
}
A:hover {
color: #ff6600;
}
A.Menu:hover {
color: #ff6600;
}
A.HoMe:hover {
color: #ff6600;
}
A.Menu {
background: transparent;
color: #ffcc33;
font-family: Verdana, Helvetica, Arial;
font-size: smaller;
text-decoration: none;
}
A.Menu:visited {
background: transparent;
color: #ffcc99;
}
A.HoMe {
background: transparent;
color: #ffcc33;
font-family: Verdana, Helvetica, Arial;
text-decoration:none;
}
A.HoMe:visited {
background: transparent;
color: #ffcc99;
}
TH.Xmp {
background: #eeeeee;
color: #330066;
font-family: courier;
font-weight: normal;
}
TH.LuT {
background: #cccccc;
color: #000000;
}
TD.LuT {
background: #ffffcc;
color: #000000;
font-size: 85%;
}
TH.Info, TD.Info {
background: #ffffcc;
color: #660000;
font-family: "Comic Sans MS", Cursive, Verdana;
font-size: smaller;
}
Div.Info, P.Info {
background: #ffff99;
color: #990033;
text-align: left;
padding: 2%;
font-family: "Comic Sans MS", Cursive, Verdana;
font-size: 85%;
}
Div.Info A {
background: transparent;
color: #ff6600;
}
.HL {
background: #ffff99;
color: #000000;
}
TD.HL {
background: #ccffff;
color: #000000;
}
Div.Margins {
width: 512px;
text-align: center;
}
TD.Plain {
background: #ffffcc;
color: #000033;
}
.Type {
background: #cccccc;
color: #660000;
}
.Name {
background: #eeeeee;
color: #660000;
vertical-align: top;
text-align: right;
}
.Value {
background: #ffffee;
color: #000066;
}
.Drop {
background: #333366;
color: #ffcc33;
font-family: "Copperplate Gothic Light", Helvetica, Verdana, Arial;
}
A.Button:hover {
color: #ff6600;
}
A.Button {
text-decoration:none;
color: #003366;
background: #ffcc66;
}
.Button {
font-size: 9pt;
text-align: center;
text-decoration:none;
color: #003366;
background: #ffcc66;
margin-bottom: 2pt;
border-top: 2px solid #ffff99;
border-left: 2px solid #ffff99;
border-right: 2px solid #cc9933;
border-bottom: 2px solid #cc9933;
font-family: Verdana, Arial, "Comic Sans MS";
}
.Banner {
width: 468;
font-size: 12pt;
text-align: center;
text-decoration:none;
color: #003366;
background: #ffcc66;
border-top: 4px solid #ffff99;
border-left: 4px solid #ffff99;
border-right: 4px solid #cc9933;
border-bottom: 4px solid #cc9933;
font-family: Verdana, Arial, "Comic Sans MS";
}
TD.Nova, Body.Nova {
background: #000000;
font-family: "Times New Roman";
font-weight: light;
color: #ffcc00;
}
Body.Nova A.Button {
background: gold;
color: #003366;
}
Body.Nova A.Banner {
background: transparent;
color: #003366;
}
Body.Nova A {
background: transparent;
text-decoration:none;
color: #ffd766;
}
Body.Nova H1, Body.Nova H2, Body.Nova H3, Body.Nova H4 {
background: transparent;
color: white;
margin-top: 4%;
text-align: center;
filter: Blur(Add=1, Direction=0, Strength=8);
}
Body.Nova Div.Abstract {
background: #000000;
color: #ffffff;
font-family: Times, Verdana;
}
Body.Nova A.Abstract {
background: transparent;
color: #ffeedd;
}
Body.Nova TH.LuT {
background: black;
color: #ffff99;
}
Body.Nova TD.LuT {
background: navy;
color: #ffff99;
}

109
tools/bddb/brlog.php
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@ -1,109 +0,0 @@
<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
// list page (hymod_bddb / boards)
require("defs.php");
pg_head("$bddb_label - Browse Board Log");
$serno=intval($serno);
if ($serno == 0)
die("serial number not specified or invalid!");
function print_cell($str) {
if ($str == '')
$str = '&nbsp;';
echo "\t<td>$str</td>\n";
}
?>
<table align=center border=1 cellpadding=10>
<tr>
<th>serno / edit</th>
<th>ethaddr</th>
<th>date</th>
<th>batch</th>
<th>type</th>
<th>rev</th>
<th>location</th>
</tr>
<?php
$r=mysql_query("select * from boards where serno=$serno");
while($row=mysql_fetch_array($r)){
foreach ($columns as $key) {
if (!key_in_array($key, $row))
$row[$key] = '';
}
echo "<tr>\n";
print_cell("<a href=\"edit.php?serno=$row[serno]\">$row[serno]</a>");
print_cell($row['ethaddr']);
print_cell($row['date']);
print_cell($row['batch']);
print_cell($row['type']);
print_cell($row['rev']);
print_cell($row['location']);
echo "</tr>\n";
}
mysql_free_result($r);
?>
</table>
<hr></hr>
<p></p>
<?php
$limit=abs(isset($_REQUEST['limit'])?$_REQUEST['limit']:20);
$offset=abs(isset($_REQUEST['offset'])?$_REQUEST['offset']:0);
$lr=mysql_query("select count(*) as n from log where serno=$serno");
$lrow=mysql_fetch_array($lr);
if($lrow['n']>$limit){
$preoffset=max(0,$offset-$limit);
$postoffset=$offset+$limit;
echo "<table width=\"100%\">\n<tr align=center>\n";
printf("<td><%sa href=\"%s?submit=Log&serno=$serno&offset=%d\"><img border=0 alt=\"&lt;\" src=\"/icons/left.gif\"></a></td>\n", $offset>0?"":"no", $PHP_SELF, $preoffset);
printf("<td><%sa href=\"%s?submit=Log&serno=$serno&offset=%d\"><img border=0 alt=\"&gt;\" src=\"/icons/right.gif\"></a></td>\n", $postoffset<$lrow['n']?"":"no", $PHP_SELF, $postoffset);
echo "</tr>\n</table>\n";
}
mysql_free_result($lr);
?>
<table width="100%" border=1 cellpadding=10>
<tr valign=top>
<th>logno / edit</th>
<th>date</th>
<th>who</th>
<th width="70%">details</th>
</tr>
<?php
$r=mysql_query("select * from log where serno=$serno order by logno limit $offset,$limit");
while($row=mysql_fetch_array($r)){
echo "<tr>\n";
print_cell("<a href=\"edlog.php?serno=$row[serno]&logno=$row[logno]\">$row[logno]</a>");
print_cell($row['date']);
print_cell($row['who']);
print_cell("<pre>" . urldecode($row['details']) . "</pre>");
echo "</tr>\n";
}
mysql_free_result($r);
?>
</table>
<hr></hr>
<p></p>
<table width="100%">
<tr>
<td align=center>
<a href="newlog.php?serno=<?php echo "$serno"; ?>">Add to Log</a>
</td>
<td align=center>
<a href="index.php">Back to Start</a>
</td>
</tr>
</table>
<?php
pg_foot();
?>

147
tools/bddb/browse.php
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@ -1,147 +0,0 @@
<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
// list page (hymod_bddb / boards)
require("defs.php");
$serno=isset($_REQUEST['serno'])?$_REQUEST['serno']:'';
$verbose=isset($_REQUEST['verbose'])?intval($_REQUEST['verbose']):0;
pg_head("$bddb_label - Browse database" . ($verbose?" (verbose)":""));
?>
<p></p>
<?php
$limit=isset($_REQUEST['limit'])?abs(intval($_REQUEST['limit'])):20;
$offset=isset($_REQUEST['offset'])?abs(intval($_REQUEST['offset'])):0;
if ($serno == '') {
$lr=mysql_query("select count(*) as n from boards");
$lrow=mysql_fetch_array($lr);
if($lrow['n']>$limit){
$preoffset=max(0,$offset-$limit);
$postoffset=$offset+$limit;
echo "<table width=\"100%\">\n<tr>\n";
printf("<td align=left><%sa href=\"%s?submit=Browse&offset=%d&verbose=%d\"><img border=0 alt=\"&lt;\" src=\"/icons/left.gif\"></a></td>\n", $offset>0?"":"no", $PHP_SELF, $preoffset, $verbose);
printf("<td align=right><%sa href=\"%s?submit=Browse&offset=%d&verbose=%d\"><img border=0 alt=\"&gt;\" src=\"/icons/right.gif\"></a></td>\n", $postoffset<$lrow['n']?"":"no", $PHP_SELF, $postoffset, $offset);
echo "</tr>\n</table>\n";
}
mysql_free_result($lr);
}
?>
<table align=center border=1 cellpadding=10>
<tr>
<th></th>
<th>serno / edit</th>
<th>ethaddr</th>
<th>date</th>
<th>batch</th>
<th>type</th>
<th>rev</th>
<th>location</th>
<?php
if ($verbose) {
echo "<th>comments</th>\n";
echo "<th>sdram</th>\n";
echo "<th>flash</th>\n";
echo "<th>zbt</th>\n";
echo "<th>xlxtyp</th>\n";
echo "<th>xlxspd</th>\n";
echo "<th>xlxtmp</th>\n";
echo "<th>xlxgrd</th>\n";
echo "<th>cputyp</th>\n";
echo "<th>cpuspd</th>\n";
echo "<th>cpmspd</th>\n";
echo "<th>busspd</th>\n";
echo "<th>hstype</th>\n";
echo "<th>hschin</th>\n";
echo "<th>hschout</th>\n";
}
?>
</tr>
<?php
$query = "select * from boards";
if ($serno != '') {
$pre = " where ";
foreach (preg_split("/[\s,]+/", $serno) as $s) {
if (preg_match('/^[0-9]+$/',$s))
$query .= $pre . "serno=" . $s;
else if (preg_match('/^([0-9]+)-([0-9]+)$/',$s,$m)) {
$m1 = intval($m[1]); $m2 = intval($m[2]);
if ($m2 <= $m1)
die("bad serial number range ($s)");
$query .= $pre . "(serno>=$m[1] and serno<=$m[2])";
}
else
die("illegal serial number ($s)");
$pre = " or ";
}
}
$query .= " order by serno";
if ($serno == '')
$query .= " limit $offset,$limit";
$r = mysql_query($query);
function print_cell($str) {
if ($str == '')
$str = '&nbsp;';
echo "\t<td>$str</td>\n";
}
while($row=mysql_fetch_array($r)){
foreach ($columns as $key) {
if (!key_in_array($key, $row))
$row[$key] = '';
}
echo "<tr>\n";
print_cell("<a href=\"brlog.php?serno=$row[serno]\">Log</a>");
print_cell("<a href=\"edit.php?serno=$row[serno]\">$row[serno]</a>");
print_cell($row['ethaddr']);
print_cell($row['date']);
print_cell($row['batch']);
print_cell($row['type']);
print_cell($row['rev']);
print_cell($row['location']);
if ($verbose) {
print_cell("<pre>\n" . urldecode($row['comments']) .
"\n\t</pre>");
print_cell(gather_enum_multi_print("sdram", 4, $row));
print_cell(gather_enum_multi_print("flash", 4, $row));
print_cell(gather_enum_multi_print("zbt", 16, $row));
print_cell(gather_enum_multi_print("xlxtyp", 4, $row));
print_cell(gather_enum_multi_print("xlxspd", 4, $row));
print_cell(gather_enum_multi_print("xlxtmp", 4, $row));
print_cell(gather_enum_multi_print("xlxgrd", 4, $row));
print_cell($row['cputyp']);
print_cell($row['cpuspd']);
print_cell($row['cpmspd']);
print_cell($row['busspd']);
print_cell($row['hstype']);
print_cell($row['hschin']);
print_cell($row['hschout']);
}
echo "</tr>\n";
}
?>
</table>
<p></p>
<table width="100%">
<tr>
<td align=center><?php
printf("<a href=\"%s?submit=Browse&offset=%d&verbose=%d%s\">%s Listing</a>\n", $PHP_SELF, $offset, $verbose?0:1, $serno!=''?"&serno=$serno":'', $verbose?"Terse":"Verbose");
?></td>
<td align=center><a href="index.php">Back to Start</a></td>
</tr>
</table>
<?php
pg_foot();
?>

16
tools/bddb/config.php
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@ -1,16 +0,0 @@
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
// mysql database access info
$mysql_user="fred";
$mysql_pw="apassword";
$mysql_db="mydbname";
// where to put the eeprom config files
$bddb_cfgdir = '/tftpboot/bddb';
// what this database is called
$bddb_label = 'Hymod Board Database';
?>

90
tools/bddb/create_tables.sql
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@ -1,90 +0,0 @@
# phpMyAdmin MySQL-Dump
# http://phpwizard.net/phpMyAdmin/
#
# Host: localhost Database : hymod_bddb
# (C) Copyright 2001
# Murray Jensen <Murray.Jensen@csiro.au>
# CSIRO Manufacturing and Infrastructure Technology, Preston Lab
# --------------------------------------------------------
#
# Table structure for table 'boards'
#
DROP TABLE IF EXISTS boards;
CREATE TABLE boards (
serno int(10) unsigned zerofill NOT NULL auto_increment,
ethaddr char(17),
date date NOT NULL,
batch char(32),
type enum('IO','CLP','DSP','INPUT','ALT-INPUT','DISPLAY') NOT NULL,
rev tinyint(3) unsigned zerofill NOT NULL,
location char(64),
comments text,
sdram0 enum('32M','64M','128M','256M','512M','1G','2G','4G'),
sdram1 enum('32M','64M','128M','256M','512M','1G','2G','4G'),
sdram2 enum('32M','64M','128M','256M','512M','1G','2G','4G'),
sdram3 enum('32M','64M','128M','256M','512M','1G','2G','4G'),
flash0 enum('4M','8M','16M','32M','64M','128M','256M','512M','1G'),
flash1 enum('4M','8M','16M','32M','64M','128M','256M','512M','1G'),
flash2 enum('4M','8M','16M','32M','64M','128M','256M','512M','1G'),
flash3 enum('4M','8M','16M','32M','64M','128M','256M','512M','1G'),
zbt0 enum('512K','1M','2M','4M','8M','16M'),
zbt1 enum('512K','1M','2M','4M','8M','16M'),
zbt2 enum('512K','1M','2M','4M','8M','16M'),
zbt3 enum('512K','1M','2M','4M','8M','16M'),
zbt4 enum('512K','1M','2M','4M','8M','16M'),
zbt5 enum('512K','1M','2M','4M','8M','16M'),
zbt6 enum('512K','1M','2M','4M','8M','16M'),
zbt7 enum('512K','1M','2M','4M','8M','16M'),
zbt8 enum('512K','1M','2M','4M','8M','16M'),
zbt9 enum('512K','1M','2M','4M','8M','16M'),
zbta enum('512K','1M','2M','4M','8M','16M'),
zbtb enum('512K','1M','2M','4M','8M','16M'),
zbtc enum('512K','1M','2M','4M','8M','16M'),
zbtd enum('512K','1M','2M','4M','8M','16M'),
zbte enum('512K','1M','2M','4M','8M','16M'),
zbtf enum('512K','1M','2M','4M','8M','16M'),
xlxtyp0 enum('XCV300E','XCV400E','XCV600E','XC2V2000','XC2V3000','XC2V4000','XC2V6000','XC2VP2','XC2VP4','XC2VP7','XC2VP20','XC2VP30','XC2VP50','XC4VFX20','XC4VFX40','XC4VFX60','XC4VFX100','XC4VFX140'),
xlxtyp1 enum('XCV300E','XCV400E','XCV600E','XC2V2000','XC2V3000','XC2V4000','XC2V6000','XC2VP2','XC2VP4','XC2VP7','XC2VP20','XC2VP30','XC2VP50','XC4VFX20','XC4VFX40','XC4VFX60','XC4VFX100','XC4VFX140'),
xlxtyp2 enum('XCV300E','XCV400E','XCV600E','XC2V2000','XC2V3000','XC2V4000','XC2V6000','XC2VP2','XC2VP4','XC2VP7','XC2VP20','XC2VP30','XC2VP50','XC4VFX20','XC4VFX40','XC4VFX60','XC4VFX100','XC4VFX140'),
xlxtyp3 enum('XCV300E','XCV400E','XCV600E','XC2V2000','XC2V3000','XC2V4000','XC2V6000','XC2VP2','XC2VP4','XC2VP7','XC2VP20','XC2VP30','XC2VP50','XC4VFX20','XC4VFX40','XC4VFX60','XC4VFX100','XC4VFX140'),
xlxspd0 enum('6','7','8','4','5','9','10','11','12'),
xlxspd1 enum('6','7','8','4','5','9','10','11','12'),
xlxspd2 enum('6','7','8','4','5','9','10','11','12'),
xlxspd3 enum('6','7','8','4','5','9','10','11','12'),
xlxtmp0 enum('COM','IND'),
xlxtmp1 enum('COM','IND'),
xlxtmp2 enum('COM','IND'),
xlxtmp3 enum('COM','IND'),
xlxgrd0 enum('NORMAL','ENGSAMP'),
xlxgrd1 enum('NORMAL','ENGSAMP'),
xlxgrd2 enum('NORMAL','ENGSAMP'),
xlxgrd3 enum('NORMAL','ENGSAMP'),
cputyp enum('MPC8260(HIP3)','MPC8260A(HIP4)','MPC8280(HIP7)','MPC8560'),
cpuspd enum('33MHZ','66MHZ','100MHZ','133MHZ','166MHZ','200MHZ','233MHZ','266MHZ','300MHZ','333MHZ','366MHZ','400MHZ','433MHZ','466MHZ','500MHZ','533MHZ','566MHZ','600MHZ','633MHZ','666MHZ','700MHZ','733MHZ','766MHZ','800MHZ','833MHZ','866MHZ','900MHZ','933MHZ','966MHZ','1000MHZ','1033MHZ','1066MHZ','1100MHZ','1133MHZ','1166MHZ','1200MHZ','1233MHZ','1266MHZ','1300MHZ','1333MHZ'),
cpmspd enum('33MHZ','66MHZ','100MHZ','133MHZ','166MHZ','200MHZ','233MHZ','266MHZ','300MHZ','333MHZ','366MHZ','400MHZ','433MHZ','466MHZ','500MHZ','533MHZ','566MHZ','600MHZ','633MHZ','666MHZ','700MHZ','733MHZ','766MHZ','800MHZ','833MHZ','866MHZ','900MHZ','933MHZ','966MHZ','1000MHZ','1033MHZ','1066MHZ','1100MHZ','1133MHZ','1166MHZ','1200MHZ','1233MHZ','1266MHZ','1300MHZ','1333MHZ'),
busspd enum('33MHZ','66MHZ','100MHZ','133MHZ','166MHZ','200MHZ','233MHZ','266MHZ','300MHZ','333MHZ','366MHZ','400MHZ','433MHZ','466MHZ','500MHZ','533MHZ','566MHZ','600MHZ','633MHZ','666MHZ','700MHZ','733MHZ','766MHZ','800MHZ','833MHZ','866MHZ','900MHZ','933MHZ','966MHZ','1000MHZ','1033MHZ','1066MHZ','1100MHZ','1133MHZ','1166MHZ','1200MHZ','1233MHZ','1266MHZ','1300MHZ','1333MHZ'),
hstype enum('AMCC-S2064A','Xilinx-Rockets'),
hschin enum('0','1','2','3','4','5','6','7','8','9','10','11','12','13','14','15','16'),
hschout enum('0','1','2','3','4','5','6','7','8','9','10','11','12','13','14','15','16'),
PRIMARY KEY (serno),
KEY serno (serno),
UNIQUE serno_2 (serno)
);
#
# Table structure for table 'log'
#
DROP TABLE IF EXISTS log;
CREATE TABLE log (
logno int(10) unsigned zerofill NOT NULL auto_increment,
serno int(10) unsigned zerofill NOT NULL,
date date NOT NULL,
details text NOT NULL,
PRIMARY KEY (logno),
KEY logno (logno, serno, date),
UNIQUE logno_2 (logno)
);

710
tools/bddb/defs.php
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@ -1,710 +0,0 @@
<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
// contains mysql user id and password - keep secret
require("config.php");
if (isset($_REQUEST['logout'])) {
Header("status: 401 Unauthorized");
Header("HTTP/1.0 401 Unauthorized");
Header("WWW-authenticate: basic realm=\"$bddb_label\"");
echo "<html><head><title>" .
"Access to '$bddb_label' Denied" .
"</title></head>\n";
echo "<body bgcolor=#ffffff><br></br><br></br><center><h1>" .
"You must be an Authorised User " .
"to access the '$bddb_label'" .
"</h1>\n</center></body></html>\n";
exit;
}
// contents of the various enumerated types - if first item is
// empty ('') then the enum is allowed to be null (ie "not null"
// is not set on the column)
// all column names in the database table
$columns = array(
'serno','ethaddr','date','batch',
'type','rev','location','comments',
'sdram0','sdram1','sdram2','sdram3',
'flash0','flash1','flash2','flash3',
'zbt0','zbt1','zbt2','zbt3','zbt4','zbt5','zbt6','zbt7',
'zbt8','zbt9','zbta','zbtb','zbtc','zbtd','zbte','zbtf',
'xlxtyp0','xlxtyp1','xlxtyp2','xlxtyp3',
'xlxspd0','xlxspd1','xlxspd2','xlxspd3',
'xlxtmp0','xlxtmp1','xlxtmp2','xlxtmp3',
'xlxgrd0','xlxgrd1','xlxgrd2','xlxgrd3',
'cputyp','cpuspd','cpmspd','busspd',
'hstype','hschin','hschout'
);
// board type
$type_vals = array('IO','CLP','DSP','INPUT','ALT-INPUT','DISPLAY');
// Xilinx fpga types
$xlxtyp_vals = array('','XCV300E','XCV400E','XCV600E','XC2V2000','XC2V3000','XC2V4000','XC2V6000','XC2VP2','XC2VP4','XC2VP7','XC2VP20','XC2VP30','XC2VP50','XC4VFX20','XC4VFX40','XC4VFX60','XC4VFX100','XC4VFX140');
// Xilinx fpga speeds
$xlxspd_vals = array('','6','7','8','4','5','9','10','11','12');
// Xilinx fpga temperatures (commercial or industrial)
$xlxtmp_vals = array('','COM','IND');
// Xilinx fpga grades (normal or engineering sample)
$xlxgrd_vals = array('','NORMAL','ENGSAMP');
// CPU types
$cputyp_vals = array('','MPC8260(HIP3)','MPC8260A(HIP4)','MPC8280(HIP7)','MPC8560');
// CPU/BUS/CPM clock speeds
$clk_vals = array('','33MHZ','66MHZ','100MHZ','133MHZ','166MHZ','200MHZ','233MHZ','266MHZ','300MHZ','333MHZ','366MHZ','400MHZ','433MHZ','466MHZ','500MHZ','533MHZ','566MHZ','600MHZ','633MHZ','666MHZ','700MHZ','733MHZ','766MHZ','800MHZ','833MHZ','866MHZ','900MHZ','933MHZ','966MHZ','1000MHZ','1033MHZ','1066MHZ','1100MHZ','1133MHZ','1166MHZ','1200MHZ','1233MHZ','1266MHZ','1300MHZ','1333MHZ');
// sdram sizes (nbits array is for eeprom config file)
$sdram_vals = array('','32M','64M','128M','256M','512M','1G','2G','4G');
$sdram_nbits = array(0,25,26,27,28,29,30,31,32);
// flash sizes (nbits array is for eeprom config file)
$flash_vals = array('','4M','8M','16M','32M','64M','128M','256M','512M','1G');
$flash_nbits = array(0,22,23,24,25,26,27,28,29,30);
// zbt ram sizes (nbits array is for write into eeprom config file)
$zbt_vals = array('','512K','1M','2M','4M','8M','16M');
$zbt_nbits = array(0,19,20,21,22,23,24);
// high-speed serial attributes
$hstype_vals = array('','AMCC-S2064A','Xilinx-Rockets');
$hschin_vals = array('0','1','2','3','4','5','6','7','8','9','10','11','12','13','14','15','16');
$hschout_vals = array('0','1','2','3','4','5','6','7','8','9','10','11','12','13','14','15','16');
// value filters - used when outputting html
function rev_filter($num) {
if ($num == 0)
return "001";
else
return sprintf("%03d", $num);
}
function text_filter($str) {
return urldecode($str);
}
mt_srand(time() | getmypid());
// set up MySQL connection
mysql_connect("", $mysql_user, $mysql_pw) || die("cannot connect");
mysql_select_db($mysql_db) || die("cannot select db");
// page header
function pg_head($title)
{
echo "<html>\n<head>\n";
echo "<link rel=stylesheet href=\"bddb.css\" type=\"text/css\" title=\"style sheet\"></link>\n";
echo "<title>$title</title>\n";
echo "</head>\n";
echo "<body>\n";
echo "<center><h1>$title</h1></center>\n";
echo "<hr></hr>\n";
}
// page footer
function pg_foot()
{
echo "<hr></hr>\n";
echo "<table width=\"100%\"><tr><td align=left>\n<address>" .
"If you have any problems, email " .
"<a href=\"mailto:Murray.Jensen@csiro.au\">" .
"Murray Jensen" .
"</a></address>\n" .
"</td><td align=right>\n" .
"<a href=\"index.php?logout=true\">logout</a>\n" .
"</td></tr></table>\n";
echo "<p><small><i>Made with " .
"<a href=\"http://kyber.dk/phpMyBuilder/\">" .
"Kyber phpMyBuilder</a></i></small></p>\n";
echo "</body>\n";
echo "</html>\n";
}
// some support functions
if (!function_exists('array_search')) {
function array_search($needle, $haystack, $strict = false) {
if (is_array($haystack) && count($haystack)) {
$ntype = gettype($needle);
foreach ($haystack as $key => $value) {
if ($value == $needle && (!$strict ||
gettype($value) == $ntype))
return $key;
}
}
return false;
}
}
if (!function_exists('in_array')) {
function in_array($needle, $haystack, $strict = false) {
if (is_array($haystack) && count($haystack)) {
$ntype = gettype($needle);
foreach ($haystack as $key => $value) {
if ($value == $needle && (!$strict ||
gettype($value) == $ntype))
return true;
}
}
return false;
}
}
function key_in_array($key, $array) {
return in_array($key, array_keys($array), true);
}
function enum_to_index($name, $vals) {
$index = array_search($GLOBALS[$name], $vals);
if ($vals[0] != '')
$index++;
return $index;
}
// fetch a value from an array - return empty string is not present
function get_key_value($key, $array) {
if (key_in_array($key, $array))
return $array[$key];
else
return '';
}
function fprintf() {
$n = func_num_args();
if ($n < 2)
return FALSE;
$a = func_get_args();
$fp = array_shift($a);
$x = "\$s = sprintf";
$sep = '(';
foreach ($a as $z) {
$x .= "$sep'$z'";
$sep = ',';
}
$x .= ');';
eval($x);
$l = strlen($s);
$r = fwrite($fp, $s, $l);
if ($r != $l)
return FALSE;
else
return TRUE;
}
// functions to display (print) a database table and its columns
function begin_table($ncols) {
global $table_ncols;
$table_ncols = $ncols;
echo "<table align=center width=\"100%\""
. " border=1 cellpadding=4 cols=$table_ncols>\n";
}
function begin_field($name, $span = 0) {
global $table_ncols;
echo "<tr valign=top>\n";
echo "\t<th align=center>$name</th>\n";
if ($span <= 0)
$span = $table_ncols - 1;
if ($span > 1)
echo "\t<td colspan=$span>\n";
else
echo "\t<td>\n";
}
function cont_field($span = 1) {
echo "\t</td>\n";
if ($span > 1)
echo "\t<td colspan=$span>\n";
else
echo "\t<td>\n";
}
function end_field() {
echo "\t</td>\n";
echo "</tr>\n";
}
function end_table() {
echo "</table>\n";
}
function print_field($name, $array, $size = 0, $filt='') {
begin_field($name);
if (key_in_array($name, $array))
$value = $array[$name];
else
$value = '';
if ($filt != '')
$value = $filt($value);
echo "\t\t<input name=$name value=\"$value\"";
if ($size > 0)
echo " size=$size maxlength=$size";
echo "></input>\n";
end_field();
}
function print_field_multiline($name, $array, $cols, $rows, $filt='') {
begin_field($name);
if (key_in_array($name, $array))
$value = $array[$name];
else
$value = '';
if ($filt != '')
$value = $filt($value);
echo "\t\t<textarea name=$name " .
"cols=$cols rows=$rows wrap=off>\n";
echo "$value";
echo "</textarea>\n";
end_field();
}
// print a mysql ENUM as an html RADIO INPUT
function print_enum($name, $array, $vals, $def = -1) {
begin_field($name);
if (key_in_array($name, $array))
$chk = array_search($array[$name], $vals, FALSE);
else
$chk = $def;
$nval = count($vals);
for ($i = 0; $i < $nval; $i++) {
$val = $vals[$i];
if ($val == '')
$pval = "none";
else
$pval = "$val";
printf("\t\t<input type=radio name=$name"
. " value=\"$val\"%s>$pval</input>\n",
$i == $chk ? " checked" : "");
}
end_field();
}
// print a mysql ENUM as an html SELECT INPUT
function print_enum_select($name, $array, $vals, $def = -1) {
begin_field($name);
echo "\t\t<select name=$name>\n";
if (key_in_array($name, $array))
$chk = array_search($array[$name], $vals, FALSE);
else
$chk = $def;
$nval = count($vals);
for ($i = 0; $i < $nval; $i++) {
$val = $vals[$i];
if ($val == '')
$pval = "none";
else
$pval = "$val";
printf("\t\t\t<option " .
"value=\"%s\"%s>%s</option>\n",
$val, $i == $chk ? " selected" : "", $pval);
}
echo "\t\t</select>\n";
end_field();
}
// print a group of mysql ENUMs (e.g. name0,name1,...) as an html SELECT
function print_enum_multi($base, $array, $vals, $cnt, $defs, $grp = 0) {
global $table_ncols;
if ($grp <= 0)
$grp = $cnt;
$ncell = $cnt / $grp;
$span = ($table_ncols - 1) / $ncell;
begin_field($base, $span);
$nval = count($vals);
for ($i = 0; $i < $cnt; $i++) {
if ($i > 0 && ($i % $grp) == 0)
cont_field($span);
$name = sprintf("%s%x", $base, $i);
echo "\t\t<select name=$name>\n";
if (key_in_array($name, $array))
$ai = array_search($array[$name], $vals, FALSE);
else {
if (key_in_array($i, $defs))
$ai = $defs[$i];
else
$ai = 0;
}
for ($j = 0; $j < $nval; $j++) {
$val = $vals[$j];
if ($val == '')
$pval = "&nbsp;";
else
$pval = "$val";
printf("\t\t\t<option " .
"value=\"%s\"%s>%s</option>\n",
$val,
$j == $ai ? " selected" : "",
$pval);
}
echo "\t\t</select>\n";
}
end_field();
}
// functions to handle the form input
// fetch all the parts of an "enum_multi" into a string suitable
// for a MySQL query
function gather_enum_multi_query($base, $cnt) {
$retval = '';
for ($i = 0; $i < $cnt; $i++) {
$name = sprintf("%s%x", $base, $i);
if (isset($_REQUEST[$name])) {
$retval .= sprintf(", %s='%s'",
$name, $_REQUEST[$name]);
}
}
return $retval;
}
// fetch all the parts of an "enum_multi" into a string suitable
// for a display e.g. in an html table cell
function gather_enum_multi_print($base, $cnt, $array) {
$retval = '';
for ($i = 0; $i < $cnt; $i++) {
$name = sprintf("%s%x", $base, $i);
if ($array[$name] != '') {
if ($retval != '')
$retval .= ',';
$retval .= $array[$name];
}
}
return $retval;
}
// fetch all the parts of an "enum_multi" into a string suitable
// for writing to the eeprom data file
function gather_enum_multi_write($base, $cnt, $vals, $xfrm = array()) {
$retval = '';
for ($i = 0; $i < $cnt; $i++) {
$name = sprintf("%s%x", $base, $i);
if ($GLOBALS[$name] != '') {
if ($retval != '')
$retval .= ',';
$index = enum_to_index($name, $vals);
if ($xfrm != array())
$retval .= $xfrm[$index];
else
$retval .= $index;
}
}
return $retval;
}
// count how many parts of an "enum_multi" are actually set
function count_enum_multi($base, $cnt) {
$retval = 0;
for ($i = 0; $i < $cnt; $i++) {
$name = sprintf("%s%x", $base, $i);
if (isset($_REQUEST[$name]))
$retval++;
}
return $retval;
}
// ethernet address functions
// generate a (possibly not unique) random vendor ethernet address
// (setting bit 6 in the ethernet address - motorola wise i.e. bit 0
// is the most significant bit - means it is not an assigned ethernet
// address - it is a "locally administered" address). Also, make sure
// it is NOT a multicast ethernet address (by setting bit 7 to 0).
// e.g. the first byte of all ethernet addresses generated here will
// have 2 in the bottom two bits (incidentally, these are the first
// two bits transmitted on the wire, since the octets in ethernet
// addresses are transmitted LSB first).
function gen_eth_addr($serno) {
$ethaddr_hgh = (mt_rand(0, 65535) & 0xfeff) | 0x0200;
$ethaddr_mid = mt_rand(0, 65535);
$ethaddr_low = mt_rand(0, 65535);
return sprintf("%02lx:%02lx:%02lx:%02lx:%02lx:%02lx",
$ethaddr_hgh >> 8, $ethaddr_hgh & 0xff,
$ethaddr_mid >> 8, $ethaddr_mid & 0xff,
$ethaddr_low >> 8, $ethaddr_low & 0xff);
}
// check that an ethernet address is valid
function eth_addr_is_valid($ethaddr) {
$ethbytes = split(':', $ethaddr);
if (count($ethbytes) != 6)
return FALSE;
for ($i = 0; $i < 6; $i++) {
$ethbyte = $ethbytes[$i];
if (!ereg('^[0-9a-f][0-9a-f]$', $ethbyte))
return FALSE;
}
return TRUE;
}
// write a simple eeprom configuration file
function write_eeprom_cfg_file() {
global $sernos, $nsernos, $bddb_cfgdir, $numerrs, $cfgerrs;
global $date, $batch, $type_vals, $rev;
global $sdram_vals, $sdram_nbits;
global $flash_vals, $flash_nbits;
global $zbt_vals, $zbt_nbits;
global $xlxtyp_vals, $xlxspd_vals, $xlxtmp_vals, $xlxgrd_vals;
global $cputyp, $cputyp_vals, $clk_vals;
global $hstype, $hstype_vals, $hschin, $hschout;
$numerrs = 0;
$cfgerrs = array();
for ($i = 0; $i < $nsernos; $i++) {
$serno = sprintf("%010d", $sernos[$i]);
$wfp = @fopen($bddb_cfgdir . "/$serno.cfg", "w");
if (!$wfp) {
$cfgerrs[$i] = 'file create fail';
$numerrs++;
continue;
}
set_file_buffer($wfp, 0);
if (!fprintf($wfp, "serno=%d\n", $sernos[$i])) {
$cfgerrs[$i] = 'cfg wr fail (serno)';
fclose($wfp);
$numerrs++;
continue;
}
if (!fprintf($wfp, "date=%s\n", $date)) {
$cfgerrs[$i] = 'cfg wr fail (date)';
fclose($wfp);
$numerrs++;
continue;
}
if ($batch != '') {
if (!fprintf($wfp, "batch=%s\n", $batch)) {
$cfgerrs[$i] = 'cfg wr fail (batch)';
fclose($wfp);
$numerrs++;
continue;
}
}
$typei = enum_to_index("type", $type_vals);
if (!fprintf($wfp, "type=%d\n", $typei)) {
$cfgerrs[$i] = 'cfg wr fail (type)';
fclose($wfp);
$numerrs++;
continue;
}
if (!fprintf($wfp, "rev=%d\n", $rev)) {
$cfgerrs[$i] = 'cfg wr fail (rev)';
fclose($wfp);
$numerrs++;
continue;
}
$s = gather_enum_multi_write("sdram", 4,
$sdram_vals, $sdram_nbits);
if ($s != '') {
$b = fprintf($wfp, "sdram=%s\n", $s);
if (!$b) {
$cfgerrs[$i] = 'cfg wr fail (sdram)';
fclose($wfp);
$numerrs++;
continue;
}
}
$s = gather_enum_multi_write("flash", 4,
$flash_vals, $flash_nbits);
if ($s != '') {
$b = fprintf($wfp, "flash=%s\n", $s);
if (!$b) {
$cfgerrs[$i] = 'cfg wr fail (flash)';
fclose($wfp);
$numerrs++;
continue;
}
}
$s = gather_enum_multi_write("zbt", 16,
$zbt_vals, $zbt_nbits);
if ($s != '') {
$b = fprintf($wfp, "zbt=%s\n", $s);
if (!$b) {
$cfgerrs[$i] = 'cfg wr fail (zbt)';
fclose($wfp);
$numerrs++;
continue;
}
}
$s = gather_enum_multi_write("xlxtyp", 4, $xlxtyp_vals);
if ($s != '') {
$b = fprintf($wfp, "xlxtyp=%s\n", $s);
if (!$b) {
$cfgerrs[$i] = 'cfg wr fail (xlxtyp)';
fclose($wfp);
$numerrs++;
continue;
}
}
$s = gather_enum_multi_write("xlxspd", 4, $xlxspd_vals);
if ($s != '') {
$b = fprintf($wfp, "xlxspd=%s\n", $s);
if (!$b) {
$cfgerrs[$i] = 'cfg wr fail (xlxspd)';
fclose($wfp);
$numerrs++;
continue;
}
}
$s = gather_enum_multi_write("xlxtmp", 4, $xlxtmp_vals);
if ($s != '') {
$b = fprintf($wfp, "xlxtmp=%s\n", $s);
if (!$b) {
$cfgerrs[$i] = 'cfg wr fail (xlxtmp)';
fclose($wfp);
$numerrs++;
continue;
}
}
$s = gather_enum_multi_write("xlxgrd", 4, $xlxgrd_vals);
if ($s != '') {
$b = fprintf($wfp, "xlxgrd=%s\n", $s);
if (!$b) {
$cfgerrs[$i] = 'cfg wr fail (xlxgrd)';
fclose($wfp);
$numerrs++;
continue;
}
}
if ($cputyp != '') {
$cputypi = enum_to_index("cputyp",$cputyp_vals);
$cpuspdi = enum_to_index("cpuspd", $clk_vals);
$busspdi = enum_to_index("busspd", $clk_vals);
$cpmspdi = enum_to_index("cpmspd", $clk_vals);
$b = fprintf($wfp, "cputyp=%d\ncpuspd=%d\n" .
"busspd=%d\ncpmspd=%d\n",
$cputypi, $cpuspdi, $busspdi, $cpmspdi);
if (!$b) {
$cfgerrs[$i] = 'cfg wr fail (cputyp)';
fclose($wfp);
$numerrs++;
continue;
}
}
if ($hstype != '') {
$hstypei = enum_to_index("hstype",$hstype_vals);
$b = fprintf($wfp, "hstype=%d\n" .
"hschin=%s\nhschout=%s\n",
$hstypei, $hschin, $hschout);
if (!$b) {
$cfgerrs[$i] = 'cfg wr fail (hstype)';
fclose($wfp);
$numerrs++;
continue;
}
}
if (!fclose($wfp)) {
$cfgerrs[$i] = 'file cls fail';
$numerrs++;
}
}
return $numerrs;
}
?>

65
tools/bddb/dodelete.php
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@ -1,65 +0,0 @@
<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
// dodelete page (hymod_bddb / boards)
require("defs.php");
pg_head("$bddb_label - Delete Board Results");
if (!isset($_REQUEST['serno']))
die("the board serial number was not specified");
$serno=intval($_REQUEST['serno']);
mysql_query("delete from boards where serno=$serno");
if(mysql_errno()) {
$errstr = mysql_error();
echo "\t<font size=+4>\n";
echo "\t\t<p>\n";
echo "\t\t\tThe following error was encountered:\n";
echo "\t\t</p>\n";
echo "\t\t<center>\n";
printf("\t\t\t<b>%s</b>\n", $errstr);
echo "\t\t</center>\n";
echo "\t</font>\n";
}
else {
echo "\t<font size=+2>\n";
echo "\t\t<p>\n";
echo "\t\t\tThe board with serial number <b>$serno</b> was"
. " successfully deleted\n";
mysql_query("delete from log where serno=$serno");
if (mysql_errno()) {
$errstr = mysql_error();
echo "\t\t\t<font size=+4>\n";
echo "\t\t\t\t<p>\n";
echo "\t\t\t\t\tBut the following error occurred " .
"when deleting the log entries:\n";
echo "\t\t\t\t</p>\n";
echo "\t\t\t\t<center>\n";
printf("\t\t\t\t\t<b>%s</b>\n", $errstr);
echo "\t\t\t\t</center>\n";
echo "\t\t\t</font>\n";
}
echo "\t\t</p>\n";
echo "\t</font>\n";
}
?>
<p>
<table width="100%">
<tr>
<td align=center>
<a href="browse.php">Back to Browse</a>
</td>
<td align=center>
<a href="index.php">Back to Start</a>
</td>
</tr>
</table>
<?php
pg_foot();
?>

57
tools/bddb/dodellog.php
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@ -1,57 +0,0 @@
<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
// dodelete page (hymod_bddb / boards)
require("defs.php");
pg_head("$bddb_label - Delete Log Entry Results");
if (!isset($_REQUEST['serno']))
die("the board serial number was not specified");
$serno=intval($_REQUEST['serno']);
if (!isset($_REQUEST['logno']) || $_REQUEST['logno'] == 0)
die("the log entry number not specified!");
$logno=$_REQUEST['logno'];
mysql_query("delete from log where serno=$serno and logno=$logno");
if(mysql_errno()) {
$errstr = mysql_error();
echo "\t<font size=+4>\n";
echo "\t\t<p>\n";
echo "\t\t\tThe following error was encountered:\n";
echo "\t\t</p>\n";
echo "\t\t<center>\n";
printf("\t\t\t<b>%s</b>\n", $errstr);
echo "\t\t</center>\n";
echo "\t</font>\n";
}
else {
echo "\t<font size=+2>\n";
echo "\t\t<p>\n";
echo "\t\t\tThe log entry with log number <b>$logno</b>\n";
echo "\t\t\tand serial number <b>$serno</b> ";
echo "was successfully deleted\n";
echo "\t\t</p>\n";
echo "\t</font>\n";
}
?>
<p>
<table width="100%">
<tr>
<td align=center>
<a href="brlog.php?serno=<?php echo "$serno"; ?>">Back to Log</a>
</td>
<td align=center>
<a href="index.php">Back to Start</a>
</td>
</tr>
</table>
<?php
pg_foot();
?>

186
tools/bddb/doedit.php
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@ -1,186 +0,0 @@
<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
// doedit page (hymod_bddb / boards)
require("defs.php");
pg_head("$bddb_label - Edit Board Results");
if (!isset($_REQUEST['serno']) || $_REQUEST['serno'] == '')
die("the board serial number was not specified");
$serno=intval($_REQUEST['serno']);
$query="update boards set";
if (isset($_REQUEST['ethaddr'])) {
$ethaddr=$_REQUEST['ethaddr'];
if (!eth_addr_is_valid($ethaddr))
die("ethaddr is invalid ('$ethaddr')");
$query.=" ethaddr='$ethaddr',";
}
if (isset($_REQUEST['date'])) {
$date=$_REQUEST['date'];
list($y, $m, $d) = split("-", $date);
if (!checkdate($m, $d, $y) || $y < 1999)
die("date is invalid (input '$date', " .
"yyyy-mm-dd '$y-$m-$d')");
$query.=" date='$date'";
}
if (isset($_REQUEST['batch'])) {
$batch=$_REQUEST['batch'];
if (strlen($batch) > 32)
die("batch field too long (>32)");
$query.=", batch='$batch'";
}
if (isset($_REQUEST['type'])) {
$type=$_REQUEST['type'];
if (!in_array($type, $type_vals))
die("Invalid type ($type) specified");
$query.=", type='$type'";
}
if (isset($_REQUEST['rev'])) {
$rev=$_REQUEST['rev'];
if (($rev = intval($rev)) <= 0 || $rev > 255)
die("Revision number is invalid ($rev)");
$query.=sprintf(", rev=%d", $rev);
}
if (isset($_REQUEST['location'])) {
$location=$_REQUEST['location'];
if (strlen($location) > 64)
die("location field too long (>64)");
$query.=", location='$location'";
}
if (isset($_REQUEST['comments']))
$comments=$_REQUEST['comments'];
$query.=", comments='" . rawurlencode($comments) . "'";
$query.=gather_enum_multi_query("sdram", 4);
$query.=gather_enum_multi_query("flash", 4);
$query.=gather_enum_multi_query("zbt", 16);
$query.=gather_enum_multi_query("xlxtyp", 4);
$nxlx = count_enum_multi("xlxtyp", 4);
$query.=gather_enum_multi_query("xlxspd", 4);
if (count_enum_multi("xlxspd", 4) != $nxlx)
die("number of xilinx speeds not same as number of types");
$query.=gather_enum_multi_query("xlxtmp", 4);
if (count_enum_multi("xlxtmp", 4) != $nxlx)
die("number of xilinx temps. not same as number of types");
$query.=gather_enum_multi_query("xlxgrd", 4);
if (count_enum_multi("xlxgrd", 4) != $nxlx)
die("number of xilinx grades not same as number of types");
if (isset($_REQUEST['cputyp'])) {
$cputyp=$_REQUEST['cputyp'];
$query.=", cputyp='$cputyp'";
if (!isset($_REQUEST['cpuspd']) || $_REQUEST['cpuspd'] == '')
die("must specify cpu speed if cpu type is defined");
$cpuspd=$_REQUEST['cpuspd'];
$query.=", cpuspd='$cpuspd'";
if (!isset($_REQUEST['cpmspd']) || $_REQUEST['cpmspd'] == '')
die("must specify cpm speed if cpu type is defined");
$cpmspd=$_REQUEST['cpmspd'];
$query.=", cpmspd='$cpmspd'";
if (!isset($_REQUEST['busspd']) || $_REQUEST['busspd'] == '')
die("must specify bus speed if cpu type is defined");
$busspd=$_REQUEST['busspd'];
$query.=", busspd='$busspd'";
}
else {
if (isset($_REQUEST['cpuspd']))
die("can't specify cpu speed if there is no cpu");
if (isset($_REQUEST['cpmspd']))
die("can't specify cpm speed if there is no cpu");
if (isset($_REQUEST['busspd']))
die("can't specify bus speed if there is no cpu");
}
if (isset($_REQUEST['hschin'])) {
$hschin=$_REQUEST['hschin'];
if (($hschin = intval($hschin)) < 0 || $hschin > 4)
die("Invalid number of hs input chans ($hschin)");
}
else
$hschin = 0;
if (isset($_REQUEST['hschout'])) {
$hschout=$_REQUEST['hschout'];
if (($hschout = intval($hschout)) < 0 || $hschout > 4)
die("Invalid number of hs output chans ($hschout)");
}
else
$hschout = 0;
if (isset($_REQUEST['hstype'])) {
$hstype=$_REQUEST['hstype'];
$query.=", hstype='$hstype'";
}
else {
if ($_REQUEST['hschin'] != 0)
die("number of high-speed input channels must be zero"
. " if high-speed chip is not present");
if ($_REQUEST['hschout'] != 0)
die("number of high-speed output channels must be zero"
. " if high-speed chip is not present");
}
$query.=", hschin='$hschin'";
$query.=", hschout='$hschout'";
$query.=" where serno=$serno";
mysql_query($query);
if(mysql_errno()) {
$errstr = mysql_error();
echo "\t<font size=+4>\n";
echo "\t\t<p>\n";
echo "\t\t\tThe following error was encountered:\n";
echo "\t\t</p>\n";
echo "\t\t<center>\n";
printf("\t\t\t<b>%s</b>\n", $errstr);
echo "\t\t</center>\n";
echo "\t</font>\n";
}
else {
$sernos = array($serno);
$nsernos = 1;
write_eeprom_cfg_file();
echo "\t<font size=+2>\n";
echo "\t\t<p>\n";
echo "\t\t\tThe board with serial number <b>$serno</b> was"
. " successfully updated";
if ($numerrs > 0) {
$errstr = $cfgerrs[0];
echo "<br>\n\t\t\t";
echo "(but the cfg file update failed: $errstr)";
}
echo "\n";
echo "\t\t</p>\n";
echo "\t</font>\n";
}
?>
<p>
<table align=center width="100%">
<tr>
<td align=center><a href="browse.php">Back to Browse</a></td>
<td align=center><a href="index.php">Back to Start</a></td>
</tr>
</table>
<?php
pg_foot();
?>

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tools/bddb/doedlog.php
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<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
// doedit page (hymod_bddb / boards)
require("defs.php");
pg_head("$bddb_label - Edit Log Entry Results");
if (!isset($_REQUEST['serno']) || $_REQUEST['serno'] == '')
die("the board serial number was not specified");
$serno=intval($_REQUEST['serno']);
if (!isset($_REQUEST['logno']) || $_REQUEST['logno'] == '')
die("log number not specified!");
$logno=intval($_REQUEST['logno']);
$query="update log set";
if (isset($_REQUEST['date'])) {
$date=$_REQUEST['date'];
list($y, $m, $d) = split("-", $date);
if (!checkdate($m, $d, $y) || $y < 1999)
die("date is invalid (input '$date', " .
"yyyy-mm-dd '$y-$m-$d')");
$query.=" date='$date'";
}
if (isset($_REQUEST['who'])) {
$who=$_REQUEST['who'];
$query.=", who='" . $who . "'";
}
if (isset($_REQUEST['details'])) {
$details=$_REQUEST['details'];
$query.=", details='" . rawurlencode($details) . "'";
}
$query.=" where serno=$serno and logno=$logno";
mysql_query($query);
if(mysql_errno()) {
$errstr = mysql_error();
echo "\t<font size=+4>\n";
echo "\t\t<p>\n";
echo "\t\t\tThe following error was encountered:\n";
echo "\t\t</p>\n";
echo "\t\t<center>\n";
printf("\t\t\t<b>%s</b>\n", $errstr);
echo "\t\t</center>\n";
echo "\t</font>\n";
}
else {
echo "\t<font size=+2>\n";
echo "\t\t<p>\n";
echo "\t\t\tThe log entry with log number <b>$logno</b> and\n";
echo "\t\t\tserial number <b>$serno</b> ";
echo "was successfully updated\n";
echo "\t\t</p>\n";
echo "\t</font>\n";
}
?>
<p>
<table align=center width="100%">
<tr>
<td align=center><a href="brlog.php?serno=<?php echo "$serno"; ?>">Back to Log</a></td>
<td align=center><a href="index.php">Back to Start</a></td>
</tr>
</table>
<?php
pg_foot();
?>

230
tools/bddb/donew.php
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<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
// doedit page (hymod_bddb / boards)
require("defs.php");
pg_head("$bddb_label - Board Registration Results");
if (isset($_REQUEST['serno'])) {
$serno=$_REQUEST['serno'];
die("serial number must not be set ($serno) when Creating!");
}
$query="update boards set";
list($y, $m, $d) = split("-", $date);
if (!checkdate($m, $d, $y) || $y < 1999)
die("date is invalid (input '$date', yyyy-mm-dd '$y-$m-$d')");
$query.=" date='$date'";
if ($batch != '') {
if (strlen($batch) > 32)
die("batch field too long (>32)");
$query.=", batch='$batch'";
}
if (!in_array($type, $type_vals))
die("Invalid type ($type) specified");
$query.=", type='$type'";
if (($rev = intval($rev)) <= 0 || $rev > 255)
die("Revision number is invalid ($rev)");
$query.=sprintf(", rev=%d", $rev);
$query.=gather_enum_multi_query("sdram", 4);
$query.=gather_enum_multi_query("flash", 4);
$query.=gather_enum_multi_query("zbt", 16);
$query.=gather_enum_multi_query("xlxtyp", 4);
$nxlx = count_enum_multi("xlxtyp", 4);
$query.=gather_enum_multi_query("xlxspd", 4);
if (count_enum_multi("xlxspd", 4) != $nxlx)
die("number of xilinx speeds not same as number of types");
$query.=gather_enum_multi_query("xlxtmp", 4);
if (count_enum_multi("xlxtmp", 4) != $nxlx)
die("number of xilinx temps. not same as number of types");
$query.=gather_enum_multi_query("xlxgrd", 4);
if (count_enum_multi("xlxgrd", 4) != $nxlx)
die("number of xilinx grades not same as number of types");
if ($cputyp == '') {
if ($cpuspd != '')
die("can't specify cpu speed if there is no cpu");
if ($cpmspd != '')
die("can't specify cpm speed if there is no cpu");
if ($busspd != '')
die("can't specify bus speed if there is no cpu");
}
else {
$query.=", cputyp='$cputyp'";
if ($cpuspd == '')
die("must specify cpu speed if cpu type is defined");
$query.=", cpuspd='$cpuspd'";
if ($cpmspd == '')
die("must specify cpm speed if cpu type is defined");
$query.=", cpmspd='$cpmspd'";
if ($busspd == '')
die("must specify bus speed if cpu type is defined");
$query.=", busspd='$busspd'";
}
if (($hschin = intval($hschin)) < 0 || $hschin > 4)
die("Invalid number of hs input chans ($hschin)");
if (($hschout = intval($hschout)) < 0 || $hschout > 4)
die("Invalid number of hs output chans ($hschout)");
if ($hstype == '') {
if ($hschin != 0)
die("number of high-speed input channels must be zero"
. " if high-speed chip is not present");
if ($hschout != 0)
die("number of high-speed output channels must be zero"
. " if high-speed chip is not present");
}
else
$query.=", hstype='$hstype'";
$query.=", hschin='$hschin'";
$query.=", hschout='$hschout'";
// echo "final query = '$query'<br>\n";
$quant = intval($quant);
if ($quant <= 0) $quant = 1;
$sernos = array();
if ($geneths)
$ethaddrs = array();
$sqlerr = '';
while ($quant-- > 0) {
mysql_query("insert into boards (serno) values (null)");
if (mysql_errno()) {
$sqlerr = mysql_error();
break;
}
$serno = mysql_insert_id();
if (!$serno) {
$sqlerr = "couldn't allocate new serial number";
break;
}
mysql_query($query . " where serno=$serno");
if (mysql_errno()) {
$sqlerr = mysql_error();
break;
}
array_push($sernos, $serno);
if ($geneths) {
$ethaddr = gen_eth_addr($serno);
mysql_query("update boards set ethaddr='$ethaddr'" .
" where serno=$serno");
if (mysql_errno()) {
$sqlerr = mysql_error();
array_push($ethaddrs,
"<font color=#ff0000><b>" .
"db save fail" .
"</b></font>");
break;
}
array_push($ethaddrs, $ethaddr);
}
}
$nsernos = count($sernos);
if ($nsernos > 0) {
write_eeprom_cfg_file();
echo "<font size=+2>\n";
echo "\t<p>\n";
echo "\t\tThe following board serial numbers were"
. " successfully allocated";
if ($numerrs > 0)
echo " (but with $numerrs cfg file error" .
($numerrs > 1 ? "s" : "") . ")";
echo ":\n";
echo "\t</p>\n";
echo "</font>\n";
echo "<table align=center width=\"100%\">\n";
echo "<tr>\n";
echo "\t<th>Serial Number</th>\n";
if ($numerrs > 0)
echo "\t<th>Cfg File Errs</th>\n";
if ($geneths)
echo "\t<th>Ethernet Address</th>\n";
echo "</tr>\n";
for ($i = 0; $i < $nsernos; $i++) {
$serno = sprintf("%010d", $sernos[$i]);
echo "<tr>\n";
echo "\t<td align=center><font size=+2>" .
"<b>$serno</b></font></td>\n";
if ($numerrs > 0) {
if (($errstr = $cfgerrs[$i]) == '')
$errstr = '&nbsp;';
echo "\t<td align=center>" .
"<font size=+2 color=#ff0000><b>" .
$errstr .
"</b></font></td>\n";
}
if ($geneths) {
echo "\t<td align=center>" .
"<font size=+2 color=#00ff00><b>" .
$ethaddrs[$i] .
"</b></font></td>\n";
}
echo "</tr>\n";
}
echo "</table>\n";
}
if ($sqlerr != '') {
echo "\t<font size=+4>\n";
echo "\t\t<p>\n";
echo "\t\t\tThe following SQL error was encountered:\n";
echo "\t\t</p>\n";
echo "\t\t<center>\n";
printf("\t\t\t<b>%s</b>\n", $sqlerr);
echo "\t\t</center>\n";
echo "\t</font>\n";
}
?>
<p>
<table align=center width="100%">
<tr>
<td align=center><a href="browse.php">Go to Browse</a></td>
<td align=center><a href="index.php">Back to Start</a></td>
</tr>
</table>
<?php
pg_foot();
?>

86
tools/bddb/donewlog.php
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@ -1,86 +0,0 @@
<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
// doedit page (hymod_bddb / boards)
require("defs.php");
pg_head("$bddb_label - Add Log Entry Results");
if (!isset($_REQUEST['serno']) || $_REQUEST['serno'] == '')
die("serial number not specified!");
$serno=intval($_REQUEST['serno']);
if (isset($_REQUEST['logno'])) {
$logno=$_REQUEST['logno'];
die("log number must not be set ($logno) when Creating!");
}
$query="update log set serno=$serno";
list($y, $m, $d) = split("-", $date);
if (!checkdate($m, $d, $y) || $y < 1999)
die("date is invalid (input '$date', yyyy-mm-dd '$y-$m-$d')");
$query.=", date='$date'";
if (isset($_REQUEST['who'])) {
$who=$_REQUEST['who'];
$query.=", who='" . $who . "'";
}
if (isset($_REQUEST['details'])) {
$details=$_REQUEST['details'];
$query.=", details='" . rawurlencode($details) . "'";
}
// echo "final query = '$query'<br>\n";
$sqlerr = '';
mysql_query("insert into log (logno) values (null)");
if (mysql_errno())
$sqlerr = mysql_error();
else {
$logno = mysql_insert_id();
if (!$logno)
$sqlerr = "couldn't allocate new serial number";
else {
mysql_query($query . " where logno=$logno");
if (mysql_errno())
$sqlerr = mysql_error();
}
}
if ($sqlerr == '') {
echo "<font size=+2>\n";
echo "\t<p>\n";
echo "\t\tA log entry with log number '$logno' was " .
"added to the board with serial number '$serno'\n";
echo "\t</p>\n";
echo "</font>\n";
}
else {
echo "\t<font size=+4>\n";
echo "\t\t<p>\n";
echo "\t\t\tThe following SQL error was encountered:\n";
echo "\t\t</p>\n";
echo "\t\t<center>\n";
printf("\t\t\t<b>%s</b>\n", $sqlerr);
echo "\t\t</center>\n";
echo "\t</font>\n";
}
?>
<p></p>
<table width="100%">
<tr>
<td align=center><a href="brlog.php?serno=<?php echo "$serno"; ?>">Go to Browse</a></td>
<td align=center><a href="index.php">Back to Start</a></td>
</tr>
</table>
<?php
pg_foot();
?>

131
tools/bddb/edit.php
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@ -1,131 +0,0 @@
<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
// edit page (hymod_bddb / boards)
require("defs.php");
pg_head("$bddb_label - Edit Board Registration");
if ($serno == 0)
die("serial number not specified or invalid!");
$pserno = sprintf("%010d", $serno);
echo "<center><b><font size=+2>";
echo "Board Serial Number: $pserno";
echo "</font></b></center>\n";
?>
<p>
<form action=doedit.php method=POST>
<?php
echo "<input type=hidden name=serno value=$serno>\n";
$r=mysql_query("select * from boards where serno=$serno");
$row=mysql_fetch_array($r);
if(!$row) die("no record of serial number '$serno' in database");
begin_table(5);
// ethaddr char(17)
print_field("ethaddr", $row, 17);
// date date
print_field("date", $row);
// batch char(32)
print_field("batch", $row, 32);
// type enum('IO','CLP','DSP','INPUT','ALT-INPUT','DISPLAY')
print_enum("type", $row, $type_vals);
// rev tinyint(3) unsigned zerofill
print_field("rev", $row, 3, 'rev_filter');
// location char(64)
print_field("location", $row, 64);
// comments text
print_field_multiline("comments", $row, 60, 10, 'text_filter');
// sdram[0-3] enum('32M','64M','128M','256M')
print_enum_multi("sdram", $row, $sdram_vals, 4, array());
// flash[0-3] enum('4M','8M','16M','32M','64M')
print_enum_multi("flash", $row, $flash_vals, 4, array());
// zbt[0-f] enum('512K','1M','2M','4M')
print_enum_multi("zbt", $row, $zbt_vals, 16, array());
// xlxtyp[0-3] enum('XCV300E','XCV400E','XCV600E')
print_enum_multi("xlxtyp", $row, $xlxtyp_vals, 4, array(), 1);
// xlxspd[0-3] enum('6','7','8')
print_enum_multi("xlxspd", $row, $xlxspd_vals, 4, array(), 1);
// xlxtmp[0-3] enum('COM','IND')
print_enum_multi("xlxtmp", $row, $xlxtmp_vals, 4, array(), 1);
// xlxgrd[0-3] enum('NORMAL','ENGSAMP')
print_enum_multi("xlxgrd", $row, $xlxgrd_vals, 4, array(), 1);
// cputyp enum('MPC8260(HIP3)','MPC8260A(HIP4)','MPC8280(HIP7)')
print_enum("cputyp", $row, $cputyp_vals);
// cpuspd enum('33MHZ','66MHZ','100MHZ','133MHZ','166MHZ','200MHZ','233MHZ','266MHZ')
print_enum_select("cpuspd", $row, $clk_vals);
// cpmspd enum('33MHZ','66MHZ','100MHZ','133MHZ','166MHZ','200MHZ','233MHZ','266MHZ')
print_enum_select("cpmspd", $row, $clk_vals);
// busspd enum('33MHZ','66MHZ','100MHZ','133MHZ','166MHZ','200MHZ','233MHZ','266MHZ')
print_enum_select("busspd", $row, $clk_vals);
// hstype enum('AMCC-S2064A')
print_enum("hstype", $row, $hstype_vals);
// hschin enum('0','1','2','3','4')
print_enum("hschin", $row, $hschin_vals);
// hschout enum('0','1','2','3','4')
print_enum("hschout", $row, $hschout_vals);
end_table();
echo "<p>\n";
echo "<center><b>";
echo "<font color=#ff0000>WARNING: NO UNDO ON DELETE!</font>";
echo "<br></br>\n";
echo "<tt>[ <a href=\"dodelete.php?serno=$serno\">delete</a> ]</tt>";
echo "</b></center>\n";
echo "</p>\n";
?>
<p>
<table align=center width="100%">
<tr>
<td align=center>
<input type=submit value=Edit>
</td>
<td>
&nbsp;
</td>
<td align=center>
<input type=reset value=Reset>
</td>
<td>
&nbsp;
</td>
<td align=center>
<a href="index.php">Back to Start</a>
</td>
</tr>
</table>
</p>
</form>
<?php
pg_foot();
?>

86
tools/bddb/edlog.php
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@ -1,86 +0,0 @@
<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
// edit page (hymod_bddb / boards)
require("defs.php");
pg_head("$bddb_label - Edit Board Log Entry");
if (!isset($_REQUEST['serno']) || $_REQUEST['serno'] == '')
die("serial number not specified!");
$serno=intval($_REQUEST['serno']);
if (!isset($_REQUEST['logno']) || $_REQUEST['logno'] == '')
die("log number not specified!");
$logno=intval($_REQUEST['logno']);
$pserno = sprintf("%010d", $serno);
$plogno = sprintf("%010d", $logno);
echo "<center><b><font size=+2>";
echo "Board Serial Number: $pserno, Log Number: $plogno";
echo "</font></b></center>\n";
?>
<p>
<form action=doedlog.php method=POST>
<?php
echo "<input type=hidden name=serno value=$serno>\n";
echo "<input type=hidden name=logno value=$logno>\n";
$r=mysql_query("select * from log where serno=$serno and logno=$logno");
$row=mysql_fetch_array($r);
if(!$row)
die("no record of log entry with serial number '$serno' " .
"and log number '$logno' in database");
begin_table(3);
// date date
print_field("date", $row);
// who char(20)
print_field("who", $row);
// details text
print_field_multiline("details", $row, 60, 10, 'text_filter');
end_table();
echo "<p>\n";
echo "<center><b>";
echo "<font color=#ff0000>WARNING: NO UNDO ON DELETE!</font>";
echo "<br></br>\n";
echo "<tt>[ <a href=\"dodellog.php?serno=$serno&logno=$logno\">delete</a> ]</tt>";
echo "</b></center>\n";
echo "</p>\n";
?>
<p>
<table align=center width="100%">
<tr>
<td align=center>
<input type=submit value=Edit>
</td>
<td>
&nbsp;
</td>
<td align=center>
<input type=reset value=Reset>
</td>
<td>
&nbsp;
</td>
<td align=center>
<a href="index.php">Back to Start</a>
</td>
</tr>
</table>
</p>
</form>
<?php
pg_foot();
?>

33
tools/bddb/execute.php
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@ -1,33 +0,0 @@
<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
$serno=isset($_REQUEST['serno'])?$_REQUEST['serno']:'';
$submit=isset($_REQUEST['submit'])?$_REQUEST['submit']:"[NOT SET]";
switch ($submit) {
case "New":
require("new.php");
break;
case "Edit":
require("edit.php");
break;
case "Browse":
require("browse.php");
break;
case "Log":
require("brlog.php");
break;
default:
require("badsubmit.php");
break;
}
?>

38
tools/bddb/index.php
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@ -1,38 +0,0 @@
<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
require("defs.php");
pg_head("$bddb_label");
?>
<font size="+4">
<form action=execute.php method=POST>
<table width="100%" cellspacing=10 cellpadding=10>
<tr>
<td align=center>
<input type=submit name=submit value="New"></input>
</td>
<td align=center>
<input type=submit name=submit value="Edit"></input>
</td>
<td align=center>
<input type=submit name=submit value="Browse"></input>
</td>
<td align=center>
<input type=submit name=submit value="Log"></input>
</td>
</tr>
<tr>
<td align=center colspan=4>
<b>Serial Number:</b>
<input type=text name=serno size=10 maxsize=10 value=""></input>
</td>
</tr>
</table>
</form>
</font>
<?php
pg_foot();
?>

120
tools/bddb/new.php
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@ -1,120 +0,0 @@
<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
// edit page (hymod_bddb / boards)
require("defs.php");
pg_head("$bddb_label - New Board Registration");
?>
<form action=donew.php method=POST>
<p></p>
<?php
$serno=intval($serno);
// if a serial number was supplied, fetch the record
// and use its contents as defaults
if ($serno != 0) {
$r=mysql_query("select * from boards where serno=$serno");
$row=mysql_fetch_array($r);
if(!$row)die("no record of serial number '$serno' in database");
}
else
$row = array();
begin_table(5);
// date date
print_field("date", array('date' => date("Y-m-d")));
// batch char(32)
print_field("batch", $row, 32);
// type enum('IO','CLP','DSP','INPUT','ALT-INPUT','DISPLAY')
print_enum("type", $row, $type_vals, 0);
// rev tinyint(3) unsigned zerofill
print_field("rev", $row, 3, 'rev_filter');
// sdram[0-3] enum('32M','64M','128M','256M')
print_enum_multi("sdram", $row, $sdram_vals, 4, array(2));
// flash[0-3] enum('4M','8M','16M','32M','64M')
print_enum_multi("flash", $row, $flash_vals, 4, array(2));
// zbt[0-f] enum('512K','1M','2M','4M')
print_enum_multi("zbt", $row, $zbt_vals, 16, array(2, 2));
// xlxtyp[0-3] enum('XCV300E','XCV400E','XCV600E')
print_enum_multi("xlxtyp", $row, $xlxtyp_vals, 4, array(1), 1);
// xlxspd[0-3] enum('6','7','8')
print_enum_multi("xlxspd", $row, $xlxspd_vals, 4, array(1), 1);
// xlxtmp[0-3] enum('COM','IND')
print_enum_multi("xlxtmp", $row, $xlxtmp_vals, 4, array(1), 1);
// xlxgrd[0-3] enum('NORMAL','ENGSAMP')
print_enum_multi("xlxgrd", $row, $xlxgrd_vals, 4, array(1), 1);
// cputyp enum('MPC8260(HIP3)','MPC8260A(HIP4)','MPC8280(HIP7)')
print_enum("cputyp", $row, $cputyp_vals, 1);
// cpuspd enum('33MHZ','66MHZ','100MHZ','133MHZ','166MHZ','200MHZ','233MHZ','266MHZ')
print_enum_select("cpuspd", $row, $clk_vals, 4);
// cpmspd enum('33MHZ','66MHZ','100MHZ','133MHZ','166MHZ','200MHZ','233MHZ','266MHZ')
print_enum_select("cpmspd", $row, $clk_vals, 4);
// busspd enum('33MHZ','66MHZ','100MHZ','133MHZ','166MHZ','200MHZ','233MHZ','266MHZ')
print_enum_select("busspd", $row, $clk_vals, 2);
// hstype enum('AMCC-S2064A')
print_enum("hstype", $row, $hstype_vals, 1);
// hschin enum('0','1','2','3','4')
print_enum("hschin", $row, $hschin_vals, 4);
// hschout enum('0','1','2','3','4')
print_enum("hschout", $row, $hschout_vals, 4);
end_table();
?>
<p></p>
<table width="100%">
<tr>
<td align=center colspan=3>
Allocate
<input type=text name=quant size=2 maxlength=2 value=" 1">
board serial number(s)
</td>
</tr>
<tr>
<td align=center colspan=3>
<input type=checkbox name=geneths checked>
Generate Ethernet Address(es)
</td>
</tr>
<tr>
<td colspan=3>
&nbsp;
</td>
</tr>
<tr>
<td align=center>
<input type=submit value="Register Board">
</td>
<td>
&nbsp;
</td>
<td align=center>
<input type=reset value="Reset Form Contents">
</td>
</tr>
</table>
</form>
<?php
pg_foot();
?>

54
tools/bddb/newlog.php
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@ -1,54 +0,0 @@
<?php // php pages made with phpMyBuilder <http://kyber.dk/phpMyBuilder> ?>
<?php
// (C) Copyright 2001
// Murray Jensen <Murray.Jensen@csiro.au>
// CSIRO Manufacturing Science and Technology, Preston Lab
// edit page (hymod_bddb / boards)
require("defs.php");
pg_head("$bddb_label - New Log Entry");
if (!isset($_REQUEST['serno']) || $_REQUEST['serno'] == '')
die("serial number not specified or invalid!");
$serno=intval($_REQUEST['serno']);
if (isset($_REQUEST['logno'])) {
$logno=$_REQUEST['logno'];
die("log number must not be specified when adding! ($logno)");
}
?>
<form action=donewlog.php method=POST>
<p></p>
<?php
echo "<input type=hidden name=serno value=$serno>\n";
begin_table(3);
// date date
print_field("date", array('date' => date("Y-m-d")));
// who char(20)
print_field("who", array());
// details text
print_field_multiline("details", array(), 60, 10, 'text_filter');
end_table();
?>
<p></p>
<table width="100%">
<tr>
<td align=center>
<input type=submit value="Add Log Entry">
</td>
<td align=center>
<input type=reset value="Reset Form Contents">
</td>
</tr>
</table>
</form>
<?php
pg_foot();
?>