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dm: ns16550: Add support for reg-offset property 

reg-offset is the part of standard 8250 binding in the kernel.
It is shifting start of address space by reg-offset.
On Xilinx platform this offset is typically 0x1000.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Moved the new field to the end of the struct to avoid problems:
Signed-off-by: Simon Glass <sjg@chromium.org>
utp
Michal Simek 2016-02-16 16:17:49 +01:00 committed by Simon Glass
parent 4428f3c87a
commit 59b35ddd26
2 changed files with 5 additions and 2 deletions
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6
drivers/serial/ns16550.c
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@ -105,7 +105,7 @@ static void ns16550_writeb(NS16550_t port, int offset, int value)
* As far as we know it doesn't make sense to support selection of
* these options at run-time, so use the existing CONFIG options.
*/
serial_out_shift(addr, plat->reg_shift, value);
serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
}
static int ns16550_readb(NS16550_t port, int offset)
@ -116,7 +116,7 @@ static int ns16550_readb(NS16550_t port, int offset)
offset *= 1 << plat->reg_shift;
addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset;
return serial_in_shift(addr, plat->reg_shift);
return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
}
/* We can clean these up once everything is moved to driver model */
@ -401,6 +401,8 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
return -EINVAL;
plat->base = addr;
plat->reg_offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"reg-offset", 0);
plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"reg-shift", 0);
plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,

1
include/ns16550.h
View File

@ -56,6 +56,7 @@ struct ns16550_platdata {
unsigned long base;
int reg_shift;
int clock;
int reg_offset;
};
struct udevice;