nand_spl: remove nand_spl infrastructure
Remove the common infrastructure of nand_spl and clean-up the code inside ifdef(CONFIG_NAND_U_BOOT)..endif. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>utp
Masahiro Yamada
Tom Rini
parent
7445207f0f
commit
66948c25bb
28
Makefile
28
Makefile
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@ -515,12 +515,6 @@ endif
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# If there is no specified link script, we look in a number of places for it
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ifndef LDSCRIPT
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ifeq ($(CONFIG_NAND_U_BOOT),y)
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LDSCRIPT := $(srctree)/board/$(BOARDDIR)/u-boot-nand.lds
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ifeq ($(wildcard $(LDSCRIPT)),)
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LDSCRIPT := $(srctree)/$(CPUDIR)/u-boot-nand.lds
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endif
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endif
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ifeq ($(wildcard $(LDSCRIPT)),)
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LDSCRIPT := $(srctree)/board/$(BOARDDIR)/u-boot.lds
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endif
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@ -742,7 +736,6 @@ endif
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# Always append ALL so that arch config.mk's can add custom ones
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ALL-y += u-boot.srec u-boot.bin System.map
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ALL-$(CONFIG_NAND_U_BOOT) += u-boot-nand.bin
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ALL-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin
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ifeq ($(CONFIG_SPL_FSL_PBL),y)
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ALL-$(CONFIG_RAMBOOT_PBL) += u-boot-with-spl-pbl.bin
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@ -1148,23 +1141,6 @@ cmd_cpp_lds = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \
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u-boot.lds: $(LDSCRIPT) prepare FORCE
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$(call if_changed_dep,cpp_lds)
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PHONY += nand_spl
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nand_spl: prepare
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$(Q)$(MAKE) $(build)=nand_spl/board/$(BOARDDIR) all
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@echo >&2
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@echo >&2 "==================== WARNING ====================="
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@echo >&2 "nand_spl will not be included in v2014.07 release."
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@echo >&2 "Please switch over to SPL."
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@echo >&2 "Otherwise, this board will be removed."
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@echo >&2 "=================================================="
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@echo >&2
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nand_spl/u-boot-spl-16k.bin: nand_spl
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@:
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u-boot-nand.bin: nand_spl/u-boot-spl-16k.bin u-boot.bin FORCE
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$(call if_changed,cat)
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spl/u-boot-spl.bin: spl/u-boot-spl
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@:
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spl/u-boot-spl: tools prepare
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@ -1257,7 +1233,7 @@ CLEAN_FILES += u-boot.lds include/bmp_logo.h include/bmp_logo_data.h \
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CLOBBER_DIRS += $(patsubst %,spl/%, $(filter-out Makefile, \
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$(shell ls -1 spl 2>/dev/null))) \
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tpl
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CLOBBER_FILES += u-boot* MLO* SPL System.map nand_spl/u-boot*
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CLOBBER_FILES += u-boot* MLO* SPL System.map
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# Directories & files removed with 'make mrproper'
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MRPROPER_DIRS += include/config include/generated \
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@ -1290,8 +1266,6 @@ clean: $(clean-dirs)
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-o -name '*.symtypes' -o -name 'modules.order' \
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-o -name modules.builtin -o -name '.tmp_*.o.*' \
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-o -name '*.gcno' \) -type f -print | xargs rm -f
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@find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \
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-path './nand_spl/*' -type l -print | xargs rm -f
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# clobber
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#
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@ -607,9 +607,6 @@ int checkcpu (void)
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#if defined(SDR0_PINSTP_SHIFT)
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printf (" Bootstrap Option %c - ", bootstrap_char[bootstrap_option()]);
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printf ("Boot ROM Location %s", bootstrap_str[bootstrap_option()]);
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#ifdef CONFIG_NAND_U_BOOT
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puts(", booting from NAND");
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#endif /* CONFIG_NAND_U_BOOT */
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putc('\n');
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#endif /* SDR0_PINSTP_SHIFT */
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@ -33,7 +33,7 @@
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* a seperate section. Note that ENV_CRC is only defined when building
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* U-Boot itself.
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*/
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#if (defined(CONFIG_SYS_USE_PPCENV) || defined(CONFIG_NAND_U_BOOT)) && \
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#if defined(CONFIG_SYS_USE_PPCENV) && \
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defined(ENV_CRC) /* Environment embedded in U-Boot .ppcenv section */
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/* XXX - This only works with GNU C */
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# define __PPCENV__ __attribute__ ((section(".ppcenv")))
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@ -1,285 +0,0 @@
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/*
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* (C) Copyright 2006-2008
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <nand.h>
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#include <asm/io.h>
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static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
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#define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
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CONFIG_SYS_NAND_ECCSIZE)
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#define ECCTOTAL (ECCSTEPS * CONFIG_SYS_NAND_ECCBYTES)
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#if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
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/*
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* NAND command for small page NAND devices (512)
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*/
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static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
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{
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struct nand_chip *this = mtd->priv;
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int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
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while (!this->dev_ready(mtd))
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;
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/* Begin command latch cycle */
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this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
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/* Set ALE and clear CLE to start address cycle */
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/* Column address */
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this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
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this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
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this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
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NAND_CTRL_ALE); /* A[24:17] */
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#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
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/* One more address cycle for devices > 32MiB */
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this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
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NAND_CTRL_ALE); /* A[28:25] */
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#endif
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/* Latch in address */
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this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
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/*
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* Wait a while for the data to be ready
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*/
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while (!this->dev_ready(mtd))
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;
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return 0;
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}
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#else
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/*
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* NAND command for large page NAND devices (2k)
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*/
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static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
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{
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struct nand_chip *this = mtd->priv;
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int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
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void (*hwctrl)(struct mtd_info *mtd, int cmd,
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unsigned int ctrl) = this->cmd_ctrl;
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while (!this->dev_ready(mtd))
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;
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/* Emulate NAND_CMD_READOOB */
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if (cmd == NAND_CMD_READOOB) {
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offs += CONFIG_SYS_NAND_PAGE_SIZE;
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cmd = NAND_CMD_READ0;
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}
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/* Shift the offset from byte addressing to word addressing. */
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if (this->options & NAND_BUSWIDTH_16)
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offs >>= 1;
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/* Begin command latch cycle */
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hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
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/* Set ALE and clear CLE to start address cycle */
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/* Column address */
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hwctrl(mtd, offs & 0xff,
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NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
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hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
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/* Row address */
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hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
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hwctrl(mtd, ((page_addr >> 8) & 0xff),
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NAND_CTRL_ALE); /* A[27:20] */
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#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
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/* One more address cycle for devices > 128MiB */
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hwctrl(mtd, (page_addr >> 16) & 0x0f,
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NAND_CTRL_ALE); /* A[31:28] */
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#endif
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/* Latch in address */
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hwctrl(mtd, NAND_CMD_READSTART,
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NAND_CTRL_CLE | NAND_CTRL_CHANGE);
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hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
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/*
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* Wait a while for the data to be ready
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*/
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while (!this->dev_ready(mtd))
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;
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return 0;
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}
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#endif
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static int nand_is_bad_block(struct mtd_info *mtd, int block)
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{
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struct nand_chip *this = mtd->priv;
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nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
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/*
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* Read one byte (or two if it's a 16 bit chip).
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*/
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if (this->options & NAND_BUSWIDTH_16) {
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if (readw(this->IO_ADDR_R) != 0xffff)
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return 1;
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} else {
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if (readb(this->IO_ADDR_R) != 0xff)
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return 1;
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}
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return 0;
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}
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#if defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST)
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static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
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{
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struct nand_chip *this = mtd->priv;
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u_char ecc_calc[ECCTOTAL];
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u_char ecc_code[ECCTOTAL];
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u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
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int i;
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int eccsize = CONFIG_SYS_NAND_ECCSIZE;
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int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
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int eccsteps = ECCSTEPS;
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uint8_t *p = dst;
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nand_command(mtd, block, page, 0, NAND_CMD_READOOB);
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this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
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nand_command(mtd, block, page, 0, NAND_CMD_READ0);
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/* Pick the ECC bytes out of the oob data */
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for (i = 0; i < ECCTOTAL; i++)
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ecc_code[i] = oob_data[nand_ecc_pos[i]];
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for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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this->ecc.hwctl(mtd, NAND_ECC_READ);
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this->read_buf(mtd, p, eccsize);
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this->ecc.calculate(mtd, p, &ecc_calc[i]);
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this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
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}
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return 0;
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}
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#else
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static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
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{
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struct nand_chip *this = mtd->priv;
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u_char ecc_calc[ECCTOTAL];
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u_char ecc_code[ECCTOTAL];
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u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
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int i;
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int eccsize = CONFIG_SYS_NAND_ECCSIZE;
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int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
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int eccsteps = ECCSTEPS;
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uint8_t *p = dst;
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nand_command(mtd, block, page, 0, NAND_CMD_READ0);
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for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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this->ecc.hwctl(mtd, NAND_ECC_READ);
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this->read_buf(mtd, p, eccsize);
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this->ecc.calculate(mtd, p, &ecc_calc[i]);
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}
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this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
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/* Pick the ECC bytes out of the oob data */
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for (i = 0; i < ECCTOTAL; i++)
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ecc_code[i] = oob_data[nand_ecc_pos[i]];
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eccsteps = ECCSTEPS;
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p = dst;
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for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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/* No chance to do something with the possible error message
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* from correct_data(). We just hope that all possible errors
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* are corrected by this routine.
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*/
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this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
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}
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return 0;
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}
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#endif /* #if defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST) */
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static int nand_load(struct mtd_info *mtd, unsigned int offs,
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unsigned int uboot_size, uchar *dst)
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{
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unsigned int block, lastblock;
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unsigned int page;
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/*
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* offs has to be aligned to a page address!
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*/
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block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
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lastblock = (offs + uboot_size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
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page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
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while (block <= lastblock) {
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if (!nand_is_bad_block(mtd, block)) {
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/*
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* Skip bad blocks
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*/
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while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
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nand_read_page(mtd, block, page, dst);
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dst += CONFIG_SYS_NAND_PAGE_SIZE;
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page++;
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}
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page = 0;
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} else {
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lastblock++;
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}
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block++;
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}
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return 0;
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}
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/*
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* The main entry for NAND booting. It's necessary that SDRAM is already
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* configured and available since this code loads the main U-Boot image
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* from NAND into SDRAM and starts it from there.
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*/
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void nand_boot(void)
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{
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struct nand_chip nand_chip;
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nand_info_t nand_info;
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__attribute__((noreturn)) void (*uboot)(void);
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/*
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* Init board specific nand support
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*/
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nand_chip.select_chip = NULL;
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nand_info.priv = &nand_chip;
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nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
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nand_chip.dev_ready = NULL; /* preset to NULL */
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nand_chip.options = 0;
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board_nand_init(&nand_chip);
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if (nand_chip.select_chip)
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nand_chip.select_chip(&nand_info, 0);
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/*
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* Load U-Boot image from NAND into RAM
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*/
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nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
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(uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
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#ifdef CONFIG_NAND_ENV_DST
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nand_load(&nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
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(uchar *)CONFIG_NAND_ENV_DST);
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#ifdef CONFIG_ENV_OFFSET_REDUND
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nand_load(&nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
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(uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
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#endif
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#endif
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if (nand_chip.select_chip)
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nand_chip.select_chip(&nand_info, -1);
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/*
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* Jump to U-Boot image
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*/
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uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
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(*uboot)();
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}
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@ -1,142 +0,0 @@
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/*
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* NAND boot for Freescale Enhanced Local Bus Controller, Flash Control Machine
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*
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* (C) Copyright 2006-2008
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* Copyright (c) 2008 Freescale Semiconductor, Inc.
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* Author: Scott Wood <scottwood@freescale.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/fsl_lbc.h>
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#include <linux/mtd/nand.h>
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#define WINDOW_SIZE 8192
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static void nand_wait(void)
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{
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fsl_lbc_t *regs = LBC_BASE_ADDR;
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for (;;) {
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uint32_t status = in_be32(®s->ltesr);
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if (status == 1)
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return;
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if (status & 1) {
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puts("read failed (ltesr)\n");
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for (;;);
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}
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}
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}
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static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
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{
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fsl_lbc_t *regs = LBC_BASE_ADDR;
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uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
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const int large = CONFIG_SYS_NAND_OR_PRELIM & OR_FCM_PGS;
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const int block_shift = large ? 17 : 14;
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const int block_size = 1 << block_shift;
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const int page_size = large ? 2048 : 512;
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const int bad_marker = large ? page_size + 0 : page_size + 5;
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int fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT) | 2;
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int pos = 0;
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if (offs & (block_size - 1)) {
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puts("bad offset\n");
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for (;;);
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}
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if (large) {
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fmr |= FMR_ECCM;
|
||||
__raw_writel((NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
|
||||
(NAND_CMD_READSTART << FCR_CMD1_SHIFT),
|
||||
®s->fcr);
|
||||
__raw_writel(
|
||||
(FIR_OP_CW0 << FIR_OP0_SHIFT) |
|
||||
(FIR_OP_CA << FIR_OP1_SHIFT) |
|
||||
(FIR_OP_PA << FIR_OP2_SHIFT) |
|
||||
(FIR_OP_CW1 << FIR_OP3_SHIFT) |
|
||||
(FIR_OP_RBW << FIR_OP4_SHIFT),
|
||||
®s->fir);
|
||||
} else {
|
||||
__raw_writel(NAND_CMD_READ0 << FCR_CMD0_SHIFT, ®s->fcr);
|
||||
__raw_writel(
|
||||
(FIR_OP_CW0 << FIR_OP0_SHIFT) |
|
||||
(FIR_OP_CA << FIR_OP1_SHIFT) |
|
||||
(FIR_OP_PA << FIR_OP2_SHIFT) |
|
||||
(FIR_OP_RBW << FIR_OP3_SHIFT),
|
||||
®s->fir);
|
||||
}
|
||||
|
||||
__raw_writel(0, ®s->fbcr);
|
||||
|
||||
while (pos < uboot_size) {
|
||||
int i = 0;
|
||||
__raw_writel(offs >> block_shift, ®s->fbar);
|
||||
|
||||
do {
|
||||
int j;
|
||||
unsigned int page_offs = (offs & (block_size - 1)) << 1;
|
||||
|
||||
__raw_writel(~0, ®s->ltesr);
|
||||
__raw_writel(0, ®s->lteatr);
|
||||
__raw_writel(page_offs, ®s->fpar);
|
||||
__raw_writel(fmr, ®s->fmr);
|
||||
sync();
|
||||
__raw_writel(0, ®s->lsor);
|
||||
nand_wait();
|
||||
|
||||
page_offs %= WINDOW_SIZE;
|
||||
|
||||
/*
|
||||
* If either of the first two pages are marked bad,
|
||||
* continue to the next block.
|
||||
*/
|
||||
if (i++ < 2 && buf[page_offs + bad_marker] != 0xff) {
|
||||
puts("skipping\n");
|
||||
offs = (offs + block_size) & ~(block_size - 1);
|
||||
pos &= ~(block_size - 1);
|
||||
break;
|
||||
}
|
||||
|
||||
for (j = 0; j < page_size; j++)
|
||||
dst[pos + j] = buf[page_offs + j];
|
||||
|
||||
pos += page_size;
|
||||
offs += page_size;
|
||||
} while ((offs & (block_size - 1)) && (pos < uboot_size));
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* The main entry for NAND booting. It's necessary that SDRAM is already
|
||||
* configured and available since this code loads the main U-Boot image
|
||||
* from NAND into SDRAM and starts it from there.
|
||||
*/
|
||||
void nand_boot(void)
|
||||
{
|
||||
__attribute__((noreturn)) void (*uboot)(void);
|
||||
|
||||
/*
|
||||
* Load U-Boot image from NAND into RAM
|
||||
*/
|
||||
nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
|
||||
(uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
|
||||
|
||||
/*
|
||||
* Jump to U-Boot image
|
||||
*/
|
||||
puts("transfering control\n");
|
||||
/*
|
||||
* Clean d-cache and invalidate i-cache, to
|
||||
* make sure that no stale data is executed.
|
||||
*/
|
||||
flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE);
|
||||
uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
|
||||
uboot();
|
||||
}
|
||||
Loading…
Reference in New Issue