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Merge branch 'master' of git://git.denx.de/u-boot-uniphier

utp
Tom Rini 2015-07-01 15:37:56 -04:00
parent af6da69f47 8101b98298
commit 6762ae6888
13 changed files with 197 additions and 36 deletions
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2
arch/arm/dts/uniphier-ph1-ld4-ref.dts
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@ -5,7 +5,7 @@
* Copyright (C) 2015 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

49
arch/arm/dts/uniphier-ph1-ld4.dtsi
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@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier PH1-LD4 SoC
*
* Copyright (C) 2014-2015 Panasonic Corporation
* Copyright (C) 2015 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/include/ "skeleton.dtsi"
@ -24,11 +22,26 @@
};
};
clocks {
arm_timer_clk: arm_timer_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
extbus: extbus {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
};
uart0: serial@54006800 {
compatible = "socionext,uniphier-uart";
@ -94,6 +107,12 @@
status = "disabled";
};
system-bus-controller-misc@59800000 {
compatible = "socionext,uniphier-system-bus-controller-misc",
"syscon";
reg = <0x59800000 0x2000>;
};
usb0: usb@5a800100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
@ -112,6 +131,28 @@
reg = <0x5a820100 0x100>;
};
timer@60000200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>;
interrupts = <1 11 0x104>;
clocks = <&arm_timer_clk>;
};
timer@60000600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x60000600 0x20>;
interrupts = <1 13 0x104>;
clocks = <&arm_timer_clk>;
};
intc: interrupt-controller@60001000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x60001000 0x1000>,
<0x60000100 0x100>;
};
nand: nand@68000000 {
compatible = "denali,denali-nand-dt";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;

2
arch/arm/dts/uniphier-ph1-pro4-ref.dts
View File

@ -5,7 +5,7 @@
* Copyright (C) 2015 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

50
arch/arm/dts/uniphier-ph1-pro4.dtsi
View File

@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier PH1-Pro4 SoC
*
* Copyright (C) 2014-2015 Panasonic Corporation
* Copyright (C) 2015 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/include/ "skeleton.dtsi"
@ -16,6 +14,7 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
enable-method = "socionext,uniphier-smp";
cpu@0 {
device_type = "cpu";
@ -30,11 +29,26 @@
};
};
clocks {
arm_timer_clk: arm_timer_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
extbus: extbus {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
};
uart0: serial@54006800 {
compatible = "socionext,uniphier-uart";
@ -120,6 +134,12 @@
status = "ok";
};
system-bus-controller-misc@59800000 {
compatible = "socionext,uniphier-system-bus-controller-misc",
"syscon";
reg = <0x59800000 0x2000>;
};
usb2: usb@5a800100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
@ -144,6 +164,28 @@
reg = <0x65c00000 0x100>;
};
timer@60000200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>;
interrupts = <1 11 0x304>;
clocks = <&arm_timer_clk>;
};
timer@60000600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x60000600 0x20>;
interrupts = <1 13 0x304>;
clocks = <&arm_timer_clk>;
};
intc: interrupt-controller@60001000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x60001000 0x1000>,
<0x60000100 0x100>;
};
nand: nand@68000000 {
compatible = "denali,denali-nand-dt";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;

2
arch/arm/dts/uniphier-ph1-sld3-ref.dts
View File

@ -5,7 +5,7 @@
* Copyright (C) 2015 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

50
arch/arm/dts/uniphier-ph1-sld3.dtsi
View File

@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier PH1-sLD3 SoC
*
* Copyright (C) 2014-2015 Panasonic Corporation
* Copyright (C) 2015 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/include/ "skeleton.dtsi"
@ -16,6 +14,7 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
enable-method = "socionext,uniphier-smp";
cpu@0 {
device_type = "cpu";
@ -30,11 +29,48 @@
};
};
clocks {
arm_timer_clk: arm_timer_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
extbus: extbus {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
};
timer@20000200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x20000200 0x20>;
interrupts = <1 11 0x304>;
clocks = <&arm_timer_clk>;
};
timer@20000600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x20000600 0x20>;
interrupts = <1 13 0x304>;
clocks = <&arm_timer_clk>;
};
intc: interrupt-controller@20001000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x20001000 0x1000>,
<0x20000100 0x100>;
};
uart0: serial@54006800 {
compatible = "socionext,uniphier-uart";
@ -93,6 +129,12 @@
status = "disabled";
};
system-bus-controller-misc@59800000 {
compatible = "socionext,uniphier-system-bus-controller-misc",
"syscon";
reg = <0x59800000 0x2000>;
};
usb0: usb@5a800100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";

2
arch/arm/dts/uniphier-ph1-sld8-ref.dts
View File

@ -5,7 +5,7 @@
* Copyright (C) 2015 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

49
arch/arm/dts/uniphier-ph1-sld8.dtsi
View File

@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier PH1-sLD8 SoC
*
* Copyright (C) 2014-2015 Panasonic Corporation
* Copyright (C) 2015 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/include/ "skeleton.dtsi"
@ -24,11 +22,26 @@
};
};
clocks {
arm_timer_clk: arm_timer_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
extbus: extbus {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
};
uart0: serial@54006800 {
compatible = "socionext,uniphier-uart";
@ -94,6 +107,12 @@
status = "disabled";
};
system-bus-controller-misc@59800000 {
compatible = "socionext,uniphier-system-bus-controller-misc",
"syscon";
reg = <0x59800000 0x2000>;
};
usb0: usb@5a800100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
@ -112,6 +131,28 @@
reg = <0x5a820100 0x100>;
};
timer@60000200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>;
interrupts = <1 11 0x104>;
clocks = <&arm_timer_clk>;
};
timer@60000600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x60000600 0x20>;
interrupts = <1 13 0x104>;
clocks = <&arm_timer_clk>;
};
intc: interrupt-controller@60001000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x60001000 0x1000>,
<0x60000100 0x100>;
};
nand: nand@68000000 {
compatible = "denali,denali-nand-dt";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;

6
arch/arm/dts/uniphier-ref-daughter.dtsi
View File

@ -1,11 +1,9 @@
/*
* Device Tree Source for UniPhier Reference Daughter Board
*
* Copyright (C) 2014-2015 Panasonic Corporation
* Copyright (C) 2015 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
&i2c0 {

9
arch/arm/mach-uniphier/cpu_info.c
View File

@ -34,6 +34,15 @@ int print_cpuinfo(void)
case 0x29:
puts("PH1-sLD8 (MN2WS0270)");
break;
case 0x2A:
puts("PH1-Pro5 (MN2WS0300)");
break;
case 0x2E:
puts("ProXstream2 (MN2WS0310)");
break;
case 0x2F:
puts("PH1-LD6b (MN2WS0320)");
break;
default:
printf("Unknown Processor ID (0x%x)\n", revision);
return -1;

4
configs/ph1_ld4_defconfig
View File

@ -7,10 +7,6 @@ CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_HUSH_PARSER=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_NAND=y

4
configs/ph1_pro4_defconfig
View File

@ -6,10 +6,6 @@ CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_HUSH_PARSER=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_NAND=y

4
configs/ph1_sld8_defconfig
View File

@ -7,10 +7,6 @@ CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld8-ref"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_HUSH_PARSER=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ENV_EXISTS is not set
CONFIG_CMD_NAND=y