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common/board_f.c: modify the macro to use get_clocks() more common

get_clocks() should not be limited by ESDHC.

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
utp
Gong Qianyu 2015-09-09 16:44:16 +08:00 committed by Tom Rini
parent 09f3ca3dd5
commit 677f970bc6
41 changed files with 41 additions and 1 deletions

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@ -806,7 +806,7 @@ static init_fnc_t init_sequence_f[] = {
#if defined(CONFIG_BOARD_POSTCLK_INIT)
board_postclk_init,
#endif
#ifdef CONFIG_FSL_ESDHC
#ifdef CONFIG_FSL_CLK
get_clocks,
#endif
#ifdef CONFIG_M68K

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@ -17,6 +17,7 @@
#define CONFIG_BSC9132
#endif
#define CONFIG_FSL_CLK
#define CONFIG_MISC_INIT_R
#ifdef CONFIG_SDCARD

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@ -10,6 +10,7 @@
#define __CONFIG_H
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
/*
* High Level Configuration Options

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@ -9,6 +9,7 @@
#define __CONFIG_H
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
/*
* High Level Configuration Options

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@ -16,6 +16,7 @@
#define CONFIG_MPC837x 1 /* MPC837x CPU specific */
#define CONFIG_MPC837XERDB 1
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
#define CONFIG_SYS_TEXT_BASE 0xFE000000

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@ -12,6 +12,7 @@
#define __CONFIG_H
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
#include "../board/freescale/common/ics307_clk.h"
#ifdef CONFIG_36BIT

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@ -12,6 +12,7 @@
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */

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@ -15,6 +15,7 @@
#define CONFIG_PHYS_64BIT
#endif
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
#define CONFIG_P1010
#define CONFIG_E500 /* BOOKE e500 family */

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@ -12,6 +12,7 @@
#include "../board/freescale/common/ics307_clk.h"
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
#ifdef CONFIG_36BIT
#define CONFIG_PHYS_64BIT

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@ -15,6 +15,7 @@
#define CONFIG_PHYS_64BIT
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_PPC_P2041
#define CONFIG_FSL_CLK
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE

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@ -20,6 +20,7 @@
#define CONFIG_MP /* support multiple processors */
#define CONFIG_PHYS_64BIT
#define CONFIG_ENABLE_36BIT_PHYS
#define CONFIG_FSL_CLK
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_ADDR_MAP 1

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@ -20,6 +20,7 @@
#define CONFIG_MP /* support multiple processors */
#define CONFIG_PHYS_64BIT
#define CONFIG_ENABLE_36BIT_PHYS
#define CONFIG_FSL_CLK
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_ADDR_MAP 1

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@ -29,6 +29,7 @@
#define CONFIG_T1040QDS
#define CONFIG_PHYS_64BIT
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE

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@ -13,6 +13,7 @@
#define CONFIG_T104xRDB
#define CONFIG_PHYS_64BIT
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
#define CONFIG_E500 /* BOOKE e500 family */
#include <asm/config_mpc85xx.h>

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@ -13,6 +13,7 @@
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
#define CONFIG_FSL_CLK
#define CONFIG_MMC
#define CONFIG_USB_EHCI
#if defined(CONFIG_PPC_T2080)

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@ -14,6 +14,7 @@
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_T2080RDB
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
#define CONFIG_FSL_CLK
#define CONFIG_MMC
#define CONFIG_USB_EHCI
#define CONFIG_FSL_SATA_V2

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@ -12,6 +12,7 @@
#define CONFIG_T4240QDS
#define CONFIG_PHYS_64BIT
#define CONFIG_FSL_CLK
#define CONFIG_FSL_SATA_V2
#define CONFIG_PCIE4

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@ -13,6 +13,7 @@
#define CONFIG_T4240RDB
#define CONFIG_PHYS_64BIT
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
#define CONFIG_FSL_SATA_V2
#define CONFIG_PCIE4

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@ -15,6 +15,7 @@
#define __CONFIG_H
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
#define CONFIG_FSL_ELBC
#define CONFIG_PCI

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@ -18,6 +18,7 @@
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_USE_ARCH_MEMCPY
#define CONFIG_USE_ARCH_MEMSET
#define CONFIG_FSL_CLK
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_DISPLAY_CPUINFO

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@ -44,6 +44,7 @@
#define CONFIG_P1022
#define CONFIG_CONTROLCENTERD
#define CONFIG_MP /* support multiple processors */
#define CONFIG_FSL_CLK
#define CONFIG_SYS_NO_FLASH

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@ -11,6 +11,7 @@
#define __CONFIG_H
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
#include "../board/freescale/common/ics307_clk.h"

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@ -23,6 +23,7 @@
#define CONFIG_IDENT_STRING " hrcon 0.01"
#define CONFIG_FSL_CLK
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_LAST_STAGE_INIT

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@ -11,6 +11,7 @@
#define CONFIG_ARMV7_PSCI
#define CONFIG_FSL_CLK
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

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@ -11,6 +11,7 @@
#define CONFIG_ARMV7_PSCI
#define CONFIG_FSL_CLK
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

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@ -16,6 +16,7 @@ unsigned long get_board_sys_clk(void);
unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_FSL_CLK
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)

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@ -18,6 +18,7 @@
unsigned long get_board_sys_clk(void);
#endif
#define CONFIG_FSL_CLK
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
#define CONFIG_DDR_CLK_FREQ 133333333
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)

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@ -17,6 +17,7 @@
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_NO_FLASH
#define CONFIG_FSL_CLK
#define CONFIG_FIT

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@ -14,6 +14,7 @@
#define CONFIG_MX25
#define CONFIG_SYS_TEXT_BASE 0x81200000
#define CONFIG_MXC_GPIO
#define CONFIG_FSL_CLK
#define CONFIG_SYS_TIMER_RATE 32768
#define CONFIG_SYS_TIMER_COUNTER \

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@ -19,6 +19,7 @@
#define CONFIG_MX35
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_FSL_CLK
/* Set TEXT at the beginning of the NOR flash */
#define CONFIG_SYS_TEXT_BASE 0xA0000000

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@ -18,6 +18,7 @@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
#define CONFIG_SYS_TEXT_BASE 0x97800000
#include <asm/arch/imx-regs.h>

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@ -23,6 +23,7 @@
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_FSL_CLK
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)

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@ -23,6 +23,7 @@
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_FSL_CLK
#define CONFIG_OF_LIBFDT

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@ -22,6 +22,7 @@
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_FSL_CLK
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)

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@ -23,6 +23,7 @@
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_FSL_CLK
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)

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@ -45,6 +45,7 @@
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_FSL_CLK
/* ATAGs */
#define CONFIG_CMDLINE_TAG

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@ -11,6 +11,7 @@
#define __CONFIG_H
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
#ifdef CONFIG_36BIT
#define CONFIG_PHYS_64BIT

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@ -11,6 +11,7 @@
#define __CONFIG_H
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
#if defined(CONFIG_TWR_P1025)
#define CONFIG_BOARDNAME "TWR-P1025"
#define CONFIG_P1025

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@ -14,6 +14,7 @@
#define CONFIG_MX53
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_OF_LIBFDT
#define CONFIG_MXC_GPIO

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@ -15,6 +15,7 @@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_CLK
#define CONFIG_MACH_TYPE 4146

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@ -16,6 +16,7 @@
/* High Level Configuration Options */
#define CONFIG_MX35
#define CONFIG_MX35_HCLK_FREQ 24000000
#define CONFIG_FSL_CLK
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_SYS_CACHELINE_SIZE 32