Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians: fsl_esdhc: fix PIO mode transfers mmc: tegra2: Implement card-detect hook. mmc: fsl_esdhc: Implement card-detect hook. mmc: Implement card detection. mmc: Change board_mmc_getcd() function prototype. drivers/mmc/mv_sdhci.c: Fix build warning ftsdc010: improve performance and capability mmc: add host_caps checking avoid switch card improperly i.mx: fsl_esdhc: add the i.mx6q support
This commit is contained in:
commit
6d7ba2cef5
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@ -314,17 +314,18 @@ static inline uint32_t efika_mmc_cd(void)
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return MX51_PIN_EIM_CS2;
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}
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int board_mmc_getcd(u8 *absent, struct mmc *mmc)
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int board_mmc_getcd(struct mmc *mmc)
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{
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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uint32_t cd = efika_mmc_cd();
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int ret;
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if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
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*absent = gpio_get_value(IOMUX_TO_GPIO(cd));
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ret = !gpio_get_value(IOMUX_TO_GPIO(cd));
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else
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*absent = gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_8));
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ret = !gpio_get_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_8));
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return 0;
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return ret;
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}
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int board_mmc_init(bd_t *bis)
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@ -108,17 +108,9 @@ int board_mmc_init(bd_t *bd)
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}
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/* this is a weak define that we are overriding */
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int board_mmc_getcd(u8 *cd, struct mmc *mmc)
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int board_mmc_getcd(struct mmc *mmc)
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{
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/*
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* the only currently existing use of this function
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* (fsl_esdhc.c) suggests this function must return
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* *cs = TRUE if a card is NOT detected -> in most
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* cases the value of the pin when the detect switch
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* closes to GND
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*/
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*cd = at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN) ? 1 : 0;
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return 0;
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return !at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN);
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}
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#endif
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@ -321,19 +321,20 @@ static void power_init(void)
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}
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#ifdef CONFIG_FSL_ESDHC
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int board_mmc_getcd(u8 *cd, struct mmc *mmc)
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int board_mmc_getcd(struct mmc *mmc)
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{
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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int ret;
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mxc_request_iomux(MX51_PIN_GPIO1_0, IOMUX_CONFIG_ALT1);
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mxc_request_iomux(MX51_PIN_GPIO1_6, IOMUX_CONFIG_ALT0);
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if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
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*cd = gpio_get_value(0);
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ret = !gpio_get_value(0);
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else
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*cd = gpio_get_value(6);
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ret = !gpio_get_value(6);
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return 0;
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return ret;
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}
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int board_mmc_init(bd_t *bis)
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@ -83,19 +83,20 @@ struct fsl_esdhc_cfg esdhc_cfg[2] = {
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{MMC_SDHC2_BASE_ADDR, 1 },
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};
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int board_mmc_getcd(u8 *cd, struct mmc *mmc)
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int board_mmc_getcd(struct mmc *mmc)
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{
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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int ret;
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mxc_request_iomux(MX53_PIN_GPIO_1, IOMUX_CONFIG_ALT1);
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mxc_request_iomux(MX53_PIN_GPIO_4, IOMUX_CONFIG_ALT1);
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if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
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*cd = gpio_get_value(1); /*GPIO1_1*/
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ret = !gpio_get_value(1); /* GPIO1_1 */
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else
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*cd = gpio_get_value(4); /*GPIO1_4*/
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ret = !gpio_get_value(4); /* GPIO1_4 */
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return 0;
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return ret;
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}
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int board_mmc_init(bd_t *bis)
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@ -208,19 +208,20 @@ struct fsl_esdhc_cfg esdhc_cfg[2] = {
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{MMC_SDHC3_BASE_ADDR, 1},
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};
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int board_mmc_getcd(u8 *cd, struct mmc *mmc)
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int board_mmc_getcd(struct mmc *mmc)
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{
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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int ret;
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mxc_request_iomux(MX53_PIN_EIM_DA11, IOMUX_CONFIG_ALT1);
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mxc_request_iomux(MX53_PIN_EIM_DA13, IOMUX_CONFIG_ALT1);
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if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
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*cd = gpio_get_value(77); /*GPIO3_13*/
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ret = !gpio_get_value(77); /* GPIO3_13 */
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else
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*cd = gpio_get_value(75); /*GPIO3_11*/
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ret = !gpio_get_value(75); /* GPIO3_11 */
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return 0;
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return ret;
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}
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int board_mmc_init(bd_t *bis)
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@ -147,19 +147,20 @@ struct fsl_esdhc_cfg esdhc_cfg[2] = {
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{MMC_SDHC3_BASE_ADDR, 1},
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};
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int board_mmc_getcd(u8 *cd, struct mmc *mmc)
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int board_mmc_getcd(struct mmc *mmc)
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{
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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int ret;
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mxc_request_iomux(MX53_PIN_EIM_DA11, IOMUX_CONFIG_ALT1);
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mxc_request_iomux(MX53_PIN_EIM_DA13, IOMUX_CONFIG_ALT1);
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if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
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*cd = gpio_get_value(77); /*GPIO3_13*/
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ret = !gpio_get_value(77); /* GPIO3_13 */
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else
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*cd = gpio_get_value(75); /*GPIO3_11*/
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ret = !gpio_get_value(75); /* GPIO3_11 */
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return 0;
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return ret;
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}
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int board_mmc_init(bd_t *bis)
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@ -132,12 +132,10 @@ struct fsl_esdhc_cfg esdhc_cfg[1] = {
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{MMC_SDHC1_BASE_ADDR, 1},
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};
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int board_mmc_getcd(u8 *cd, struct mmc *mmc)
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int board_mmc_getcd(struct mmc *mmc)
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{
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mxc_request_iomux(MX53_PIN_EIM_DA13, IOMUX_CONFIG_ALT1);
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*cd = gpio_get_value(77); /*GPIO3_13*/
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return 0;
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return !gpio_get_value(77); /* GPIO3_13 */
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}
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int board_mmc_init(bd_t *bis)
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@ -59,17 +59,9 @@ int board_mmc_init(bd_t *bd)
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}
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/* this is a weak define that we are overriding */
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int board_mmc_getcd(u8 *cd, struct mmc *mmc)
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int board_mmc_getcd(struct mmc *mmc)
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{
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/*
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* the only currently existing use of this function
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* (fsl_esdhc.c) suggests this function must return
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* *cs = TRUE if a card is NOT detected -> in most
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* cases the value of the pin when the detect switch
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* closes to GND
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*/
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*cd = at91_get_gpio_value (CONFIG_SYS_MMC_CD_PIN) ? 1 : 0;
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return 0;
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return !at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN);
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}
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#endif
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@ -385,6 +385,7 @@ static int arm_pl180_mmci_host_init(struct mmc *dev)
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dev->send_cmd = host_request;
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dev->set_ios = host_set_ios;
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dev->init = mmc_host_reset;
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dev->getcd = NULL;
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dev->host_caps = 0;
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dev->voltages = VOLTAGE_WINDOW_MMC;
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dev->f_min = dev->clock;
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@ -250,6 +250,7 @@ int bfin_mmc_init(bd_t *bis)
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mmc->send_cmd = bfin_sdh_request;
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mmc->set_ios = bfin_sdh_set_ios;
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mmc->init = bfin_sdh_init;
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mmc->getcd = NULL;
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mmc->host_caps = MMC_MODE_4BIT;
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mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
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@ -387,6 +387,7 @@ int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host)
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mmc->send_cmd = dmmc_send_cmd;
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mmc->set_ios = dmmc_set_ios;
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mmc->init = dmmc_init;
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mmc->getcd = NULL;
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mmc->f_min = 200000;
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mmc->f_max = 25000000;
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@ -58,7 +58,8 @@ struct fsl_esdhc {
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uint autoc12err;
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uint hostcapblt;
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uint wml;
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char reserved1[8];
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uint mixctrl;
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char reserved1[4];
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uint fevt;
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char reserved2[168];
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uint hostver;
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@ -113,7 +114,8 @@ uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
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static void
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esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data)
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{
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struct fsl_esdhc *regs = mmc->priv;
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struct fsl_esdhc_cfg *cfg = mmc->priv;
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struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
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uint blocks;
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char *buffer;
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uint databuf;
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@ -298,8 +300,13 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
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/* Send the command */
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esdhc_write32(®s->cmdarg, cmd->cmdarg);
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#if defined(CONFIG_FSL_USDHC)
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esdhc_write32(®s->mixctrl,
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(esdhc_read32(®s->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F));
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esdhc_write32(®s->xfertyp, xfertyp & 0xFFFF0000);
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#else
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esdhc_write32(®s->xfertyp, xfertyp);
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#endif
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/* Wait for the command to complete */
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while (!(esdhc_read32(®s->irqstat) & IRQSTAT_CC))
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;
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@ -412,8 +419,6 @@ static int esdhc_init(struct mmc *mmc)
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
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int timeout = 1000;
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int ret = 0;
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u8 card_absent;
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/* Reset the entire host controller */
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esdhc_write32(®s->sysctl, SYSCTL_RSTA);
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@ -440,21 +445,19 @@ static int esdhc_init(struct mmc *mmc)
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/* Set timout to the maximum value */
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esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
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/* Check if there is a callback for detecting the card */
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if (board_mmc_getcd(&card_absent, mmc)) {
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timeout = 1000;
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while (!(esdhc_read32(®s->prsstat) & PRSSTAT_CINS) &&
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--timeout)
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udelay(1000);
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return 0;
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}
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if (timeout <= 0)
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ret = NO_CARD_ERR;
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} else {
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if (card_absent)
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ret = NO_CARD_ERR;
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}
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static int esdhc_getcd(struct mmc *mmc)
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{
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
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int timeout = 1000;
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return ret;
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while (!(esdhc_read32(®s->prsstat) & PRSSTAT_CINS) && --timeout)
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udelay(1000);
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return timeout > 0;
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}
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static void esdhc_reset(struct fsl_esdhc *regs)
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@ -482,7 +485,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
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mmc = malloc(sizeof(struct mmc));
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sprintf(mmc->name, "FSL_ESDHC");
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sprintf(mmc->name, "FSL_SDHC");
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regs = (struct fsl_esdhc *)cfg->esdhc_base;
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/* First reset the eSDHC controller */
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@ -492,6 +495,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
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mmc->send_cmd = esdhc_send_cmd;
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mmc->set_ios = esdhc_set_ios;
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mmc->init = esdhc_init;
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mmc->getcd = esdhc_getcd;
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voltage_caps = 0;
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caps = regs->hostcapblt;
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@ -90,8 +90,13 @@ static void ftsdc010_pio_read(struct mmc_host *host, char *buf, unsigned int siz
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while (size) {
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status = readl(&host->reg->status);
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debug("%s: size: %08x\n", __func__, size);
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if (status & FTSDC010_STATUS_FIFO_ORUN) {
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debug("%s: FIFO OVERRUN: sta: %08x\n",
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__func__, status);
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fifo = host->fifo_len > size ?
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size : host->fifo_len;
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@ -146,7 +151,7 @@ static void ftsdc010_pio_write(struct mmc_host *host, const char *buf,
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while (size) {
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status = readl(&host->reg->status);
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if (status & FTSDC010_STATUS_FIFO_ORUN) {
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if (status & FTSDC010_STATUS_FIFO_URUN) {
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fifo = host->fifo_len > size ?
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size : host->fifo_len;
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@ -158,7 +163,6 @@ static void ftsdc010_pio_write(struct mmc_host *host, const char *buf,
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writel(*ptr, &host->reg->dwr);
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ptr++;
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}
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} else {
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udelay(1);
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if (++retry >= FTSDC010_PIO_RETRY) {
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@ -169,56 +173,19 @@ static void ftsdc010_pio_write(struct mmc_host *host, const char *buf,
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}
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}
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static int ftsdc010_pio_check_status(struct mmc *mmc, struct mmc_cmd *cmd,
|
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static int ftsdc010_check_rsp(struct mmc *mmc, struct mmc_cmd *cmd,
|
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struct mmc_data *data)
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{
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struct mmc_host *host = mmc->priv;
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|
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unsigned int sta, clear;
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unsigned int i;
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|
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/* check response and hardware status */
|
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clear = 0;
|
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/* chech CMD_SEND */
|
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for (i = 0; i < FTSDC010_CMD_RETRY; i++) {
|
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sta = readl(&host->reg->status);
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/* Command Complete */
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if (sta & FTSDC010_STATUS_CMD_SEND) {
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if (!data)
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clear |= FTSDC010_CLR_CMD_SEND;
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break;
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}
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}
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|
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if (i > FTSDC010_CMD_RETRY) {
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printf("%s: send command timeout\n", __func__);
|
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return TIMEOUT;
|
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}
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|
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/* debug: print status register and command index*/
|
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debug("sta: %08x cmd %d\n", sta, cmd->cmdidx);
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/* handle data FIFO */
|
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if ((sta & FTSDC010_STATUS_FIFO_ORUN) ||
|
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(sta & FTSDC010_STATUS_FIFO_URUN)) {
|
||||
|
||||
/* Wrong DATA FIFO Flag */
|
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if (data == NULL)
|
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printf("%s, data fifo wrong: sta: %08x cmd %d\n",
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__func__, sta, cmd->cmdidx);
|
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|
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if (sta & FTSDC010_STATUS_FIFO_ORUN)
|
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clear |= FTSDC010_STATUS_FIFO_ORUN;
|
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if (sta & FTSDC010_STATUS_FIFO_URUN)
|
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clear |= FTSDC010_STATUS_FIFO_URUN;
|
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}
|
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sta = readl(&host->reg->status);
|
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debug("%s: sta: %08x cmd %d\n", __func__, sta, cmd->cmdidx);
|
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|
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/* check RSP TIMEOUT or FAIL */
|
||||
if (sta & FTSDC010_STATUS_RSP_TIMEOUT) {
|
||||
/* RSP TIMEOUT */
|
||||
debug("%s: RSP timeout: sta: %08x cmd %d\n",
|
||||
__func__, sta, cmd->cmdidx);
|
||||
debug("%s: RSP timeout: sta: %08x\n", __func__, sta);
|
||||
|
||||
clear |= FTSDC010_CLR_RSP_TIMEOUT;
|
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writel(clear, &host->reg->clr);
|
||||
|
@ -226,47 +193,62 @@ static int ftsdc010_pio_check_status(struct mmc *mmc, struct mmc_cmd *cmd,
|
|||
return TIMEOUT;
|
||||
} else if (sta & FTSDC010_STATUS_RSP_CRC_FAIL) {
|
||||
/* clear response fail bit */
|
||||
debug("%s: RSP CRC FAIL: sta: %08x cmd %d\n",
|
||||
__func__, sta, cmd->cmdidx);
|
||||
debug("%s: RSP CRC FAIL: sta: %08x\n", __func__, sta);
|
||||
|
||||
clear |= FTSDC010_CLR_RSP_CRC_FAIL;
|
||||
writel(clear, &host->reg->clr);
|
||||
|
||||
return 0;
|
||||
return COMM_ERR;
|
||||
} else if (sta & FTSDC010_STATUS_RSP_CRC_OK) {
|
||||
|
||||
/* clear response CRC OK bit */
|
||||
clear |= FTSDC010_CLR_RSP_CRC_OK;
|
||||
}
|
||||
|
||||
writel(clear, &host->reg->clr);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ftsdc010_check_data(struct mmc *mmc, struct mmc_cmd *cmd,
|
||||
struct mmc_data *data)
|
||||
{
|
||||
struct mmc_host *host = mmc->priv;
|
||||
unsigned int sta, clear;
|
||||
|
||||
sta = readl(&host->reg->status);
|
||||
debug("%s: sta: %08x cmd %d\n", __func__, sta, cmd->cmdidx);
|
||||
|
||||
/* check DATA TIMEOUT or FAIL */
|
||||
if (data) {
|
||||
|
||||
/* Transfer Complete */
|
||||
if (sta & FTSDC010_STATUS_DATA_END)
|
||||
clear |= FTSDC010_STATUS_DATA_END;
|
||||
|
||||
/* Data CRC_OK */
|
||||
if (sta & FTSDC010_STATUS_DATA_CRC_OK)
|
||||
clear |= FTSDC010_STATUS_DATA_CRC_OK;
|
||||
|
||||
/* DATA TIMEOUT or DATA CRC FAIL */
|
||||
if (sta & FTSDC010_STATUS_DATA_TIMEOUT) {
|
||||
/* DATA TIMEOUT */
|
||||
debug("%s: DATA TIMEOUT: sta: %08x\n",
|
||||
__func__, sta);
|
||||
debug("%s: DATA TIMEOUT: sta: %08x\n", __func__, sta);
|
||||
|
||||
clear |= FTSDC010_STATUS_DATA_TIMEOUT;
|
||||
writel(sta, &host->reg->clr);
|
||||
writel(clear, &host->reg->clr);
|
||||
|
||||
return TIMEOUT;
|
||||
} else if (sta & FTSDC010_STATUS_DATA_CRC_FAIL) {
|
||||
/* Error Interrupt */
|
||||
debug("%s: DATA CRC FAIL: sta: %08x\n",
|
||||
__func__, sta);
|
||||
/* DATA CRC FAIL */
|
||||
debug("%s: DATA CRC FAIL: sta: %08x\n", __func__, sta);
|
||||
|
||||
clear |= FTSDC010_STATUS_DATA_CRC_FAIL;
|
||||
writel(clear, &host->reg->clr);
|
||||
|
||||
return 0;
|
||||
} else if (sta & FTSDC010_STATUS_DATA_END) {
|
||||
/* Transfer Complete */
|
||||
clear |= FTSDC010_STATUS_DATA_END;
|
||||
return COMM_ERR;
|
||||
}
|
||||
writel(clear, &host->reg->clr);
|
||||
}
|
||||
|
||||
/* transaction is success and clear status register */
|
||||
writel(clear, &host->reg->clr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -281,6 +263,9 @@ static int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
|
|||
unsigned int ccon;
|
||||
unsigned int mask, tmpmask;
|
||||
unsigned int ret;
|
||||
unsigned int sta, i;
|
||||
|
||||
ret = 0;
|
||||
|
||||
if (data)
|
||||
mask = FTSDC010_INT_MASK_RSP_TIMEOUT;
|
||||
|
@ -290,13 +275,9 @@ static int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
|
|||
mask = FTSDC010_INT_MASK_CMD_SEND;
|
||||
|
||||
/* write argu reg */
|
||||
debug("%s: cmd->arg: %08x\n", __func__, cmd->cmdarg);
|
||||
debug("%s: argu: %08x\n", __func__, host->reg->argu);
|
||||
writel(cmd->cmdarg, &host->reg->argu);
|
||||
|
||||
/* setup cmd reg */
|
||||
debug("cmd: %d\n", cmd->cmdidx);
|
||||
debug("resp: %08x\n", cmd->resp_type);
|
||||
|
||||
/* setup commnad */
|
||||
ccon = FTSDC010_CMD_IDX(cmd->cmdidx);
|
||||
|
||||
|
@ -340,7 +321,51 @@ static int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
|
|||
/* write cmd reg */
|
||||
debug("%s: ccon: %08x\n", __func__, ccon);
|
||||
writel(ccon, &host->reg->cmd);
|
||||
udelay(4*FTSDC010_DELAY_UNIT);
|
||||
|
||||
/* check CMD_SEND */
|
||||
for (i = 0; i < FTSDC010_CMD_RETRY; i++) {
|
||||
/*
|
||||
* If we read status register too fast
|
||||
* will lead hardware error and the RSP_TIMEOUT
|
||||
* flag will be raised incorrectly.
|
||||
*/
|
||||
udelay(16*FTSDC010_DELAY_UNIT);
|
||||
sta = readl(&host->reg->status);
|
||||
|
||||
/* Command Complete */
|
||||
/*
|
||||
* Note:
|
||||
* Do not clear FTSDC010_CLR_CMD_SEND flag.
|
||||
* (by writing FTSDC010_CLR_CMD_SEND bit to clear register)
|
||||
* It will make the driver becomes very slow.
|
||||
* If the operation hasn't been finished, hardware will
|
||||
* clear this bit automatically.
|
||||
* In origin, the driver will clear this flag if there is
|
||||
* no data need to be read.
|
||||
*/
|
||||
if (sta & FTSDC010_STATUS_CMD_SEND)
|
||||
break;
|
||||
}
|
||||
|
||||
if (i > FTSDC010_CMD_RETRY) {
|
||||
printf("%s: send command timeout\n", __func__);
|
||||
return TIMEOUT;
|
||||
}
|
||||
|
||||
/* check rsp status */
|
||||
ret = ftsdc010_check_rsp(mmc, cmd, data);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* read response if we have RSP_OK */
|
||||
if (ccon & FTSDC010_CMD_LONG_RSP) {
|
||||
cmd->response[0] = readl(&host->reg->rsp3);
|
||||
cmd->response[1] = readl(&host->reg->rsp2);
|
||||
cmd->response[2] = readl(&host->reg->rsp1);
|
||||
cmd->response[3] = readl(&host->reg->rsp0);
|
||||
} else {
|
||||
cmd->response[0] = readl(&host->reg->rsp0);
|
||||
}
|
||||
|
||||
/* read/write data */
|
||||
if (data && (data->flags & MMC_DATA_READ)) {
|
||||
|
@ -351,19 +376,11 @@ static int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
|
|||
data->blocksize * data->blocks);
|
||||
}
|
||||
|
||||
/* pio check response status */
|
||||
ret = ftsdc010_pio_check_status(mmc, cmd, data);
|
||||
if (!ret) {
|
||||
/* if it is long response */
|
||||
if (ccon & FTSDC010_CMD_LONG_RSP) {
|
||||
cmd->response[0] = readl(&host->reg->rsp3);
|
||||
cmd->response[1] = readl(&host->reg->rsp2);
|
||||
cmd->response[2] = readl(&host->reg->rsp1);
|
||||
cmd->response[3] = readl(&host->reg->rsp0);
|
||||
|
||||
} else {
|
||||
cmd->response[0] = readl(&host->reg->rsp0);
|
||||
}
|
||||
/* check data status */
|
||||
if (data) {
|
||||
ret = ftsdc010_check_data(mmc, cmd, data);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
udelay(FTSDC010_DELAY_UNIT);
|
||||
|
@ -431,8 +448,6 @@ static int ftsdc010_setup_data(struct mmc *mmc, struct mmc_data *data)
|
|||
/* always reset fifo since last transfer may fail */
|
||||
dcon |= FTSDC010_DCR_FIFO_RST;
|
||||
|
||||
/* handle sdio */
|
||||
dcon = data->blocksize | data->blocks << 15;
|
||||
if (data->blocks > 1)
|
||||
dcon |= FTSDC010_SDIO_CTRL1_SDIO_BLK_MODE;
|
||||
#endif
|
||||
|
@ -497,7 +512,7 @@ static void ftsdc010_set_clk(struct mmc *mmc)
|
|||
{
|
||||
struct mmc_host *host = mmc->priv;
|
||||
unsigned char clk_div;
|
||||
unsigned char real_rate;
|
||||
unsigned int real_rate;
|
||||
unsigned int clock;
|
||||
|
||||
debug("%s: mmc_set_clock: %x\n", __func__, mmc->clock);
|
||||
|
@ -518,7 +533,7 @@ static void ftsdc010_set_clk(struct mmc *mmc)
|
|||
break;
|
||||
}
|
||||
|
||||
debug("%s: computed real_rete: %x, clk_div: %x\n",
|
||||
debug("%s: computed real_rate: %x, clk_div: %x\n",
|
||||
__func__, real_rate, clk_div);
|
||||
|
||||
if (clk_div > 127)
|
||||
|
@ -579,6 +594,7 @@ static void ftsdc010_set_ios(struct mmc *mmc)
|
|||
static void ftsdc010_reset(struct mmc_host *host)
|
||||
{
|
||||
unsigned int timeout;
|
||||
unsigned int sta;
|
||||
|
||||
/* Do SDC_RST: Software reset for all register */
|
||||
writel(FTSDC010_CMD_SDC_RST, &host->reg->cmd);
|
||||
|
@ -598,6 +614,10 @@ static void ftsdc010_reset(struct mmc_host *host)
|
|||
timeout--;
|
||||
udelay(10*FTSDC010_DELAY_UNIT);
|
||||
}
|
||||
|
||||
sta = readl(&host->reg->status);
|
||||
if (sta & FTSDC010_STATUS_CARD_CHANGE)
|
||||
writel(FTSDC010_CLR_CARD_CHANGE, &host->reg->clr);
|
||||
}
|
||||
|
||||
static int ftsdc010_core_init(struct mmc *mmc)
|
||||
|
@ -645,13 +665,12 @@ int ftsdc010_mmc_init(int dev_index)
|
|||
mmc->send_cmd = ftsdc010_request;
|
||||
mmc->set_ios = ftsdc010_set_ios;
|
||||
mmc->init = ftsdc010_core_init;
|
||||
mmc->getcd = NULL;
|
||||
|
||||
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
|
||||
|
||||
mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
|
||||
|
||||
mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
|
||||
|
||||
mmc->f_min = CONFIG_SYS_CLK_FREQ / 2 / (2*128);
|
||||
mmc->f_max = CONFIG_SYS_CLK_FREQ / 2 / 2;
|
||||
|
||||
|
|
|
@ -337,6 +337,7 @@ int atmel_mci_init(void *regs)
|
|||
mmc->send_cmd = mci_send_cmd;
|
||||
mmc->set_ios = mci_set_ios;
|
||||
mmc->init = mci_init;
|
||||
mmc->getcd = NULL;
|
||||
|
||||
/* need to be able to pass these in on a board by board basis */
|
||||
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
|
||||
|
|
|
@ -40,11 +40,11 @@
|
|||
static struct list_head mmc_devices;
|
||||
static int cur_dev_num = -1;
|
||||
|
||||
int __board_mmc_getcd(u8 *cd, struct mmc *mmc) {
|
||||
int __board_mmc_getcd(struct mmc *mmc) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
int board_mmc_getcd(u8 *cd, struct mmc *mmc)__attribute__((weak,
|
||||
int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
|
||||
alias("__board_mmc_getcd")));
|
||||
|
||||
int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
|
||||
|
@ -674,6 +674,18 @@ int mmc_switch_part(int dev_num, unsigned int part_num)
|
|||
| (part_num & PART_ACCESS_MASK));
|
||||
}
|
||||
|
||||
int mmc_getcd(struct mmc *mmc)
|
||||
{
|
||||
int cd;
|
||||
|
||||
cd = board_mmc_getcd(mmc);
|
||||
|
||||
if ((cd < 0) && mmc->getcd)
|
||||
cd = mmc->getcd(mmc);
|
||||
|
||||
return cd;
|
||||
}
|
||||
|
||||
int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
|
||||
{
|
||||
struct mmc_cmd cmd;
|
||||
|
@ -785,6 +797,16 @@ retry_scr:
|
|||
if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* If the host doesn't support SD_HIGHSPEED, do not switch card to
|
||||
* HIGHSPEED mode even if the card support SD_HIGHSPPED.
|
||||
* This can avoid furthur problem when the card runs in different
|
||||
* mode between the host.
|
||||
*/
|
||||
if (!((mmc->host_caps & MMC_MODE_HS_52MHz) &&
|
||||
(mmc->host_caps & MMC_MODE_HS)))
|
||||
return 0;
|
||||
|
||||
err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
|
||||
|
||||
if (err)
|
||||
|
@ -1192,6 +1214,12 @@ int mmc_init(struct mmc *mmc)
|
|||
{
|
||||
int err;
|
||||
|
||||
if (mmc_getcd(mmc) == 0) {
|
||||
mmc->has_init = 0;
|
||||
printf("MMC: no card present\n");
|
||||
return NO_CARD_ERR;
|
||||
}
|
||||
|
||||
if (mmc->has_init)
|
||||
return 0;
|
||||
|
||||
|
|
|
@ -272,6 +272,7 @@ struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode)
|
|||
mmc->send_cmd = mmc_spi_request;
|
||||
mmc->set_ios = mmc_spi_set_ios;
|
||||
mmc->init = mmc_spi_init_p;
|
||||
mmc->getcd = NULL;
|
||||
mmc->host_caps = MMC_MODE_SPI;
|
||||
|
||||
mmc->voltages = MMC_SPI_VOLTAGE;
|
||||
|
|
|
@ -44,8 +44,7 @@ int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks)
|
|||
host->quirks = quirks;
|
||||
#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
|
||||
memset(&mv_ops, 0, sizeof(struct sdhci_ops));
|
||||
if (mv_sdhci_writeb != NULL)
|
||||
mv_ops.write_b = mv_sdhci_writeb;
|
||||
mv_ops.write_b = mv_sdhci_writeb;
|
||||
host->ops = &mv_ops;
|
||||
#endif
|
||||
if (quirks & SDHCI_QUIRK_REG32_RW)
|
||||
|
|
|
@ -500,6 +500,7 @@ static int mxcmci_initialize(bd_t *bis)
|
|||
mmc->send_cmd = mxcmci_request;
|
||||
mmc->set_ios = mxcmci_set_ios;
|
||||
mmc->init = mxcmci_init;
|
||||
mmc->getcd = NULL;
|
||||
mmc->host_caps = MMC_MODE_4BIT;
|
||||
|
||||
host->base = (struct mxcmci_regs *)CONFIG_MXC_MCI_REGS_BASE;
|
||||
|
|
|
@ -329,6 +329,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
|
|||
mmc->send_cmd = mxsmmc_send_cmd;
|
||||
mmc->set_ios = mxsmmc_set_ios;
|
||||
mmc->init = mxsmmc_init;
|
||||
mmc->getcd = NULL;
|
||||
mmc->priv = priv;
|
||||
|
||||
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
|
||||
|
|
|
@ -472,6 +472,7 @@ int omap_mmc_init(int dev_index)
|
|||
mmc->send_cmd = mmc_send_cmd;
|
||||
mmc->set_ios = mmc_set_ios;
|
||||
mmc->init = mmc_init_setup;
|
||||
mmc->getcd = NULL;
|
||||
|
||||
switch (dev_index) {
|
||||
case 0:
|
||||
|
|
|
@ -411,6 +411,7 @@ int pxa_mmc_register(int card_index)
|
|||
mmc->send_cmd = pxa_mmc_request;
|
||||
mmc->set_ios = pxa_mmc_set_ios;
|
||||
mmc->init = pxa_mmc_init;
|
||||
mmc->getcd = NULL;
|
||||
|
||||
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
|
||||
mmc->f_max = PXAMMC_MAX_SPEED;
|
||||
|
|
|
@ -463,6 +463,7 @@ static int s5p_mmc_initialize(int dev_index, int bus_width)
|
|||
mmc->send_cmd = mmc_send_cmd;
|
||||
mmc->set_ios = mmc_set_ios;
|
||||
mmc->init = mmc_core_init;
|
||||
mmc->getcd = NULL;
|
||||
|
||||
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
|
||||
if (bus_width == 8)
|
||||
|
|
|
@ -390,6 +390,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
|
|||
mmc->send_cmd = sdhci_send_command;
|
||||
mmc->set_ios = sdhci_set_ios;
|
||||
mmc->init = sdhci_init;
|
||||
mmc->getcd = NULL;
|
||||
|
||||
caps = sdhci_readl(host, SDHCI_CAPABILITIES);
|
||||
#ifdef CONFIG_MMC_SDMA
|
||||
|
|
|
@ -598,6 +598,7 @@ int mmcif_mmc_init(void)
|
|||
mmc->send_cmd = sh_mmcif_request;
|
||||
mmc->set_ios = sh_mmcif_set_ios;
|
||||
mmc->init = sh_mmcif_init;
|
||||
mmc->getcd = NULL;
|
||||
host->regs = (struct sh_mmcif_regs *)CONFIG_SH_MMCIF_ADDR;
|
||||
host->clk = CONFIG_SH_MMCIF_CLK;
|
||||
mmc->priv = host;
|
||||
|
|
|
@ -474,6 +474,18 @@ static int mmc_core_init(struct mmc *mmc)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int tegra2_mmc_getcd(struct mmc *mmc)
|
||||
{
|
||||
struct mmc_host *host = (struct mmc_host *)mmc->priv;
|
||||
|
||||
debug("tegra2_mmc_getcd called\n");
|
||||
|
||||
if (host->cd_gpio >= 0)
|
||||
return !gpio_get_value(host->cd_gpio);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio)
|
||||
{
|
||||
struct mmc_host *host;
|
||||
|
@ -512,6 +524,7 @@ int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio)
|
|||
mmc->send_cmd = mmc_send_cmd;
|
||||
mmc->set_ios = mmc_set_ios;
|
||||
mmc->init = mmc_core_init;
|
||||
mmc->getcd = tegra2_mmc_getcd;
|
||||
|
||||
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
|
||||
if (bus_width == 8)
|
||||
|
@ -535,22 +548,3 @@ int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio)
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* this is a weak define that we are overriding */
|
||||
int board_mmc_getcd(u8 *cd, struct mmc *mmc)
|
||||
{
|
||||
struct mmc_host *host = (struct mmc_host *)mmc->priv;
|
||||
|
||||
debug("board_mmc_getcd called\n");
|
||||
|
||||
*cd = 1; /* Assume card is inserted, or eMMC */
|
||||
|
||||
if (IS_SD(mmc)) {
|
||||
if (host->cd_gpio >= 0) {
|
||||
if (gpio_get_value(host->cd_gpio))
|
||||
*cd = 0;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -302,6 +302,7 @@ struct mmc {
|
|||
struct mmc_cmd *cmd, struct mmc_data *data);
|
||||
void (*set_ios)(struct mmc *mmc);
|
||||
int (*init)(struct mmc *mmc);
|
||||
int (*getcd)(struct mmc *mmc);
|
||||
uint b_max;
|
||||
};
|
||||
|
||||
|
@ -314,8 +315,9 @@ struct mmc *find_mmc_device(int dev_num);
|
|||
int mmc_set_dev(int dev_num);
|
||||
void print_mmc_devices(char separator);
|
||||
int get_mmc_num(void);
|
||||
int board_mmc_getcd(u8 *cd, struct mmc *mmc);
|
||||
int board_mmc_getcd(struct mmc *mmc);
|
||||
int mmc_switch_part(int dev_num, unsigned int part_num);
|
||||
int mmc_getcd(struct mmc *mmc);
|
||||
|
||||
#ifdef CONFIG_GENERIC_MMC
|
||||
int atmel_mci_init(void *regs);
|
||||
|
|
Loading…
Reference in a new issue