Add splash screen for our board using EPDC
Martin T. H. Sandsmark
parent
d3a81600f4
commit
6e86f08d1c
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@ -1,6 +1,6 @@
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# (C) Copyright 2013 Freescale Semiconductor, Inc.
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# (C) Copyright 2016 reMarkable AS
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := zero-gravitas.o
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obj-y := zero-gravitas.o epdc_setup.o
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@ -0,0 +1,285 @@
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/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright (C) 2016 reMarkable AS. All Rights Reserved.
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*
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* Peng Fan <Peng.Fan@freescale.com>
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* Martin Sandsmark <martin.sandsmark@remarkable.no>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <lcd.h>
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#include <linux/err.h>
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#include <linux/types.h>
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#include <malloc.h>
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#include <mxc_epdc_fb.h>
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#define is_digit(c) ((c) >= '0' && (c) <= '9')
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__weak int mmc_get_env_devno(void)
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{
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return 0;
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}
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__weak int check_mmc_autodetect(void)
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{
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return 0;
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}
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struct waveform_data_header {
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unsigned int wi0;
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unsigned int wi1;
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unsigned int wi2;
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unsigned int wi3;
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unsigned int wi4;
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unsigned int wi5;
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unsigned int wi6;
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unsigned int xwia:24;
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unsigned int cs1:8;
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unsigned int wmta:24;
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unsigned int fvsn:8;
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unsigned int luts:8;
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unsigned int mc:8;
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unsigned int trc:8;
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unsigned int reserved0_0:8;
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unsigned int eb:8;
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unsigned int sb:8;
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unsigned int reserved0_1:8;
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unsigned int reserved0_2:8;
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unsigned int reserved0_3:8;
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unsigned int reserved0_4:8;
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unsigned int reserved0_5:8;
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unsigned int cs2:8;
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};
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struct mxcfb_waveform_data_file {
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struct waveform_data_header wdh;
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u32 *data; /* Temperature Range Table + Waveform Data */
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};
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int board_setup_waveform_file(ulong waveform_buf)
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{
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char *fs_argv[5];
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char addr[17];
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ulong file_len, mmc_dev;
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struct mxcfb_waveform_data_file *wf_file;
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int wf_offset, i;
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int temperature_entries;
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if (!check_mmc_autodetect())
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mmc_dev = getenv_ulong("mmcdev", 10, 0);
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else
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mmc_dev = mmc_get_env_devno();
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/* Allocate memory for storing the full waveform file */
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wf_file = memalign(ARCH_DMA_MINALIGN, CONFIG_WAVEFORM_BUF_SIZE);
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if (!wf_file) {
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printf("Failed to allocate temporary waveform file buffer\n");
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return -1;
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}
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sprintf(addr, "%p", wf_file);
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fs_argv[0] = "fatload";
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fs_argv[1] = "mmc";
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fs_argv[2] = simple_itoa(mmc_dev);
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fs_argv[3] = addr;
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fs_argv[4] = getenv("epdc_waveform");
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if (!fs_argv[4])
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fs_argv[4] = "waveform.bin";
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if (do_fat_fsload(NULL, 0, 5, fs_argv)) {
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printf("EPDC: File %s not found on MMC Device %lu!\n", fs_argv[4], mmc_dev);
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free(wf_file);
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return -1;
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}
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file_len = getenv_hex("filesize", 0);
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if (!file_len) {
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printf("EPDC: Failed to get file size from environment\n");
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free(wf_file);
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return -1;
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}
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/* Parse header to find offset for raw waveform data for EPDC */
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temperature_entries = wf_file->wdh.trc + 1;
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for (i = 0; i < temperature_entries; i++) {
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printf("temperature entry #%d = 0x%x\n", i, *((u8 *)&wf_file->data + i));
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}
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wf_offset = sizeof(wf_file->wdh) + temperature_entries + 1;
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memcpy((u8*)waveform_buf, (u8*)(wf_file) + wf_offset, file_len - wf_offset);
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free(wf_file);
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flush_cache(waveform_buf, file_len - wf_offset);
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return 0;
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}
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int board_setup_logo_file(void *display_buf)
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{
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int logo_width, logo_height;
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char *fs_argv[5];
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char addr[17];
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int array[3];
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ulong file_len, mmc_dev;
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char *buf, *s;
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int arg = 0, val = 0, pos = 0;
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int i, j, max_check_length;
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int row, col, row_end, col_end;
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if (!display_buf)
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return -EINVAL;
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/* Assume PGM header not exceeds 128 bytes */
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max_check_length = 128;
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if (!check_mmc_autodetect())
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mmc_dev = getenv_ulong("mmcdev", 10, 0);
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else
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mmc_dev = mmc_get_env_devno();
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fs_argv[0] = "fatsize";
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fs_argv[1] = "mmc";
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fs_argv[2] = simple_itoa(mmc_dev);
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fs_argv[3] = getenv("logo");
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if (!fs_argv[3])
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fs_argv[3] = "logo.pgm";
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if (do_fat_size(NULL, 0, 4, fs_argv)) {
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debug("File %s not found on MMC Device %lu, use black border\n", fs_argv[3], mmc_dev);
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/* Draw black border around framebuffer*/
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memset(display_buf, 0xFF, 24 * panel_info.vl_col);
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for (i = 24; i < (panel_info.vl_row - 24); i++) {
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memset((u8 *)display_buf + i * panel_info.vl_col,
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0x00, 24);
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memset((u8 *)display_buf + i * panel_info.vl_col
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+ panel_info.vl_col - 24, 0x00, 24);
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}
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memset((u8 *)display_buf +
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panel_info.vl_col * (panel_info.vl_row - 24),
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0xFF, 24 * panel_info.vl_col);
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return 0;
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}
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file_len = getenv_hex("filesize", 0);
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if (!file_len)
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return -EINVAL;
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buf = memalign(ARCH_DMA_MINALIGN, file_len);
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if (!buf)
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return -ENOMEM;
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sprintf(addr, "%lx", (ulong)buf);
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fs_argv[0] = "fatload";
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fs_argv[1] = "mmc";
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fs_argv[2] = simple_itoa(mmc_dev);
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fs_argv[3] = addr;
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fs_argv[4] = getenv("logo");
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if (!fs_argv[4])
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fs_argv[4] = "logo.pgm";
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if (do_fat_fsload(NULL, 0, 5, fs_argv)) {
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printf("File %s not found on MMC Device %lu!\n", fs_argv[4], mmc_dev);
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free(buf);
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return -1;
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}
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if (strncmp(buf, "P5", 2)) {
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printf("Wrong format for epdc logo, use PGM-P5 format.\n");
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free(buf);
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return -EINVAL;
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}
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/* Skip P5\n */
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pos += 3;
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arg = 0;
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for (i = 3; i < max_check_length; ) {
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/* skip \n \t and space */
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if ((buf[i] == '\n') || (buf[i] == '\t') || (buf[i] == ' ')) {
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i++;
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continue;
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}
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/* skip comment */
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if (buf[i] == '#') {
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while (buf[i++] != '\n')
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;
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continue;
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}
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/* HEIGTH, WIDTH, MAX PIXEL VLAUE total 3 args */
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if (arg > 2)
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break;
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val = 0;
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while (is_digit(buf[i])) {
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val = val * 10 + buf[i] - '0';
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i++;
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}
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array[arg++] = val;
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i++;
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}
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/* Point to data area */
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pos = i;
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logo_width = array[0];
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logo_height = array[1];
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if ((logo_width > panel_info.vl_col) ||
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(logo_height > panel_info.vl_row)) {
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printf("Splash screen too big for display\n");
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free(buf);
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return -EINVAL;
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}
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/* m,m means center of screen */
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row = -1;
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col = -1;
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s = getenv("splashpos");
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if (s) {
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if (s[0] == 'm')
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col = (panel_info.vl_col - logo_width) >> 1;
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else
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col = simple_strtol(s, NULL, 0);
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s = strchr(s + 1, ',');
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if (s != NULL) {
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if (s[1] == 'm')
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row = (panel_info.vl_row - logo_height) >> 1;
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else
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row = simple_strtol(s + 1, NULL, 0);
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}
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}
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if (row < 0) {
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row = (panel_info.vl_row - logo_height) >> 1;
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}
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if (col < 0) {
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col = (panel_info.vl_col - logo_width) >> 1;
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}
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if ((col + logo_width > panel_info.vl_col) ||
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(row + logo_height > panel_info.vl_row)) {
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printf("Incorrect pos, use (0, 0)\n");
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row = 0;
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col = 0;
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}
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/* Draw picture at the center of screen */
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row_end = row + logo_height;
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col_end = col + logo_width;
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for (i = row; i < row_end; i++) {
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for (j = col; j < col_end; j++) {
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*((u8 *)display_buf + i * (panel_info.vl_col) + j) =
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buf[pos++];
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}
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}
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free(buf);
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flush_cache((ulong)display_buf, file_len - pos - 1);
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return 0;
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}
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@ -31,6 +31,9 @@
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#include <usb.h>
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#include <usb/ehci-ci.h>
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#include <lcd.h>
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#include <mxc_epdc_fb.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
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@ -55,7 +58,8 @@ DECLARE_GLOBAL_DATA_PTR;
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PAD_CTL_DSE_80ohm | PAD_CTL_HYS | \
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PAD_CTL_SRE_FAST)
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#define ETH_PHY_POWER IMX_GPIO_NR(4, 21)
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#define EPDC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
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/* GPIO keys */
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#define GPIO_KEY_LEFT IMX_GPIO_NR(3, 24)
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@ -170,6 +174,68 @@ static iomux_v3_cfg_t const gpio_key_pads[] = {
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MX6_PAD_KEY_COL2__GPIO_3_28 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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static iomux_v3_cfg_t const epdc_enable_pads[] = {
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MX6_PAD_EPDC_D0__EPDC_SDDO_0 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D1__EPDC_SDDO_1 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D2__EPDC_SDDO_2 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D3__EPDC_SDDO_3 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D4__EPDC_SDDO_4 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D5__EPDC_SDDO_5 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D6__EPDC_SDDO_6 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D7__EPDC_SDDO_7 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D8__EPDC_SDDO_8 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D9__EPDC_SDDO_9 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D10__EPDC_SDDO_10 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D11__EPDC_SDDO_11 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D12__EPDC_SDDO_12 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D13__EPDC_SDDO_13 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D14__EPDC_SDDO_14 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_D15__EPDC_SDDO_15 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_GDCLK__EPDC_GDCLK | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_GDSP__EPDC_GDSP | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_GDOE__EPDC_GDOE | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_GDRL__EPDC_GDRL | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_SDCLK__EPDC_SDCLK | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_SDOE__EPDC_SDOE | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_SDLE__EPDC_SDLE | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_SDSHR__EPDC_SDSHR | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_BDR0__EPDC_BDR_0 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_SDCE0__EPDC_SDCE_0 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_SDCE1__EPDC_SDCE_1 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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MX6_PAD_EPDC_SDCE2__EPDC_SDCE_2 | MUX_PAD_CTRL(EPDC_PAD_CTRL),
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};
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static iomux_v3_cfg_t const epdc_disable_pads[] = {
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MX6_PAD_EPDC_D0__GPIO_1_7,
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MX6_PAD_EPDC_D1__GPIO_1_8,
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MX6_PAD_EPDC_D2__GPIO_1_9,
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MX6_PAD_EPDC_D3__GPIO_1_10,
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MX6_PAD_EPDC_D4__GPIO_1_11,
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MX6_PAD_EPDC_D5__GPIO_1_12,
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MX6_PAD_EPDC_D6__GPIO_1_13,
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MX6_PAD_EPDC_D7__GPIO_1_14,
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MX6_PAD_EPDC_D8__GPIO_1_15,
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MX6_PAD_EPDC_D9__GPIO_1_16,
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MX6_PAD_EPDC_D10__GPIO_1_17,
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MX6_PAD_EPDC_D11__GPIO_1_18,
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MX6_PAD_EPDC_D12__GPIO_1_19,
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MX6_PAD_EPDC_D13__GPIO_1_20,
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MX6_PAD_EPDC_D14__GPIO_1_21,
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MX6_PAD_EPDC_D15__GPIO_1_22,
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MX6_PAD_EPDC_GDCLK__GPIO_1_31,
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MX6_PAD_EPDC_GDSP__GPIO_2_2,
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MX6_PAD_EPDC_GDOE__GPIO_2_0,
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MX6_PAD_EPDC_GDRL__GPIO_2_1,
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MX6_PAD_EPDC_SDCLK__GPIO_1_23,
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MX6_PAD_EPDC_SDOE__GPIO_1_25,
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MX6_PAD_EPDC_SDLE__GPIO_1_24,
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MX6_PAD_EPDC_SDSHR__GPIO_1_26,
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MX6_PAD_EPDC_BDR0__GPIO_2_5,
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MX6_PAD_EPDC_SDCE0__GPIO_1_27,
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MX6_PAD_EPDC_SDCE1__GPIO_1_28,
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MX6_PAD_EPDC_SDCE2__GPIO_1_29,
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};
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static void setup_iomux_uart(void)
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{
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imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
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@ -593,6 +659,189 @@ int board_early_init_f(void)
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return 0;
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}
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vidinfo_t panel_info = {
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.vl_refresh = 75,
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.vl_col = 1872,
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.vl_row = 1404,
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.vl_pixclock = 120000000,
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.vl_left_margin = 52,
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.vl_right_margin = 75,
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.vl_upper_margin = 4,
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.vl_lower_margin = 14,
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.vl_hsync = 60,
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.vl_vsync = 2,
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.vl_sync = 0,
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.vl_mode = 0,
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.vl_flag = 0,
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.vl_bpix = 3,
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.cmap = 0,
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};
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struct epdc_timing_params panel_timings = {
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.vscan_holdoff = 4,
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.sdoed_width = 10,
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.sdoed_delay = 20,
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.sdoez_width = 10,
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.sdoez_delay = 20,
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.gdclk_hp_offs = 583,
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.gdsp_offs = 939,
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.gdoe_offs = 0,
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.gdclk_offs = 376,
|
||||
.num_ce = 3,
|
||||
};
|
||||
|
||||
static void setup_epdc_power(void)
|
||||
{
|
||||
/* Setup epdc voltage */
|
||||
|
||||
/* EPDC_PWRSTAT - GPIO2[13] for PWR_GOOD status */
|
||||
imx_iomux_v3_setup_pad(MX6_PAD_EPDC_PWRSTAT__GPIO_2_13 |
|
||||
MUX_PAD_CTRL(EPDC_PAD_CTRL));
|
||||
gpio_direction_input(IMX_GPIO_NR(2, 13));
|
||||
|
||||
/* EPDC_VCOM0 - GPIO2[3] for VCOM control */
|
||||
imx_iomux_v3_setup_pad(MX6_PAD_EPDC_VCOM0__GPIO_2_3 |
|
||||
MUX_PAD_CTRL(EPDC_PAD_CTRL));
|
||||
|
||||
/* Set as output */
|
||||
gpio_direction_output(IMX_GPIO_NR(2, 3), 1);
|
||||
|
||||
/* EPDC_PWRWAKEUP - GPIO2[14] for EPD PMIC WAKEUP */
|
||||
imx_iomux_v3_setup_pad(MX6_PAD_EPDC_PWRWAKEUP__GPIO_2_14 |
|
||||
MUX_PAD_CTRL(EPDC_PAD_CTRL));
|
||||
/* Set as output */
|
||||
gpio_direction_output(IMX_GPIO_NR(2, 14), 1);
|
||||
|
||||
/* Set as output */
|
||||
/*gpio_direction_output(IMX_GPIO_NR(2, 7), 1);*/
|
||||
}
|
||||
|
||||
static void epdc_enable_pins(void)
|
||||
{
|
||||
/* epdc iomux settings */
|
||||
imx_iomux_v3_setup_multiple_pads(epdc_enable_pads,
|
||||
ARRAY_SIZE(epdc_enable_pads));
|
||||
}
|
||||
|
||||
static void epdc_disable_pins(void)
|
||||
{
|
||||
/* Configure MUX settings for EPDC pins to GPIO and drive to 0 */
|
||||
imx_iomux_v3_setup_multiple_pads(epdc_disable_pads,
|
||||
ARRAY_SIZE(epdc_disable_pads));
|
||||
}
|
||||
|
||||
static void setup_epdc(void)
|
||||
{
|
||||
unsigned int reg;
|
||||
struct mxc_ccm_reg *ccm_regs = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
|
||||
|
||||
/*** epdc Maxim PMIC settings ***/
|
||||
|
||||
/* EPDC PWRSTAT - GPIO2[13] for PWR_GOOD status */
|
||||
imx_iomux_v3_setup_pad(MX6_PAD_EPDC_PWRSTAT__GPIO_2_13 |
|
||||
MUX_PAD_CTRL(EPDC_PAD_CTRL));
|
||||
|
||||
/* EPDC VCOM0 - GPIO2[3] for VCOM control */
|
||||
imx_iomux_v3_setup_pad(MX6_PAD_EPDC_VCOM0__GPIO_2_3 |
|
||||
MUX_PAD_CTRL(EPDC_PAD_CTRL));
|
||||
|
||||
/* UART4 TXD - GPIO2[14] for EPD PMIC WAKEUP */
|
||||
imx_iomux_v3_setup_pad(MX6_PAD_EPDC_PWRWAKEUP__GPIO_2_14 |
|
||||
MUX_PAD_CTRL(EPDC_PAD_CTRL));
|
||||
|
||||
/*** Set pixel clock rates for EPDC ***/
|
||||
|
||||
/* EPDC AXI clk from PFD_400M, set to 396/2 = 198MHz */
|
||||
reg = readl(&ccm_regs->chsccdr);
|
||||
reg &= ~0x3F000;
|
||||
reg |= (0x4 << 15) | (1 << 12);
|
||||
writel(reg, &ccm_regs->chsccdr);
|
||||
|
||||
/* EPDC AXI clk enable */
|
||||
reg = readl(&ccm_regs->CCGR3);
|
||||
reg |= 0x0030;
|
||||
writel(reg, &ccm_regs->CCGR3);
|
||||
|
||||
/* EPDC PIX clk from PFD_480M (PLL3), set to 480/3 = 160MHz */
|
||||
reg = readl(&ccm_regs->cscdr2);
|
||||
reg &= ~0x03F000;
|
||||
reg |= (5 << 15) | (2 << 12);
|
||||
writel(reg, &ccm_regs->cscdr2);
|
||||
|
||||
/* EPDC PIX clk post divider, set to 1 */
|
||||
reg = readl(&ccm_regs->cbcmr);
|
||||
reg &= ~0x03800000;
|
||||
/*reg |= (0x0 << 23);*/
|
||||
writel(reg, &ccm_regs->cbcmr);
|
||||
|
||||
/* EPDC PIX clk enable */
|
||||
reg = readl(&ccm_regs->CCGR3);
|
||||
reg |= 0x0C00;
|
||||
writel(reg, &ccm_regs->CCGR3);
|
||||
|
||||
panel_info.epdc_data.wv_modes.mode_init = 0;
|
||||
panel_info.epdc_data.wv_modes.mode_du = 1;
|
||||
panel_info.epdc_data.wv_modes.mode_gc4 = 3;
|
||||
panel_info.epdc_data.wv_modes.mode_gc8 = 2;
|
||||
panel_info.epdc_data.wv_modes.mode_gc16 = 2;
|
||||
panel_info.epdc_data.wv_modes.mode_gc32 = 2;
|
||||
|
||||
panel_info.epdc_data.epdc_timings = panel_timings;
|
||||
|
||||
setup_epdc_power();
|
||||
}
|
||||
|
||||
void epdc_power_on(void)
|
||||
{
|
||||
unsigned int reg;
|
||||
int tries = 10;
|
||||
|
||||
printf("Powering on EPDC\n");
|
||||
|
||||
/* Enable epdc signal pin */
|
||||
epdc_enable_pins();
|
||||
|
||||
/* Set PMIC Wakeup to high - enable Display power */
|
||||
gpio_set_value(IMX_GPIO_NR(2, 14), 1);
|
||||
|
||||
/* Wait for PWRGOOD == 1 */
|
||||
while (tries--) {
|
||||
reg = gpio_get_value(IMX_GPIO_NR(2, 13));
|
||||
if (reg) {
|
||||
break;
|
||||
}
|
||||
|
||||
/*reg = readl(&gpio_regs->gpio_psr);
|
||||
if (!(reg & (1 << 13)))
|
||||
break;*/
|
||||
|
||||
udelay(1000);
|
||||
}
|
||||
if (!tries) {
|
||||
printf("Failed to bring up display power\n");
|
||||
}
|
||||
|
||||
/* Enable VCOM */
|
||||
gpio_set_value(IMX_GPIO_NR(2, 3), 1);
|
||||
|
||||
udelay(500);
|
||||
}
|
||||
|
||||
void epdc_power_off(void)
|
||||
{
|
||||
printf("Powering off EPDC\n");
|
||||
/* Set PMIC Wakeup to low - disable Display power */
|
||||
gpio_set_value(IMX_GPIO_NR(2, 14), 0);
|
||||
|
||||
/* Disable VCOM */
|
||||
gpio_set_value(IMX_GPIO_NR(2, 3), 0);
|
||||
|
||||
epdc_disable_pins();
|
||||
|
||||
/* Set EPD_PWR_CTL0 to low - disable EINK_VDD (3.15) */
|
||||
/*gpio_set_value(IMX_GPIO_NR(2, 7), 0);*/
|
||||
}
|
||||
|
||||
/*
|
||||
* Sets up GPIO keys and checks for magic key combo
|
||||
*/
|
||||
|
|
@ -725,6 +974,7 @@ int board_init(void)
|
|||
hab_rvt_failsafe(); /* This never returns, hopefully */
|
||||
}
|
||||
|
||||
setup_epdc();
|
||||
|
||||
#ifdef CONFIG_SYS_I2C_MXC
|
||||
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
|
||||
|
|
|
|||
|
|
@ -341,6 +341,9 @@ void doc_probe(unsigned long physadr);
|
|||
/* common/cmd_net.c */
|
||||
int do_tftpb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
|
||||
|
||||
/* common/cmd_fat.c */
|
||||
int do_fat_size(cmd_tbl_t *, int, int, char * const []);
|
||||
|
||||
/* common/cmd_fat.c */
|
||||
int do_fat_fsload(cmd_tbl_t *, int, int, char * const []);
|
||||
|
||||
|
|
|
|||
|
|
@ -18,8 +18,17 @@
|
|||
#include "imx6_spl.h"
|
||||
#endif
|
||||
|
||||
/* Size of malloc() pool */
|
||||
#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
|
||||
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
|
||||
|
||||
#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* We don't want to use the EPD for console */
|
||||
#define CONFIG_MXC_EPDC
|
||||
#define CONFIG_WAVEFORM_BUF_SIZE SZ_4M
|
||||
#define CONFIG_SPLASH_SCREEN
|
||||
#define CONFIG_LCD
|
||||
#define CONFIG_CMD_BMP
|
||||
|
||||
/* Size of malloc() pool, needs space for EPDC working buffer */
|
||||
#define CONFIG_SYS_MALLOC_LEN (SZ_32M)
|
||||
|
||||
#define CONFIG_BOARD_EARLY_INIT_F
|
||||
|
||||
|
|
@ -118,18 +127,8 @@
|
|||
/* Environment organization */
|
||||
#define CONFIG_ENV_SIZE SZ_8K
|
||||
|
||||
#if defined CONFIG_SYS_BOOT_SPINOR
|
||||
#define CONFIG_ENV_IS_IN_SPI_FLASH
|
||||
#define CONFIG_ENV_OFFSET (768 * 1024)
|
||||
#define CONFIG_ENV_SECT_SIZE (64 * 1024)
|
||||
#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
|
||||
#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
|
||||
#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
|
||||
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
|
||||
#else
|
||||
#define CONFIG_ENV_OFFSET (8 * SZ_64K)
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CMD_SF
|
||||
#define CONFIG_MXC_SPI
|
||||
|
|
|
|||
Loading…
Reference in New Issue