armv8: cavium: Add ThunderX 88xx board definition
This commit adds basic Cavium ThunderX 88xx board definitions and support. Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> [trini: Drop CONFIG_SYS_GENERIC_BOARD define] Signed-off-by: Tom Rini <trini@konsulko.com>utp
Sergey Temerkhanov
Tom Rini
parent
1674bd1a77
commit
746f985add
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@ -716,6 +716,10 @@ config ARCH_ROCKCHIP
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select CPU_V7
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select DM
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config TARGET_THUNDERX_88XX
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bool "Support ThunderX 88xx"
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select OF_CONTROL
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endchoice
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source "arch/arm/mach-at91/Kconfig"
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@ -784,6 +788,7 @@ source "board/bluegiga/apx4devkit/Kconfig"
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source "board/broadcom/bcm28155_ap/Kconfig"
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source "board/broadcom/bcmcygnus/Kconfig"
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source "board/broadcom/bcmnsp/Kconfig"
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source "board/cavium/thunderx/Kconfig"
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source "board/cirrus/edb93xx/Kconfig"
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source "board/compulab/cm_t335/Kconfig"
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source "board/compulab/cm_t43/Kconfig"
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@ -348,7 +348,7 @@
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interrupts = <1 21 4>;
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clocks = <&refclk50mhz>;
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clock-names = "apb_pclk";
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flags = <1>;
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uboot,skip-init;
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};
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uaa1: serial@87e0,25000000 {
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@ -357,7 +357,7 @@
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interrupts = <1 22 4>;
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clocks = <&refclk50mhz>;
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clock-names = "apb_pclk";
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flags = <1>;
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uboot,skip-init;
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};
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};
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};
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@ -0,0 +1,27 @@
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if TARGET_THUNDERX_88XX
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config SYS_CPU
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string
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default "armv8"
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config SYS_BOARD
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string
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default "thunderx"
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config SYS_VENDOR
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string
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default "cavium"
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config SYS_CONFIG_NAME
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string
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default "thunderx_88xx"
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config CMD_ATF
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bool "Enable ATF query commands"
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default y
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help
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Enable vendor specific ATF query commands such as SPI and SD/MMC
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devices access, low level environment query, boot device layout
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and node count.
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endif
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@ -0,0 +1,6 @@
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THUNDERX BOARD
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M: Sergey Temerkhanov <s.temerkhanov@gmail.com>
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S: Maintained
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F: board/cavium/thunderx/
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F: include/configs/thunderx_88xx.h
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F: configs/thunderx_88xx_defconfig
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@ -0,0 +1,8 @@
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#
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#
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# (C) Copyright 2014, Cavium Inc.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := thunderx.o
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@ -0,0 +1,75 @@
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/**
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* (C) Copyright 2014, Cavium Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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**/
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#include <common.h>
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#include <malloc.h>
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#include <errno.h>
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#include <linux/compiler.h>
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#if !CONFIG_IS_ENABLED(OF_CONTROL)
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#include <dm/platdata.h>
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#include <dm/platform_data/serial_pl01x.h>
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static const struct pl01x_serial_platdata serial0 = {
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.base = CONFIG_SYS_SERIAL0,
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.type = TYPE_PL011,
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.clock = 0,
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.skip_init = true,
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};
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U_BOOT_DEVICE(thunderx_serial0) = {
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.name = "serial_pl01x",
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.platdata = &serial0,
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};
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static const struct pl01x_serial_platdata serial1 = {
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.base = CONFIG_SYS_SERIAL1,
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.type = TYPE_PL011,
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.clock = 0,
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.skip_init = true,
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};
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U_BOOT_DEVICE(thunderx_serial1) = {
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.name = "serial_pl01x",
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.platdata = &serial1,
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};
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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return 0;
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}
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int timer_init(void)
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{
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return 0;
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}
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/*
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* Board specific reset that is system reset.
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*/
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void reset_cpu(ulong addr)
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{
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}
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/*
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* Board specific ethernet initialization routine.
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*/
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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return rc;
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}
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#ifdef CONFIG_PCI
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void pci_init_board(void)
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{
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printf("DEBUG: PCI Init TODO *****\n");
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}
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#endif
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@ -0,0 +1,24 @@
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CONFIG_ARM=y
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CONFIG_TARGET_THUNDERX_88XX=y
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CONFIG_DM_SERIAL=y
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CONFIG_DEFAULT_DEVICE_TREE="thunderx-88xx"
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CONFIG_SYS_EXTRA_OPTIONS="ARM64"
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_PROMPT="ThunderX_88XX> "
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_EXPORTENV is not set
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# CONFIG_CMD_IMPORTENV is not set
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# CONFIG_CMD_EDITENV is not set
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# CONFIG_CMD_SAVEENV is not set
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# CONFIG_CMD_ENV_EXISTS is not set
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_FPGA is not set
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# CONFIG_CMD_NET is not set
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# CONFIG_CMD_NFS is not set
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CONFIG_DM=y
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CONFIG_DEBUG_UART=y
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CONFIG_DEBUG_UART_PL011=y
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CONFIG_DEBUG_UART_BASE=0x87e024000000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART_SKIP_INIT=y
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CONFIG_REGEX=y
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@ -0,0 +1,143 @@
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/**
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* (C) Copyright 2014, Cavium Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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**/
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#ifndef __THUNDERX_88XX_H__
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#define __THUNDERX_88XX_H__
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#define CONFIG_REMAKE_ELF
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#define CONFIG_THUNDERX
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#define CONFIG_SYS_64BIT
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_IDENT_STRING \
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" for Cavium Thunder CN88XX ARM v8 Multi-Core"
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#define CONFIG_BOOTP_VCI_STRING "Diagnostics"
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#define MEM_BASE 0x00500000
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#define CONFIG_COREID_MASK 0xffffff
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#define CONFIG_SYS_FULL_VA
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#define CONFIG_SYS_MEM_MAP {{0x000000000000UL, 0x40000000000UL, \
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PTL2_MEMTYPE(MT_NORMAL) | \
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PTL2_BLOCK_NON_SHARE}, \
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{0x800000000000UL, 0x40000000000UL, \
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PTL2_MEMTYPE(MT_DEVICE_NGNRNE) | \
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PTL2_BLOCK_NON_SHARE}, \
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{0x840000000000UL, 0x40000000000UL, \
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PTL2_MEMTYPE(MT_DEVICE_NGNRNE) | \
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PTL2_BLOCK_NON_SHARE}, \
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}
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#define CONFIG_SYS_MEM_MAP_SIZE 3
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#define CONFIG_SYS_VA_BITS 48
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#define CONFIG_SYS_PTL2_BITS 42
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#define CONFIG_SYS_BLOCK_SHIFT 29
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#define CONFIG_SYS_PTL1_ENTRIES 64
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#define CONFIG_SYS_PTL2_ENTRIES 8192
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#define CONFIG_SYS_PGTABLE_SIZE \
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((CONFIG_SYS_PTL1_ENTRIES + \
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CONFIG_SYS_MEM_MAP_SIZE * CONFIG_SYS_PTL2_ENTRIES) * 8)
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#define CONFIG_SYS_TCR_EL1_IPS_BITS (5UL << 32)
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#define CONFIG_SYS_TCR_EL2_IPS_BITS (5 << 16)
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#define CONFIG_SYS_TCR_EL3_IPS_BITS (5 << 16)
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/* Link Definitions */
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#define CONFIG_SYS_TEXT_BASE 0x00500000
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
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/* Flat Device Tree Definitions */
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#define CONFIG_OF_LIBFDT
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/* SMP Spin Table Definitions */
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#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
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/* Generic Timer Definitions */
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#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
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#define CONFIG_SYS_MEMTEST_START MEM_BASE
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#define CONFIG_SYS_MEMTEST_END (MEM_BASE + PHYS_SDRAM_1_SIZE)
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
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/* PL011 Serial Configuration */
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#define CONFIG_PL01X_SERIAL
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#define CONFIG_PL011_CLOCK 24000000
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#define CONFIG_CONS_INDEX 1
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/* Generic Interrupt Controller Definitions */
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#define GICD_BASE (0x801000000000)
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#define GICR_BASE (0x801000002000)
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#define CONFIG_SYS_SERIAL0 0x87e024000000
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#define CONFIG_SYS_SERIAL1 0x87e025000000
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#define CONFIG_BAUDRATE 115200
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/* Command line configuration */
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#define CONFIG_MENU
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/* BOOTP options */
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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#define CONFIG_BOOTP_PXE
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#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LOAD_ADDR (MEM_BASE)
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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/* Initial environment variables */
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#define UBOOT_IMG_HEAD_SIZE 0x40
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/* C80000 - 0x40 */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"kernel_addr=08007ffc0\0" \
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"fdt_addr=0x94C00000\0" \
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"fdt_high=0x9fffffff\0"
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#define CONFIG_BOOTARGS \
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"console=ttyAMA0,115200n8 " \
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"earlycon=pl011,0x87e024000000 " \
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"debug maxcpus=48 rootwait rw "\
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"root=/dev/sda2 coherent_pool=16M"
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#define CONFIG_BOOTDELAY 5
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/* Do not preserve environment */
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#define CONFIG_ENV_IS_NOWHERE 1
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#define CONFIG_ENV_SIZE 0x1000
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING 1
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#define CONFIG_SYS_MAXARGS 64 /* max command args */
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#define CONFIG_NO_RELOCATION 1
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#define CONFIG_LIB_RAND
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#define PLL_REF_CLK 50000000 /* 50 MHz */
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#define NS_PER_REF_CLK_TICK (1000000000/PLL_REF_CLK)
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#endif /* __THUNDERX_88XX_H__ */
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