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ppc4xx: Remove remnants from ocotea, taishan, ebony and taihu 

The removal of some PPC4xx boards did not catch all references to
these boards. This patch now removes all remnants still left.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefan Roese <sr@denx.de>
utp
Stefan Roese 2015-10-27 12:48:15 +01:00
parent fa8883a1e3
commit 7514037bcd
1 changed files with 0 additions and 23 deletions
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23
arch/powerpc/cpu/ppc4xx/start.S
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@ -1795,34 +1795,11 @@ ppc405ep_init:
..no_pllset:
#endif /* CONFIG_BUBINGA */
#ifdef CONFIG_TAIHU
mfdcr r4, CPC0_BOOT
andi. r5, r4, CPC0_BOOT_SEP@l
bne strap_1 /* serial eeprom present */
addis r5,0,CPLD_REG0_ADDR@h
ori r5,r5,CPLD_REG0_ADDR@l
andi. r5, r5, 0x10
bne _pci_66mhz
#endif /* CONFIG_TAIHU */
addis r3,0,PLLMR0_DEFAULT@h /* PLLMR0 default value */
ori r3,r3,PLLMR0_DEFAULT@l /* */
addis r4,0,PLLMR1_DEFAULT@h /* PLLMR1 default value */
ori r4,r4,PLLMR1_DEFAULT@l /* */
#ifdef CONFIG_TAIHU
b 1f
_pci_66mhz:
addis r3,0,PLLMR0_DEFAULT_PCI66@h
ori r3,r3,PLLMR0_DEFAULT_PCI66@l
addis r4,0,PLLMR1_DEFAULT_PCI66@h
ori r4,r4,PLLMR1_DEFAULT_PCI66@l
b 1f
strap_1:
mfdcr r3, CPC0_PLLMR0
mfdcr r4, CPC0_PLLMR1
#endif /* CONFIG_TAIHU */
1:
b pll_write /* Write the CPC0_PLLMR with new value */