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powerpc/usb:Differentiate USB controller base address 

Introduce different macros for storing addresses of multiple
USB controllers. This is required for successful initialization
and usage of multiple USB controllers inside u-boot

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
utp
ramneek mehresh 2013-09-12 16:35:49 +05:30 committed by York Sun
parent f1810d851c
commit 77354e9d50
7 changed files with 46 additions and 21 deletions
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2
arch/powerpc/cpu/mpc83xx/cpu_init.c
View File

@ -315,7 +315,7 @@ void cpu_init_f (volatile immap_t * im)
#endif
#if defined(CONFIG_USB_EHCI_FSL) && defined(CONFIG_MPC831x)
uint32_t temp;
struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
/* Configure interface. */
setbits_be32(&ehci->control, REFSEL_16MHZ | UTMI_PHY_EN);

6
arch/powerpc/include/asm/immap_512x.h
View File

@ -1255,9 +1255,9 @@ static inline u32 get_pata_base (void)
}
#endif /* __ASSEMBLY__ */
#define CONFIG_SYS_MPC512x_USB_OFFSET 0x4000
#define CONFIG_SYS_MPC512x_USB_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC512x_USB_OFFSET)
#define CONFIG_SYS_MPC512x_USB1_OFFSET 0x4000
#define CONFIG_SYS_MPC512x_USB1_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC512x_USB1_OFFSET)
#define IIM_BASE_ADDR (CONFIG_SYS_IMMR + offsetof(immap_t, iim))

18
arch/powerpc/include/asm/immap_83xx.h
View File

@ -764,9 +764,11 @@ typedef struct immap {
} immap_t;
#ifdef CONFIG_HAS_FSL_MPH_USB
#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x22000 /* use the MPH controller */
#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0x22000 /* use the MPH controller */
#define CONFIG_SYS_MPC83xx_USB2_OFFSET 0
#else
#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x23000 /* use the DR controller */
#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0
#define CONFIG_SYS_MPC83xx_USB2_OFFSET 0x23000 /* use the DR controller */
#endif
#elif defined(CONFIG_MPC8313)
@ -1031,11 +1033,15 @@ typedef struct immap {
#define CONFIG_SYS_MPC83xx_ESDHC_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_ESDHC_OFFSET)
#ifndef CONFIG_SYS_MPC83xx_USB_OFFSET
#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x23000
#ifndef CONFIG_SYS_MPC83xx_USB1_OFFSET
#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0x23000
#endif
#define CONFIG_SYS_MPC83xx_USB1_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB1_OFFSET)
#if defined(CONFIG_MPC834x)
#define CONFIG_SYS_MPC83xx_USB2_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB2_OFFSET)
#endif
#define CONFIG_SYS_MPC83xx_USB_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB_OFFSET)
#define CONFIG_SYS_LBC_ADDR (&((immap_t *)CONFIG_SYS_IMMR)->im_lbc)
#define CONFIG_SYS_TSEC1_OFFSET 0x24000

9
arch/powerpc/include/asm/immap_85xx.h
View File

@ -2932,7 +2932,6 @@ struct ccsr_pman {
#endif
#define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x210000
#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x211000
#define CONFIG_SYS_MPC85xx_USB_OFFSET CONFIG_SYS_MPC85xx_USB1_OFFSET
#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0x214000
#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0x214100
#define CONFIG_SYS_MPC85xx_SATA1_OFFSET 0x220000
@ -2985,7 +2984,7 @@ struct ccsr_pman {
#define CONFIG_SYS_MPC85xx_IFC_OFFSET 0x1e000
#define CONFIG_SYS_MPC85xx_L2_OFFSET 0x20000
#define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000
#define CONFIG_SYS_MPC85xx_USB_OFFSET 0x22000
#define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000
#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000
#ifdef CONFIG_TSECV2
#define CONFIG_SYS_TSEC1_OFFSET 0xB0000
@ -3086,8 +3085,10 @@ struct ccsr_pman {
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)
#define CONFIG_SYS_FSL_CORENET_SERDES2_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET)
#define CONFIG_SYS_MPC85xx_USB_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
#define CONFIG_SYS_MPC85xx_USB1_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB1_OFFSET)
#define CONFIG_SYS_MPC85xx_USB2_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB2_OFFSET)
#define CONFIG_SYS_MPC85xx_USB1_PHY_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET)
#define CONFIG_SYS_MPC85xx_USB2_PHY_ADDR \

15
drivers/usb/host/ehci-fsl.c
View File

@ -38,7 +38,7 @@ static int usb_phy_clk_valid(struct usb_ehci *ehci)
int ehci_hcd_init(int index, enum usb_init_type init,
struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
struct usb_ehci *ehci;
struct usb_ehci *ehci = NULL;
const char *phy_type = NULL;
size_t len;
#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
@ -47,7 +47,18 @@ int ehci_hcd_init(int index, enum usb_init_type init,
usb_phy[0] = '\0';
#endif
ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
switch (index) {
case 0:
ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
break;
case 1:
ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB2_ADDR;
break;
default:
printf("ERROR: wrong controller index!!\n");
break;
};
*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));

4
drivers/usb/host/ehci-mpc512x.c
View File

@ -38,7 +38,7 @@ int ehci_hcd_init(int index, enum usb_init_type init,
volatile struct usb_ehci *ehci;
/* Hook the memory mapped registers for EHCI-Controller */
ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
*hccr = (struct ehci_hccr *)((uint32_t)&(ehci->caplength));
*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
@ -82,7 +82,7 @@ int ehci_hcd_stop(int index)
int exit_status = 0;
/* Reset the USB controller */
ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
exit_status = reset_usb_controller(ehci);
return exit_status;

13
include/usb/ehci-fsl.h
View File

@ -149,11 +149,18 @@
#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
#if defined(CONFIG_MPC83xx)
#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC83xx_USB_ADDR
#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC83xx_USB1_ADDR
#if defined(CONFIG_MPC834x)
#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC83xx_USB2_ADDR
#else
#define CONFIG_SYS_FSL_USB2_ADDR 0
#endif
#elif defined(CONFIG_MPC85xx)
#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC85xx_USB_ADDR
#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC85xx_USB1_ADDR
#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC85xx_USB2_ADDR
#elif defined(CONFIG_MPC512X)
#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR
#define CONFIG_SYS_FSL_USB2_ADDR 0
#endif
/*