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arm, am335x: make mpu pll config configurable 

upcoming support for siemens boards switches mpu pll clk in board
code. So make this configurable.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
utp
Heiko Schocher 2013-06-04 11:01:06 +02:00 committed by Tom Rini
parent 49f7836500
commit 7b9c5d0bfd
2 changed files with 8 additions and 2 deletions
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9
arch/arm/cpu/armv7/am33xx/clock_am33xx.c
View File

@ -246,7 +246,7 @@ static void enable_per_clocks(void)
; ;
} }
static void mpu_pll_config(void) void mpu_pll_config_val(int mpull_m)
{ {
u32 clkmode, clksel, div_m2; u32 clkmode, clksel, div_m2;
@ -260,7 +260,7 @@ static void mpu_pll_config(void)
; ;
clksel = clksel & (~CLK_SEL_MASK); clksel = clksel & (~CLK_SEL_MASK);
clksel = clksel | ((MPUPLL_M << CLK_SEL_SHIFT) | MPUPLL_N); clksel = clksel | ((mpull_m << CLK_SEL_SHIFT) | MPUPLL_N);
writel(clksel, &cmwkup->clkseldpllmpu); writel(clksel, &cmwkup->clkseldpllmpu);
div_m2 = div_m2 & ~CLK_DIV_MASK; div_m2 = div_m2 & ~CLK_DIV_MASK;
@ -274,6 +274,11 @@ static void mpu_pll_config(void)
; ;
} }
static void mpu_pll_config(void)
{
mpu_pll_config_val(CONFIG_SYS_MPUCLK);
}
static void core_pll_config(void) static void core_pll_config(void)
{ {
u32 clkmode, clksel, div_m4, div_m5, div_m6; u32 clkmode, clksel, div_m4, div_m5, div_m6;

1
arch/arm/include/asm/arch-am33xx/sys_proto.h
View File

@ -32,6 +32,7 @@ extern struct ctrl_stat *cstat;
u32 get_device_type(void); u32 get_device_type(void);
void save_omap_boot_params(void); void save_omap_boot_params(void);
void setup_clocks_for_console(void); void setup_clocks_for_console(void);
void mpu_pll_config_val(int mpull_m);
void ddr_pll_config(unsigned int ddrpll_M); void ddr_pll_config(unsigned int ddrpll_M);
void sdelay(unsigned long); void sdelay(unsigned long);