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remarkable-uboot
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Merge branch 'master' of git://git.denx.de/u-boot-usb

utp
Tom Rini 2016-04-10 19:55:08 -04:00
parent e16e137c37 192eab9357
commit 7e8f270292
22 changed files with 570 additions and 224 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Makefile
View File

@ -648,6 +648,7 @@ libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/
libs-$(CONFIG_ALTERA_SDRAM) += drivers/ddr/altera/
libs-y += drivers/serial/
libs-y += drivers/usb/dwc3/
libs-y += drivers/usb/common/
libs-y += drivers/usb/emul/
libs-y += drivers/usb/eth/
libs-y += drivers/usb/gadget/

7
arch/arm/include/asm/io.h
View File

@ -284,6 +284,13 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
#define insw_p(port,to,len) insw(port,to,len)
#define insl_p(port,to,len) insl(port,to,len)
#define writesl(a, d, s) __raw_writesl((unsigned long)a, d, s)
#define readsl(a, d, s) __raw_readsl((unsigned long)a, d, s)
#define writesw(a, d, s) __raw_writesw((unsigned long)a, d, s)
#define readsw(a, d, s) __raw_readsw((unsigned long)a, d, s)
#define writesb(a, d, s) __raw_writesb((unsigned long)a, d, s)
#define readsb(a, d, s) __raw_readsb((unsigned long)a, d, s)
/*
* ioremap and friends.
*

12
arch/mips/dts/pic32mzda.dtsi
View File

@ -171,4 +171,16 @@
#address-cells = <1>;
#size-cells = <0>;
};
usb: musb@1f8e3000 {
compatible = "microchip,pic32mzda-usb";
reg = <0x1f8e3000 0x1000>,
<0x1f884000 0x1000>;
reg-names = "mc", "control";
interrupts = <132 IRQ_TYPE_EDGE_RISING>,
<133 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock PB5CLK>;
clock-names = "usb_clk";
status = "disabled";
};
};

4
arch/mips/dts/pic32mzda_sk.dts
View File

@ -52,4 +52,8 @@
ethernet_phy: lan8740_phy@0 {
reg = <0>;
};
};
&usb {
status = "okay";
};

10
cmd/usb.c
View File

@ -15,6 +15,7 @@
#include <command.h>
#include <console.h>
#include <dm.h>
#include <dm/uclass-internal.h>
#include <memalign.h>
#include <asm/byteorder.h>
#include <asm/unaligned.h>
@ -442,12 +443,15 @@ void usb_show_tree(void)
#ifdef CONFIG_DM_USB
struct udevice *bus;
for (uclass_first_device(UCLASS_USB, &bus);
for (uclass_find_first_device(UCLASS_USB, &bus);
bus;
uclass_next_device(&bus)) {
uclass_find_next_device(&bus)) {
struct usb_device *udev;
struct udevice *dev;
if (!device_active(bus))
continue;
device_find_first_child(bus, &dev);
if (dev && device_active(dev)) {
udev = dev_get_parent_priv(dev);
@ -541,7 +545,7 @@ static int do_usbboot(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
static int do_usb_stop_keyboard(int force)
{
#ifdef CONFIG_USB_KEYBOARD
#if !defined CONFIG_DM_USB && defined CONFIG_USB_KEYBOARD
if (usb_kbd_deregister(force) != 0) {
printf("USB not stopped: usbkbd still using USB\n");
return 1;

3
common/usb_kbd.c
View File

@ -566,7 +566,6 @@ int drv_usb_kbd_init(void)
/* No USB Keyboard found */
return -1;
}
#endif
/* Deregister the keyboard. */
int usb_kbd_deregister(int force)
@ -599,6 +598,8 @@ int usb_kbd_deregister(int force)
#endif
}
#endif
#ifdef CONFIG_DM_USB
static int usb_kbd_probe(struct udevice *dev)

6
configs/pic32mzdask_defconfig
View File

@ -14,6 +14,7 @@ CONFIG_LOOPW=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_MEMINFO=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_USB=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_RARP=y
@ -30,5 +31,10 @@ CONFIG_PIC32_ETH=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_FULL is not set
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_PIC32=y
CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_CMD_DHRYSTONE=y

8
drivers/mtd/nand/pxa3xx_nand.c
View File

@ -19,14 +19,6 @@
#include "pxa3xx_nand.h"
/* Some U-Boot compatibility macros */
#define writesl(a, d, s) __raw_writesl((unsigned long)a, d, s)
#define readsl(a, d, s) __raw_readsl((unsigned long)a, d, s)
#define writesw(a, d, s) __raw_writesw((unsigned long)a, d, s)
#define readsw(a, d, s) __raw_readsw((unsigned long)a, d, s)
#define writesb(a, d, s) __raw_writesb((unsigned long)a, d, s)
#define readsb(a, d, s) __raw_readsb((unsigned long)a, d, s)
#define TIMEOUT_DRAIN_FIFO 5 /* in ms */
#define CHIP_DELAY_TIMEOUT 200
#define NAND_STOP_DELAY 40

7
drivers/usb/common/Makefile 100644
View File

@ -0,0 +1,7 @@
# (C) Copyright 2016 Freescale Semiconductor, Inc.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-$(CONFIG_USB_EHCI_FSL) += fsl-dt-fixup.o
obj-$(CONFIG_USB_XHCI_FSL) += fsl-dt-fixup.o

202
drivers/usb/common/fsl-dt-fixup.c 100644
View File

@ -0,0 +1,202 @@
/*
* (C) Copyright 2009, 2011 Freescale Semiconductor, Inc.
*
* (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
*
* Author: Tor Krill tor@excito.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <usb.h>
#include <asm/io.h>
#include <hwconfig.h>
#include <fsl_usb.h>
#include <fdt_support.h>
#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#endif
static const char * const compat_usb_fsl[] = {
"fsl-usb2-mph",
"fsl-usb2-dr",
"snps,dwc3",
NULL
};
static int fdt_usb_get_node_type(void *blob, int start_offset,
int *node_offset, const char **node_type)
{
int i;
int ret = -ENOENT;
for (i = 0; compat_usb_fsl[i]; i++) {
*node_offset = fdt_node_offset_by_compatible
(blob, start_offset,
compat_usb_fsl[i]);
if (*node_offset >= 0) {
*node_type = compat_usb_fsl[i];
ret = 0;
break;
}
}
return ret;
}
static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
const char *phy_type, int start_offset)
{
const char *prop_mode = "dr_mode";
const char *prop_type = "phy_type";
const char *node_type = NULL;
int node_offset;
int err;
err = fdt_usb_get_node_type(blob, start_offset,
&node_offset, &node_type);
if (err < 0)
return err;
if (mode) {
err = fdt_setprop(blob, node_offset, prop_mode, mode,
strlen(mode) + 1);
if (err < 0)
printf("WARNING: could not set %s for %s: %s.\n",
prop_mode, node_type, fdt_strerror(err));
}
if (phy_type) {
err = fdt_setprop(blob, node_offset, prop_type, phy_type,
strlen(phy_type) + 1);
if (err < 0)
printf("WARNING: could not set %s for %s: %s.\n",
prop_type, node_type, fdt_strerror(err));
}
return node_offset;
}
static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
int start_offset)
{
int node_offset, err;
const char *node_type = NULL;
err = fdt_usb_get_node_type(blob, start_offset,
&node_offset, &node_type);
if (err < 0)
return err;
err = fdt_setprop(blob, node_offset, prop_erratum, NULL, 0);
if (err < 0) {
printf("ERROR: could not set %s for %s: %s.\n",
prop_erratum, node_type, fdt_strerror(err));
}
return node_offset;
}
void fdt_fixup_dr_usb(void *blob, bd_t *bd)
{
static const char * const modes[] = { "host", "peripheral", "otg" };
static const char * const phys[] = { "ulpi", "utmi", "utmi_dual" };
int usb_erratum_a006261_off = -1;
int usb_erratum_a007075_off = -1;
int usb_erratum_a007792_off = -1;
int usb_erratum_a005697_off = -1;
int usb_mode_off = -1;
int usb_phy_off = -1;
char str[5];
int i, j;
for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
const char *dr_mode_type = NULL;
const char *dr_phy_type = NULL;
int mode_idx = -1, phy_idx = -1;
snprintf(str, 5, "%s%d", "usb", i);
if (hwconfig(str)) {
for (j = 0; j < ARRAY_SIZE(modes); j++) {
if (hwconfig_subarg_cmp(str, "dr_mode",
modes[j])) {
mode_idx = j;
break;
}
}
for (j = 0; j < ARRAY_SIZE(phys); j++) {
if (hwconfig_subarg_cmp(str, "phy_type",
phys[j])) {
phy_idx = j;
break;
}
}
if (mode_idx < 0 && phy_idx < 0) {
printf("WARNING: invalid phy or mode\n");
return;
}
if (mode_idx > -1)
dr_mode_type = modes[mode_idx];
if (phy_idx > -1)
dr_phy_type = phys[phy_idx];
}
if (has_dual_phy())
dr_phy_type = phys[2];
usb_mode_off = fdt_fixup_usb_mode_phy_type(blob,
dr_mode_type, NULL,
usb_mode_off);
if (usb_mode_off < 0)
return;
usb_phy_off = fdt_fixup_usb_mode_phy_type(blob,
NULL, dr_phy_type,
usb_phy_off);
if (usb_phy_off < 0)
return;
if (has_erratum_a006261()) {
usb_erratum_a006261_off = fdt_fixup_usb_erratum
(blob,
"fsl,usb-erratum-a006261",
usb_erratum_a006261_off);
if (usb_erratum_a006261_off < 0)
return;
}
if (has_erratum_a007075()) {
usb_erratum_a007075_off = fdt_fixup_usb_erratum
(blob,
"fsl,usb-erratum-a007075",
usb_erratum_a007075_off);
if (usb_erratum_a007075_off < 0)
return;
}
if (has_erratum_a007792()) {
usb_erratum_a007792_off = fdt_fixup_usb_erratum
(blob,
"fsl,usb-erratum-a007792",
usb_erratum_a007792_off);
if (usb_erratum_a007792_off < 0)
return;
}
if (has_erratum_a005697()) {
usb_erratum_a005697_off = fdt_fixup_usb_erratum
(blob,
"fsl,usb-erratum-a005697",
usb_erratum_a005697_off);
if (usb_erratum_a005697_off < 0)
return;
}
}
}

4
drivers/usb/gadget/bcm_udc_otg_phy.c
View File

@ -8,12 +8,16 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/sysmap.h>
#include <asm/kona-common/clk.h>
#include "dwc2_udc_otg_priv.h"
#include "bcm_udc_otg.h"
void otg_phy_init(struct dwc2_udc *dev)
{
/* turn on the USB OTG clocks */
clk_usb_otg_enable((void *)HSOTG_BASE_ADDR);
/* set Phy to driving mode */
wfld_clear(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET,
HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK);

195
drivers/usb/host/ehci-fsl.c
View File

@ -173,198 +173,3 @@ static void set_txfifothresh(struct usb_ehci *ehci, u32 txfifo_thresh)
cmd |= TXFIFO_THRESH(txfifo_thresh);
ehci_writel(&ehci->txfilltuning, cmd);
}
#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
const char *phy_type, int start_offset)
{
const char *compat_dr = "fsl-usb2-dr";
const char *compat_mph = "fsl-usb2-mph";
const char *prop_mode = "dr_mode";
const char *prop_type = "phy_type";
const char *node_type = NULL;
int node_offset;
int err;
node_offset = fdt_node_offset_by_compatible(blob,
start_offset, compat_mph);
if (node_offset < 0) {
node_offset = fdt_node_offset_by_compatible(blob,
start_offset,
compat_dr);
if (node_offset < 0) {
printf("WARNING: could not find compatible node: %s",
fdt_strerror(node_offset));
return -1;
}
node_type = compat_dr;
} else {
node_type = compat_mph;
}
if (mode) {
err = fdt_setprop(blob, node_offset, prop_mode, mode,
strlen(mode) + 1);
if (err < 0)
printf("WARNING: could not set %s for %s: %s.\n",
prop_mode, node_type, fdt_strerror(err));
}
if (phy_type) {
err = fdt_setprop(blob, node_offset, prop_type, phy_type,
strlen(phy_type) + 1);
if (err < 0)
printf("WARNING: could not set %s for %s: %s.\n",
prop_type, node_type, fdt_strerror(err));
}
return node_offset;
}
static const char *fdt_usb_get_node_type(void *blob, int start_offset,
int *node_offset)
{
const char *compat_dr = "fsl-usb2-dr";
const char *compat_mph = "fsl-usb2-mph";
const char *node_type = NULL;
*node_offset = fdt_node_offset_by_compatible(blob, start_offset,
compat_mph);
if (*node_offset < 0) {
*node_offset = fdt_node_offset_by_compatible(blob,
start_offset,
compat_dr);
if (*node_offset < 0) {
printf("ERROR: could not find compatible node: %s\n",
fdt_strerror(*node_offset));
} else {
node_type = compat_dr;
}
} else {
node_type = compat_mph;
}
return node_type;
}
static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
int start_offset)
{
int node_offset, err;
const char *node_type = NULL;
node_type = fdt_usb_get_node_type(blob, start_offset, &node_offset);
if (!node_type)
return -1;
err = fdt_setprop(blob, node_offset, prop_erratum, NULL, 0);
if (err < 0) {
printf("ERROR: could not set %s for %s: %s.\n",
prop_erratum, node_type, fdt_strerror(err));
}
return node_offset;
}
void fdt_fixup_dr_usb(void *blob, bd_t *bd)
{
static const char * const modes[] = { "host", "peripheral", "otg" };
static const char * const phys[] = { "ulpi", "utmi", "utmi_dual" };
int usb_erratum_a006261_off = -1;
int usb_erratum_a007075_off = -1;
int usb_erratum_a007792_off = -1;
int usb_erratum_a005697_off = -1;
int usb_mode_off = -1;
int usb_phy_off = -1;
char str[5];
int i, j;
for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
const char *dr_mode_type = NULL;
const char *dr_phy_type = NULL;
int mode_idx = -1, phy_idx = -1;
snprintf(str, 5, "%s%d", "usb", i);
if (hwconfig(str)) {
for (j = 0; j < ARRAY_SIZE(modes); j++) {
if (hwconfig_subarg_cmp(str, "dr_mode",
modes[j])) {
mode_idx = j;
break;
}
}
for (j = 0; j < ARRAY_SIZE(phys); j++) {
if (hwconfig_subarg_cmp(str, "phy_type",
phys[j])) {
phy_idx = j;
break;
}
}
if (mode_idx < 0 && phy_idx < 0) {
printf("WARNING: invalid phy or mode\n");
return;
}
if (mode_idx > -1)
dr_mode_type = modes[mode_idx];
if (phy_idx > -1)
dr_phy_type = phys[phy_idx];
}
if (has_dual_phy())
dr_phy_type = phys[2];
usb_mode_off = fdt_fixup_usb_mode_phy_type(blob,
dr_mode_type, NULL,
usb_mode_off);
if (usb_mode_off < 0)
return;
usb_phy_off = fdt_fixup_usb_mode_phy_type(blob,
NULL, dr_phy_type,
usb_phy_off);
if (usb_phy_off < 0)
return;
if (has_erratum_a006261()) {
usb_erratum_a006261_off = fdt_fixup_usb_erratum
(blob,
"fsl,usb-erratum-a006261",
usb_erratum_a006261_off);
if (usb_erratum_a006261_off < 0)
return;
}
if (has_erratum_a007075()) {
usb_erratum_a007075_off = fdt_fixup_usb_erratum
(blob,
"fsl,usb-erratum-a007075",
usb_erratum_a007075_off);
if (usb_erratum_a007075_off < 0)
return;
}
if (has_erratum_a007792()) {
usb_erratum_a007792_off = fdt_fixup_usb_erratum
(blob,
"fsl,usb-erratum-a007792",
usb_erratum_a007792_off);
if (usb_erratum_a007792_off < 0)
return;
}
if (has_erratum_a005697()) {
usb_erratum_a005697_off = fdt_fixup_usb_erratum
(blob,
"fsl,usb-erratum-a005697",
usb_erratum_a005697_off);
if (usb_erratum_a005697_off < 0)
return;
}
}
}
#endif

4
drivers/usb/host/ehci-hcd.c
View File

@ -1615,8 +1615,8 @@ int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
if (ret)
goto err;
if (ops->init_after_reset) {
ret = ops->init_after_reset(ctrl);
if (ctrl->ops.init_after_reset) {
ret = ctrl->ops.init_after_reset(ctrl);
if (ret)
goto err;
}

7
drivers/usb/musb-new/Kconfig
View File

@ -15,6 +15,13 @@ config USB_MUSB_GADGET
if USB_MUSB_HOST || USB_MUSB_GADGET
config USB_MUSB_PIC32
bool "Enable Microchip PIC32 DRC USB controller"
depends on DM_USB && MACH_PIC32
help
Say y to enable PIC32 USB DRC controller support
if it is available on your Microchip PIC32 platform.
config USB_MUSB_SUNXI
bool "Enable sunxi OTG / DRC USB controller"
depends on ARCH_SUNXI

1
drivers/usb/musb-new/Makefile
View File

@ -10,6 +10,7 @@ obj-$(CONFIG_USB_MUSB_HOST) += musb_host.o musb_core.o musb_uboot.o
obj-$(CONFIG_USB_MUSB_DSPS) += musb_dsps.o
obj-$(CONFIG_USB_MUSB_AM35X) += am35x.o
obj-$(CONFIG_USB_MUSB_OMAP2PLUS) += omap2430.o
obj-$(CONFIG_USB_MUSB_PIC32) += pic32.o
obj-$(CONFIG_USB_MUSB_SUNXI) += sunxi.o
ccflags-y := $(call cc-option,-Wno-unused-variable) \

7
drivers/usb/musb-new/linux-compat.h
View File

@ -13,13 +13,6 @@
printf(fmt, ##args); \
ret_warn; })
#define writesl(a, d, s) __raw_writesl((unsigned long)a, d, s)
#define readsl(a, d, s) __raw_readsl((unsigned long)a, d, s)
#define writesw(a, d, s) __raw_writesw((unsigned long)a, d, s)
#define readsw(a, d, s) __raw_readsw((unsigned long)a, d, s)
#define writesb(a, d, s) __raw_writesb((unsigned long)a, d, s)
#define readsb(a, d, s) __raw_readsb((unsigned long)a, d, s)
#define device_init_wakeup(dev, a) do {} while (0)
#define platform_data device_data

2
drivers/usb/musb-new/musb_core.c
View File

@ -259,7 +259,7 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
}
}
#if !defined(CONFIG_USB_MUSB_AM35X)
#if !defined(CONFIG_USB_MUSB_AM35X) && !defined(CONFIG_USB_MUSB_PIC32)
/*
* Unload an endpoint's FIFO
*/

4
drivers/usb/musb-new/musb_uboot.c
View File

@ -237,8 +237,10 @@ int musb_lowlevel_init(struct musb_host_data *host)
if (musb_readb(mbase, MUSB_DEVCTL) & MUSB_DEVCTL_HM)
break;
} while (get_timer(0) < timeout);
if (get_timer(0) >= timeout)
if (get_timer(0) >= timeout) {
musb_stop(host->host);
return -ENODEV;
}
_musb_reset_root_port(host, NULL);
host->host->is_active = 1;

288
drivers/usb/musb-new/pic32.c 100644
View File

@ -0,0 +1,288 @@
/*
* Microchip PIC32 MUSB "glue layer"
*
* Copyright (C) 2015, Microchip Technology Inc.
* Cristian Birsan <cristian.birsan@microchip.com>
* Purna Chandra Mandal <purna.mandal@microchip.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
* Based on the dsps "glue layer" code.
*/
#include <common.h>
#include <linux/usb/musb.h>
#include "linux-compat.h"
#include "musb_core.h"
#include "musb_uboot.h"
DECLARE_GLOBAL_DATA_PTR;
#define PIC32_TX_EP_MASK 0x0f /* EP0 + 7 Tx EPs */
#define PIC32_RX_EP_MASK 0x0e /* 7 Rx EPs */
#define MUSB_SOFTRST 0x7f
#define MUSB_SOFTRST_NRST BIT(0)
#define MUSB_SOFTRST_NRSTX BIT(1)
#define USBCRCON 0
#define USBCRCON_USBWKUPEN BIT(0) /* Enable Wakeup Interrupt */
#define USBCRCON_USBRIE BIT(1) /* Enable Remote resume Interrupt */
#define USBCRCON_USBIE BIT(2) /* Enable USB General interrupt */
#define USBCRCON_SENDMONEN BIT(3) /* Enable Session End VBUS monitoring */
#define USBCRCON_BSVALMONEN BIT(4) /* Enable B-Device VBUS monitoring */
#define USBCRCON_ASVALMONEN BIT(5) /* Enable A-Device VBUS monitoring */
#define USBCRCON_VBUSMONEN BIT(6) /* Enable VBUS monitoring */
#define USBCRCON_PHYIDEN BIT(7) /* PHY ID monitoring enable */
#define USBCRCON_USBIDVAL BIT(8) /* USB ID value */
#define USBCRCON_USBIDOVEN BIT(9) /* USB ID override enable */
#define USBCRCON_USBWK BIT(24) /* USB Wakeup Status */
#define USBCRCON_USBRF BIT(25) /* USB Resume Status */
#define USBCRCON_USBIF BIT(26) /* USB General Interrupt Status */
/* PIC32 controller data */
struct pic32_musb_data {
struct musb_host_data mdata;
struct device dev;
void __iomem *musb_glue;
};
#define to_pic32_musb_data(d) \
container_of(d, struct pic32_musb_data, dev)
static void pic32_musb_disable(struct musb *musb)
{
/* no way to shut the controller */
}
static int pic32_musb_enable(struct musb *musb)
{
/* soft reset by NRSTx */
musb_writeb(musb->mregs, MUSB_SOFTRST, MUSB_SOFTRST_NRSTX);
/* set mode */
musb_platform_set_mode(musb, musb->board_mode);
return 0;
}
static irqreturn_t pic32_interrupt(int irq, void *hci)
{
struct musb *musb = hci;
irqreturn_t ret = IRQ_NONE;
u32 epintr, usbintr;
/* ack usb core interrupts */
musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
if (musb->int_usb)
musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
/* ack endpoint interrupts */
musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX) & PIC32_RX_EP_MASK;
if (musb->int_rx)
musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX) & PIC32_TX_EP_MASK;
if (musb->int_tx)
musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
/* drop spurious RX and TX if device is disconnected */
if (musb->int_usb & MUSB_INTR_DISCONNECT) {
musb->int_tx = 0;
musb->int_rx = 0;
}
if (musb->int_tx || musb->int_rx || musb->int_usb)
ret = musb_interrupt(musb);
return ret;
}
static int pic32_musb_set_mode(struct musb *musb, u8 mode)
{
struct device *dev = musb->controller;
struct pic32_musb_data *pdata = to_pic32_musb_data(dev);
switch (mode) {
case MUSB_HOST:
clrsetbits_le32(pdata->musb_glue + USBCRCON,
USBCRCON_USBIDVAL, USBCRCON_USBIDOVEN);
break;
case MUSB_PERIPHERAL:
setbits_le32(pdata->musb_glue + USBCRCON,
USBCRCON_USBIDVAL | USBCRCON_USBIDOVEN);
break;
case MUSB_OTG:
dev_err(dev, "support for OTG is unimplemented\n");
break;
default:
dev_err(dev, "unsupported mode %d\n", mode);
return -EINVAL;
}
return 0;
}
static int pic32_musb_init(struct musb *musb)
{
struct pic32_musb_data *pdata = to_pic32_musb_data(musb->controller);
u32 ctrl, hwvers;
u8 power;
/* Returns zero if not clocked */
hwvers = musb_read_hwvers(musb->mregs);
if (!hwvers)
return -ENODEV;
/* Reset the musb */
power = musb_readb(musb->mregs, MUSB_POWER);
power = power | MUSB_POWER_RESET;
musb_writeb(musb->mregs, MUSB_POWER, power);
mdelay(100);
/* Start the on-chip PHY and its PLL. */
power = power & ~MUSB_POWER_RESET;
musb_writeb(musb->mregs, MUSB_POWER, power);
musb->isr = pic32_interrupt;
ctrl = USBCRCON_USBIF | USBCRCON_USBRF |
USBCRCON_USBWK | USBCRCON_USBIDOVEN |
USBCRCON_PHYIDEN | USBCRCON_USBIE |
USBCRCON_USBRIE | USBCRCON_USBWKUPEN |
USBCRCON_VBUSMONEN;
writel(ctrl, pdata->musb_glue + USBCRCON);
return 0;
}
/* PIC32 supports only 32bit read operation */
void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
{
void __iomem *fifo = hw_ep->fifo;
u32 val, rem = len % 4;
/* USB stack ensures dst is always 32bit aligned. */
readsl(fifo, dst, len / 4);
if (rem) {
dst += len & ~0x03;
val = musb_readl(fifo, 0);
memcpy(dst, &val, rem);
}
}
const struct musb_platform_ops pic32_musb_ops = {
.init = pic32_musb_init,
.set_mode = pic32_musb_set_mode,
.disable = pic32_musb_disable,
.enable = pic32_musb_enable,
};
/* PIC32 default FIFO config - fits in 8KB */
static struct musb_fifo_cfg pic32_musb_fifo_config[] = {
{ .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
{ .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
{ .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
{ .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
{ .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
{ .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
{ .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
{ .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
{ .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
{ .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
{ .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 512, },
{ .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 512, },
{ .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, },
{ .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 512, },
};
static struct musb_hdrc_config pic32_musb_config = {
.fifo_cfg = pic32_musb_fifo_config,
.fifo_cfg_size = ARRAY_SIZE(pic32_musb_fifo_config),
.multipoint = 1,
.dyn_fifo = 1,
.num_eps = 8,
.ram_bits = 11,
};
/* PIC32 has one MUSB controller which can be host or gadget */
static struct musb_hdrc_platform_data pic32_musb_plat = {
.mode = MUSB_HOST,
.config = &pic32_musb_config,
.power = 250, /* 500mA */
.platform_ops = &pic32_musb_ops,
};
static int musb_usb_probe(struct udevice *dev)
{
struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
struct pic32_musb_data *pdata = dev_get_priv(dev);
struct musb_host_data *mdata = &pdata->mdata;
struct fdt_resource mc, glue;
void *fdt = (void *)gd->fdt_blob;
int node = dev->of_offset;
void __iomem *mregs;
int ret;
priv->desc_before_addr = true;
ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
"mc", &mc);
if (ret < 0) {
printf("pic32-musb: resource \"mc\" not found\n");
return ret;
}
ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
"control", &glue);
if (ret < 0) {
printf("pic32-musb: resource \"control\" not found\n");
return ret;
}
mregs = ioremap(mc.start, fdt_resource_size(&mc));
pdata->musb_glue = ioremap(glue.start, fdt_resource_size(&glue));
/* init controller */
#ifdef CONFIG_USB_MUSB_HOST
mdata->host = musb_init_controller(&pic32_musb_plat,
&pdata->dev, mregs);
if (!mdata->host)
return -EIO;
ret = musb_lowlevel_init(mdata);
#else
pic32_musb_plat.mode = MUSB_PERIPHERAL;
ret = musb_register(&pic32_musb_plat, &pdata->dev, mregs);
#endif
if (ret == 0)
printf("PIC32 MUSB OTG\n");
return ret;
}
static int musb_usb_remove(struct udevice *dev)
{
struct pic32_musb_data *pdata = dev_get_priv(dev);
musb_stop(pdata->mdata.host);
return 0;
}
static const struct udevice_id pic32_musb_ids[] = {
{ .compatible = "microchip,pic32mzda-usb" },
{ }
};
U_BOOT_DRIVER(usb_musb) = {
.name = "pic32-musb",
.id = UCLASS_USB,
.of_match = pic32_musb_ids,
.probe = musb_usb_probe,
.remove = musb_usb_remove,
#ifdef CONFIG_USB_MUSB_HOST
.ops = &musb_usb_ops,
#endif
.platdata_auto_alloc_size = sizeof(struct usb_platdata),
.priv_auto_alloc_size = sizeof(struct pic32_musb_data),
};

11
drivers/usb/musb-new/sunxi.c
View File

@ -201,6 +201,7 @@ static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci)
/* musb_core does not call enable / disable in a balanced manner <sigh> */
static bool enabled = false;
static struct musb *sunxi_musb;
static int sunxi_musb_enable(struct musb *musb)
{
@ -320,13 +321,15 @@ int musb_usb_probe(struct udevice *dev)
priv->desc_before_addr = true;
if (!host->host) {
host->host = musb_init_controller(&musb_plat, NULL,
if (!sunxi_musb) {
sunxi_musb = musb_init_controller(&musb_plat, NULL,
(void *)SUNXI_USB0_BASE);
if (!host->host)
return -EIO;
}
host->host = sunxi_musb;
if (!host->host)
return -EIO;
ret = musb_lowlevel_init(host);
if (ret == 0)
printf("MUSB OTG\n");

7
include/configs/pic32mzdask.h
View File

@ -105,6 +105,12 @@
#define CONFIG_GENERIC_MMC
#define CONFIG_CMD_MMC
/*--------------------------------------------------
* USB Configuration
*/
#define CONFIG_USB_MUSB_PIO_ONLY
#define CONFIG_SYS_CACHELINE_SIZE 16
/*-----------------------------------------------------------------------
* File System Configuration
*/
@ -153,6 +159,7 @@
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(USB, usb, 0) \
func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h>

4
include/fdt_support.h
View File

@ -113,11 +113,11 @@ void fdt_fixup_qe_firmware(void *fdt);
*/
int fdt_fixup_display(void *blob, const char *path, const char *display);
#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
#if defined(CONFIG_USB_EHCI_FSL) || defined(CONFIG_USB_XHCI_FSL)
void fdt_fixup_dr_usb(void *blob, bd_t *bd);
#else
static inline void fdt_fixup_dr_usb(void *blob, bd_t *bd) {}
#endif /* defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) */
#endif /* defined(CONFIG_USB_EHCI_FSL) || defined(CONFIG_USB_XHCI_FSL) */
#if defined(CONFIG_SYS_FSL_SEC_COMPAT)
void fdt_fixup_crypto_node(void *blob, int sec_rev);