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malta: setup PIIX4 interrupt route 

Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
be left disabled. Linux does not set up this routing but relies upon it
having been set up by the bootloader, reading back the IRQ lines which
the PIRQ[A:D] signals have been routed to.

This patch routes PIRQA & PIRQB to IRQ 10, and PIRQC & PIRQD to IRQ 11.
This matches the setup used by YAMON.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
utp
Paul Burton 2013-11-08 11:18:57 +00:00 committed by Daniel Schwierzeck
parent fba6f45cdc
commit 81f98bbd62
2 changed files with 19 additions and 0 deletions
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5
arch/mips/include/asm/malta.h
View File

@ -53,4 +53,9 @@
#define MALTA_REVISION_CORID_CORE_LV 1
#define MALTA_REVISION_CORID_CORE_FPGA6 14
#define PCI_CFG_PIIX4_PIRQRCA 0x60
#define PCI_CFG_PIIX4_PIRQRCB 0x61
#define PCI_CFG_PIIX4_PIRQRCC 0x62
#define PCI_CFG_PIIX4_PIRQRCD 0x63
#endif /* _MIPS_ASM_MALTA_H */

14
board/imgtec/malta/malta.c
View File

@ -7,6 +7,7 @@
#include <common.h>
#include <netdev.h>
#include <pci.h>
#include <pci_gt64120.h>
#include <pci_msc01.h>
#include <rtc.h>
@ -169,6 +170,8 @@ struct serial_device *default_serial_console(void)
void pci_init_board(void)
{
pci_dev_t bdf;
switch (malta_sys_con()) {
case SYSCON_GT64120:
set_io_port_base(CKSEG1ADDR(MALTA_GT_PCIIO_BASE));
@ -191,4 +194,15 @@ void pci_init_board(void)
0x00000000, MALTA_MSC01_PCIIO_SIZE);
break;
}
bdf = pci_find_device(PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_82371AB_0, 0);
if (bdf == -1)
panic("Failed to find PIIX4 PCI bridge\n");
/* setup PCI interrupt routing */
pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCA, 10);
pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCB, 10);
pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCC, 11);
pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCD, 11);
}