1
0
Fork 0

omap-common: SPL: Add CONFIG_SPL_DISPLAY_PRINT / spl_display_print()

Only omap4/5 currently have a meaningful set of display text and overo
had been adding a function to display nothing.  Change how this works to
be opt-in and only turned on for omap4/5 now.

Signed-off-by: Tom Rini <trini@ti.com>
utp
Tom Rini 2012-08-13 11:37:56 -07:00
parent 0da113e9fd
commit 861a86f460
9 changed files with 15 additions and 19 deletions

4
README
View File

@ -2597,6 +2597,10 @@ FIT uImage format:
CONFIG_SYS_SPL_MALLOC_SIZE
The size of the malloc pool used in SPL.
CONFIG_SPL_DISPLAY_PRINT
For ARM, enable an optional function to print more information
about the running system.
CONFIG_SPL_LIBCOMMON_SUPPORT
Support for common/libcommon.o in SPL binary

View File

@ -92,6 +92,11 @@ static void init_boot_params(void)
{
boot_params_ptr = (u32 *) &boot_params;
}
void spl_display_print(void)
{
omap_rev_string();
}
#endif
/*

View File

@ -219,10 +219,7 @@ void preloader_console_init(void)
printf("\nU-Boot SPL %s (%s - %s)\n", u_boot_rev, U_BOOT_DATE,
U_BOOT_TIME);
omap_rev_string();
}
void __weak omap_rev_string()
{
printf("Texas Instruments Revision detection unimplemented\n");
#ifdef CONFIG_SPL_DISPLAY_PRINT
spl_display_print();
#endif
}

View File

@ -42,7 +42,6 @@ void sr32(void *, u32, u32, u32);
u32 wait_on_value(u32, u32, void *, u32);
void sdelay(unsigned long);
void set_pl310_ctrl_reg(u32 val);
void omap_rev_string(void);
void setup_clocks_for_console(void);
void prcm_init(void);
void bypass_dpll(u32 *const base);

View File

@ -42,7 +42,6 @@ void set_muxconf_regs_non_essential(void);
void sr32(void *, u32, u32, u32);
u32 wait_on_value(u32, u32, void *, u32);
void sdelay(unsigned long);
void omap_rev_string(void);
void setup_clocks_for_console(void);
void prcm_init(void);
void bypass_dpll(u32 *const base);

View File

@ -94,9 +94,9 @@ u32 omap_boot_mode(void);
/* SPL common function s*/
void spl_parse_image_header(const struct image_header *header);
void omap_rev_string(void);
void spl_board_prepare_for_linux(void);
int spl_start_uboot(void);
void spl_display_print(void);
/* NAND SPL functions */
void spl_nand_load_image(void);

View File

@ -100,16 +100,6 @@ int board_init(void)
return 0;
}
/*
* Routine: omap_rev_string
* Description: For SPL builds output board rev
*/
#ifdef CONFIG_SPL_BUILD
void omap_rev_string(void)
{
}
#endif
/*
* Routine: get_board_revision
* Description: Returns the board revision

View File

@ -235,6 +235,7 @@
#define CONFIG_SPL_TEXT_BASE 0x40304350
#define CONFIG_SPL_MAX_SIZE (38 * 1024)
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
#define CONFIG_SPL_DISPLAY_PRINT
/*
* 64 bytes before this address should be set aside for u-boot.img's

View File

@ -232,6 +232,7 @@
#define CONFIG_SPL_TEXT_BASE 0x40300350
#define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
#define CONFIG_SPL_DISPLAY_PRINT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */