tegra: dts: Bring in GPIO bindings from linux
These files are taken from Linux 3.14. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>utp
Simon Glass
parent
184b1b7175
commit
8946034a31
|
|
@ -1,3 +1,6 @@
|
|||
#include <dt-bindings/gpio/tegra-gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
|
|
@ -46,17 +49,17 @@
|
|||
0 143 0x04>;
|
||||
};
|
||||
|
||||
gpio: gpio {
|
||||
gpio: gpio@6000d000 {
|
||||
compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
|
||||
reg = <0x6000d000 0x1000>;
|
||||
interrupts = <0 32 0x04
|
||||
0 33 0x04
|
||||
0 34 0x04
|
||||
0 35 0x04
|
||||
0 55 0x04
|
||||
0 87 0x04
|
||||
0 89 0x04
|
||||
0 125 0x04>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
#include <dt-bindings/gpio/tegra-gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
|
|
@ -49,14 +52,14 @@
|
|||
gpio: gpio@6000d000 {
|
||||
compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
|
||||
reg = <0x6000d000 0x1000>;
|
||||
interrupts = <0 32 0x04
|
||||
0 33 0x04
|
||||
0 34 0x04
|
||||
0 35 0x04
|
||||
0 55 0x04
|
||||
0 87 0x04
|
||||
0 89 0x04
|
||||
0 125 0x04>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
#include <dt-bindings/gpio/tegra-gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
|
|
@ -139,10 +142,18 @@
|
|||
|
||||
gpio: gpio@6000d000 {
|
||||
compatible = "nvidia,tegra20-gpio";
|
||||
reg = < 0x6000d000 0x1000 >;
|
||||
interrupts = < 64 65 66 67 87 119 121 >;
|
||||
reg = <0x6000d000 0x1000>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
pinmux: pinmux@70000000 {
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
#include <dt-bindings/gpio/tegra-gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
|
|
@ -47,17 +50,17 @@
|
|||
clocks = <&tegra_car 34>;
|
||||
};
|
||||
|
||||
gpio: gpio {
|
||||
gpio: gpio@6000d000 {
|
||||
compatible = "nvidia,tegra30-gpio";
|
||||
reg = <0x6000d000 0x1000>;
|
||||
interrupts = <0 32 0x04
|
||||
0 33 0x04
|
||||
0 34 0x04
|
||||
0 35 0x04
|
||||
0 55 0x04
|
||||
0 87 0x04
|
||||
0 89 0x04
|
||||
0 125 0x04>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,15 @@
|
|||
/*
|
||||
* This header provides constants for most GPIO bindings.
|
||||
*
|
||||
* Most GPIO bindings include a flags cell as part of the GPIO specifier.
|
||||
* In most cases, the format of the flags cell uses the standard values
|
||||
* defined in this header.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_GPIO_GPIO_H
|
||||
#define _DT_BINDINGS_GPIO_GPIO_H
|
||||
|
||||
#define GPIO_ACTIVE_HIGH 0
|
||||
#define GPIO_ACTIVE_LOW 1
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
* This header provides constants for binding nvidia,tegra*-gpio.
|
||||
*
|
||||
* The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
|
||||
* provide names for this.
|
||||
*
|
||||
* The second cell contains standard flag values specified in gpio.h.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_GPIO_TEGRA_GPIO_H
|
||||
#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
#define TEGRA_GPIO_BANK_ID_A 0
|
||||
#define TEGRA_GPIO_BANK_ID_B 1
|
||||
#define TEGRA_GPIO_BANK_ID_C 2
|
||||
#define TEGRA_GPIO_BANK_ID_D 3
|
||||
#define TEGRA_GPIO_BANK_ID_E 4
|
||||
#define TEGRA_GPIO_BANK_ID_F 5
|
||||
#define TEGRA_GPIO_BANK_ID_G 6
|
||||
#define TEGRA_GPIO_BANK_ID_H 7
|
||||
#define TEGRA_GPIO_BANK_ID_I 8
|
||||
#define TEGRA_GPIO_BANK_ID_J 9
|
||||
#define TEGRA_GPIO_BANK_ID_K 10
|
||||
#define TEGRA_GPIO_BANK_ID_L 11
|
||||
#define TEGRA_GPIO_BANK_ID_M 12
|
||||
#define TEGRA_GPIO_BANK_ID_N 13
|
||||
#define TEGRA_GPIO_BANK_ID_O 14
|
||||
#define TEGRA_GPIO_BANK_ID_P 15
|
||||
#define TEGRA_GPIO_BANK_ID_Q 16
|
||||
#define TEGRA_GPIO_BANK_ID_R 17
|
||||
#define TEGRA_GPIO_BANK_ID_S 18
|
||||
#define TEGRA_GPIO_BANK_ID_T 19
|
||||
#define TEGRA_GPIO_BANK_ID_U 20
|
||||
#define TEGRA_GPIO_BANK_ID_V 21
|
||||
#define TEGRA_GPIO_BANK_ID_W 22
|
||||
#define TEGRA_GPIO_BANK_ID_X 23
|
||||
#define TEGRA_GPIO_BANK_ID_Y 24
|
||||
#define TEGRA_GPIO_BANK_ID_Z 25
|
||||
#define TEGRA_GPIO_BANK_ID_AA 26
|
||||
#define TEGRA_GPIO_BANK_ID_BB 27
|
||||
#define TEGRA_GPIO_BANK_ID_CC 28
|
||||
#define TEGRA_GPIO_BANK_ID_DD 29
|
||||
#define TEGRA_GPIO_BANK_ID_EE 30
|
||||
#define TEGRA_GPIO_BANK_ID_FF 31
|
||||
|
||||
#define TEGRA_GPIO(bank, offset) \
|
||||
((TEGRA_GPIO_BANK_ID_##bank * 8) + offset)
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
/*
|
||||
* This header provides constants for the ARM GIC.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
|
||||
#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
|
||||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/* interrupt specific cell 0 */
|
||||
|
||||
#define GIC_SPI 0
|
||||
#define GIC_PPI 1
|
||||
|
||||
/*
|
||||
* Interrupt specifier cell 2.
|
||||
* The flaggs in irq.h are valid, plus those below.
|
||||
*/
|
||||
#define GIC_CPU_MASK_RAW(x) ((x) << 8)
|
||||
#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
/*
|
||||
* This header provides constants for most IRQ bindings.
|
||||
*
|
||||
* Most IRQ bindings include a flags cell as part of the IRQ specifier.
|
||||
* In most cases, the format of the flags cell uses the standard values
|
||||
* defined in this header.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
|
||||
#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
|
||||
|
||||
#define IRQ_TYPE_NONE 0
|
||||
#define IRQ_TYPE_EDGE_RISING 1
|
||||
#define IRQ_TYPE_EDGE_FALLING 2
|
||||
#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
|
||||
#define IRQ_TYPE_LEVEL_HIGH 4
|
||||
#define IRQ_TYPE_LEVEL_LOW 8
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue