Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
This commit is contained in:
commit
9809ccdd4c
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@ -74,7 +74,7 @@ struct liodn_id_table liodn_tbl[] = {
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int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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struct liodn_id_table fman1_liodn_tbl[] = {
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struct fman_liodn_id_table fman1_liodn_tbl[] = {
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SET_FMAN_RX_1G_LIODN(1, 0, 88),
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SET_FMAN_RX_1G_LIODN(1, 1, 89),
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SET_FMAN_RX_1G_LIODN(1, 2, 90),
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@ -57,6 +57,23 @@ static void set_liodn(struct liodn_id_table *tbl, int size)
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}
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}
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#ifdef CONFIG_SYS_DPAA_FMAN
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static void set_fman_liodn(struct fman_liodn_id_table *tbl, int size)
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{
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int i;
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for (i = 0; i < size; i++) {
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u32 liodn;
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if (tbl[i].num_ids == 2)
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liodn = (tbl[i].id[0] << 16) | tbl[i].id[1];
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else
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liodn = tbl[i].id[0];
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out_be32((volatile u32 *)(tbl[i].reg_offset), liodn);
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}
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}
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#endif
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static void setup_sec_liodn_base(void)
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{
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ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
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@ -76,7 +93,7 @@ static void setup_sec_liodn_base(void)
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#ifdef CONFIG_SYS_DPAA_FMAN
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static void setup_fman_liodn_base(enum fsl_dpaa_dev dev,
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struct liodn_id_table *tbl, int size)
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struct fman_liodn_id_table *tbl, int size)
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{
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int i;
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ccsr_fman_t *fm;
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@ -180,12 +197,12 @@ void set_liodns(void)
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/* setup FMAN block(s) liodn bases & offsets if we have one */
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#ifdef CONFIG_SYS_DPAA_FMAN
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set_liodn(fman1_liodn_tbl, fman1_liodn_tbl_sz);
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set_fman_liodn(fman1_liodn_tbl, fman1_liodn_tbl_sz);
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setup_fman_liodn_base(FSL_HW_PORTAL_FMAN1, fman1_liodn_tbl,
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fman1_liodn_tbl_sz);
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#if (CONFIG_SYS_NUM_FMAN == 2)
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set_liodn(fman2_liodn_tbl, fman2_liodn_tbl_sz);
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set_fman_liodn(fman2_liodn_tbl, fman2_liodn_tbl_sz);
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setup_fman_liodn_base(FSL_HW_PORTAL_FMAN2, fman2_liodn_tbl,
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fman2_liodn_tbl_sz);
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#endif
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@ -315,6 +332,43 @@ static void fdt_fixup_liodn_tbl(void *blob, struct liodn_id_table *tbl, int sz)
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}
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}
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#ifdef CONFIG_SYS_DPAA_FMAN
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static void fdt_fixup_liodn_tbl_fman(void *blob,
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struct fman_liodn_id_table *tbl,
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int sz)
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{
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int i;
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for (i = 0; i < sz; i++) {
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int off;
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if (tbl[i].compat == NULL)
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continue;
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/* Try the new compatible first.
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* If the node is missing, try the old.
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*/
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off = fdt_node_offset_by_compat_reg(blob,
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tbl[i].compat[0], tbl[i].compat_offset);
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if (off < 0)
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off = fdt_node_offset_by_compat_reg(blob,
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tbl[i].compat[1], tbl[i].compat_offset);
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if (off >= 0) {
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off = fdt_setprop(blob, off, "fsl,liodn",
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&tbl[i].id[0],
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sizeof(u32) * tbl[i].num_ids);
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if (off > 0)
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printf("WARNING unable to set fsl,liodn for FMan Port: %s\n",
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fdt_strerror(off));
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} else {
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debug("WARNING: could not set fsl,liodn for FMan Portport: %s.\n",
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fdt_strerror(off));
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}
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}
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}
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#endif
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void fdt_fixup_liodn(void *blob)
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{
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#ifdef CONFIG_SYS_SRIO
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@ -323,9 +377,9 @@ void fdt_fixup_liodn(void *blob)
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fdt_fixup_liodn_tbl(blob, liodn_tbl, liodn_tbl_sz);
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#ifdef CONFIG_SYS_DPAA_FMAN
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fdt_fixup_liodn_tbl(blob, fman1_liodn_tbl, fman1_liodn_tbl_sz);
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fdt_fixup_liodn_tbl_fman(blob, fman1_liodn_tbl, fman1_liodn_tbl_sz);
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#if (CONFIG_SYS_NUM_FMAN == 2)
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fdt_fixup_liodn_tbl(blob, fman2_liodn_tbl, fman2_liodn_tbl_sz);
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fdt_fixup_liodn_tbl_fman(blob, fman2_liodn_tbl, fman2_liodn_tbl_sz);
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#endif
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#endif
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fdt_fixup_liodn_tbl(blob, sec_liodn_tbl, sec_liodn_tbl_sz);
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@ -61,7 +61,7 @@ struct liodn_id_table liodn_tbl[] = {
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int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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struct liodn_id_table fman1_liodn_tbl[] = {
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struct fman_liodn_id_table fman1_liodn_tbl[] = {
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SET_FMAN_RX_1G_LIODN(1, 0, 10),
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SET_FMAN_RX_1G_LIODN(1, 1, 11),
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SET_FMAN_RX_1G_LIODN(1, 2, 12),
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@ -62,7 +62,7 @@ struct liodn_id_table liodn_tbl[] = {
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int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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struct liodn_id_table fman1_liodn_tbl[] = {
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struct fman_liodn_id_table fman1_liodn_tbl[] = {
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SET_FMAN_RX_1G_LIODN(1, 0, 10),
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SET_FMAN_RX_1G_LIODN(1, 1, 11),
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SET_FMAN_RX_1G_LIODN(1, 2, 12),
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@ -54,7 +54,7 @@ struct liodn_id_table liodn_tbl[] = {
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int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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struct liodn_id_table fman1_liodn_tbl[] = {
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struct fman_liodn_id_table fman1_liodn_tbl[] = {
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SET_FMAN_RX_1G_LIODN(1, 0, 11),
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SET_FMAN_RX_1G_LIODN(1, 1, 12),
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SET_FMAN_RX_1G_LIODN(1, 2, 13),
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@ -64,7 +64,7 @@ struct liodn_id_table fman1_liodn_tbl[] = {
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int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
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#if (CONFIG_SYS_NUM_FMAN == 2)
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struct liodn_id_table fman2_liodn_tbl[] = {
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struct fman_liodn_id_table fman2_liodn_tbl[] = {
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SET_FMAN_RX_1G_LIODN(2, 0, 16),
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SET_FMAN_RX_1G_LIODN(2, 1, 17),
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SET_FMAN_RX_1G_LIODN(2, 2, 18),
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@ -62,7 +62,7 @@ struct liodn_id_table liodn_tbl[] = {
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int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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struct liodn_id_table fman1_liodn_tbl[] = {
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struct fman_liodn_id_table fman1_liodn_tbl[] = {
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SET_FMAN_RX_1G_LIODN(1, 0, 10),
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SET_FMAN_RX_1G_LIODN(1, 1, 11),
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SET_FMAN_RX_1G_LIODN(1, 2, 12),
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@ -48,7 +48,7 @@ struct liodn_id_table liodn_tbl[] = {
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int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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struct liodn_id_table fman1_liodn_tbl[] = {
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struct fman_liodn_id_table fman1_liodn_tbl[] = {
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SET_FMAN_RX_1G_LIODN(1, 0, 11),
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SET_FMAN_RX_1G_LIODN(1, 1, 12),
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SET_FMAN_RX_1G_LIODN(1, 2, 13),
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@ -59,7 +59,7 @@ struct liodn_id_table fman1_liodn_tbl[] = {
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int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
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#if (CONFIG_SYS_NUM_FMAN == 2)
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struct liodn_id_table fman2_liodn_tbl[] = {
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struct fman_liodn_id_table fman2_liodn_tbl[] = {
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SET_FMAN_RX_1G_LIODN(2, 0, 17),
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SET_FMAN_RX_1G_LIODN(2, 1, 18),
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SET_FMAN_RX_1G_LIODN(2, 2, 19),
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@ -1116,7 +1116,11 @@ switch_as:
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li r0,0
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1:
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dcbz r0,r3
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dcbtls 0,r0,r3
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#ifdef CONFIG_E6500 /* Lock/unlock L2 cache instead of L1 */
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dcbtls 2, r0, r3
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#else
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dcbtls 0, r0, r3
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#endif
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addi r3,r3,CONFIG_SYS_CACHELINE_SIZE
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bdnz 1b
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@ -1727,7 +1731,11 @@ unlock_ram_in_cache:
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slwi r4,r4,(10 - 1 - L1_CACHE_SHIFT)
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mtctr r4
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1: dcbi r0,r3
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#ifdef CONFIG_E6500 /* lock/unlock L2 cache instead of L1 */
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dcblc 2, r0, r3
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#else
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dcblc r0,r3
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#endif
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addi r3,r3,CONFIG_SYS_CACHELINE_SIZE
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bdnz 1b
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sync
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@ -50,7 +50,7 @@ struct liodn_id_table liodn_tbl[] = {
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int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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struct liodn_id_table fman1_liodn_tbl[] = {
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struct fman_liodn_id_table fman1_liodn_tbl[] = {
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SET_FMAN_RX_10G_TYPE2_LIODN(1, 0, 88),
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SET_FMAN_RX_1G_LIODN(1, 1, 89),
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SET_FMAN_RX_1G_LIODN(1, 2, 90),
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@ -55,7 +55,7 @@ struct liodn_id_table liodn_tbl[] = {
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int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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struct liodn_id_table fman1_liodn_tbl[] = {
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struct fman_liodn_id_table fman1_liodn_tbl[] = {
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SET_FMAN_RX_1G_LIODN(1, 0, 88),
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SET_FMAN_RX_1G_LIODN(1, 1, 89),
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SET_FMAN_RX_1G_LIODN(1, 2, 90),
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|
|
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@ -83,7 +83,7 @@ struct liodn_id_table liodn_tbl[] = {
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int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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struct liodn_id_table fman1_liodn_tbl[] = {
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struct fman_liodn_id_table fman1_liodn_tbl[] = {
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SET_FMAN_RX_1G_LIODN(1, 0, 88),
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SET_FMAN_RX_1G_LIODN(1, 1, 89),
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SET_FMAN_RX_1G_LIODN(1, 2, 90),
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|
|
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@ -112,7 +112,7 @@ struct liodn_id_table liodn_tbl[] = {
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int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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struct liodn_id_table fman1_liodn_tbl[] = {
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struct fman_liodn_id_table fman1_liodn_tbl[] = {
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SET_FMAN_RX_1G_LIODN(1, 0, 88),
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SET_FMAN_RX_1G_LIODN(1, 1, 89),
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SET_FMAN_RX_1G_LIODN(1, 2, 90),
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@ -124,7 +124,7 @@ struct liodn_id_table fman1_liodn_tbl[] = {
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};
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int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
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#if (CONFIG_SYS_NUM_FMAN == 2)
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struct liodn_id_table fman2_liodn_tbl[] = {
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struct fman_liodn_id_table fman2_liodn_tbl[] = {
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SET_FMAN_RX_1G_LIODN(2, 0, 88),
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SET_FMAN_RX_1G_LIODN(2, 1, 89),
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SET_FMAN_RX_1G_LIODN(2, 2, 90),
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|
|
|
@ -44,6 +44,18 @@ struct liodn_id_table {
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unsigned long reg_offset;
|
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};
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|
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struct fman_liodn_id_table {
|
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/* Freescale FMan Device Tree binding was updated for FMan.
|
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* We need to support both new and old compatibles in order not to
|
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* break backward compatibility.
|
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*/
|
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const char *compat[2];
|
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u32 id[2];
|
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u8 num_ids;
|
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phys_addr_t compat_offset;
|
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unsigned long reg_offset;
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};
|
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|
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extern u32 get_ppid_liodn(int ppid_tbl_idx, int ppid);
|
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extern void set_liodns(void);
|
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extern void fdt_fixup_liodn(void *blob);
|
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|
@ -54,6 +66,14 @@ extern void fdt_fixup_liodn(void *blob);
|
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#define SET_LIODN_BASE_2(idA, idB) \
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{ .id = { idA, idB }, .num_ids = 2 }
|
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|
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#define SET_FMAN_LIODN_ENTRY(name1, name2, idA, off, compatoff)\
|
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{ .compat[0] = name1, \
|
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.compat[1] = name2, \
|
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.id = { idA }, .num_ids = 1, \
|
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.reg_offset = off + CONFIG_SYS_CCSRBAR, \
|
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.compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
|
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}
|
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|
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#define SET_LIODN_ENTRY_1(name, idA, off, compatoff) \
|
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{ .compat = name, \
|
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.id = { idA }, .num_ids = 1, \
|
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|
@ -133,24 +153,37 @@ extern void fdt_fixup_liodn(void *blob);
|
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CONFIG_SYS_FSL_FM##fmNum##_OFFSET + \
|
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offsetof(struct ccsr_fman, fm_bmi_common.fmbm_ppid[portID - 1])
|
||||
|
||||
#ifdef CONFIG_SYS_FMAN_V3
|
||||
/* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */
|
||||
#define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \
|
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SET_LIODN_ENTRY_1("fsl,fman-port-1g-rx", liodn, \
|
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FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
|
||||
CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET) \
|
||||
SET_FMAN_LIODN_ENTRY("fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx", \
|
||||
liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
|
||||
CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET)
|
||||
|
||||
/* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */
|
||||
#define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \
|
||||
SET_LIODN_ENTRY_1("fsl,fman-port-10g-rx", liodn, \
|
||||
FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
|
||||
CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET) \
|
||||
SET_FMAN_LIODN_ENTRY("fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx", \
|
||||
liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
|
||||
CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET)
|
||||
|
||||
/* enetNum is 0, 1, 2... so we + 8 for type-2 10g to get to HW Port ID */
|
||||
#define SET_FMAN_RX_10G_TYPE2_LIODN(fmNum, enetNum, liodn) \
|
||||
SET_LIODN_ENTRY_1("fsl,fman-port-10g-rx", liodn, \
|
||||
FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
|
||||
CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET) \
|
||||
SET_FMAN_LIODN_ENTRY("fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx", \
|
||||
liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
|
||||
CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET)
|
||||
#else
|
||||
/* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */
|
||||
#define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \
|
||||
SET_FMAN_LIODN_ENTRY("fsl,fman-v2-port-rx", "fsl,fman-port-1g-rx", \
|
||||
liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
|
||||
CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET)
|
||||
|
||||
/* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */
|
||||
#define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \
|
||||
SET_FMAN_LIODN_ENTRY("fsl,fman-v2-port-rx", "fsl,fman-port-10g-rx", \
|
||||
liodn, FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
|
||||
CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET)
|
||||
#endif
|
||||
/*
|
||||
* handle both old and new versioned SEC properties:
|
||||
* "fsl,secX.Y" became "fsl,sec-vX.Y" during development
|
||||
|
@ -199,7 +232,7 @@ extern void fdt_fixup_liodn(void *blob);
|
|||
|
||||
extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[];
|
||||
extern struct liodn_id_table raide_liodn_tbl[];
|
||||
extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[];
|
||||
extern struct fman_liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[];
|
||||
#ifdef CONFIG_SYS_SRIO
|
||||
extern struct srio_liodn_id_table srio_liodn_tbl[];
|
||||
extern int srio_liodn_tbl_sz;
|
||||
|
|
|
@ -7,6 +7,6 @@ F: configs/T1024QDS_defconfig
|
|||
F: configs/T1024QDS_NAND_defconfig
|
||||
F: configs/T1024QDS_SDCARD_defconfig
|
||||
F: configs/T1024QDS_SPIFLASH_defconfig
|
||||
F: configs/T1024QDS_D4_defconfig
|
||||
F: configs/T1024QDS_DDR4_defconfig
|
||||
F: configs/T1024QDS_SECURE_BOOT_defconfig
|
||||
F: configs/T1024QDS_D4_SECURE_BOOT_defconfig
|
||||
F: configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
#PBL preamble and RCW header for T1023RDB
|
||||
aa55aa55 010e0100
|
||||
#SerDes Protocol: 0x77
|
||||
#Core/DDR: 1400Mhz/1600MT/s with single source clock
|
||||
0810000e 00000000 00000000 00000000
|
||||
#Default Core=1200MHz, DDR=1600MT/s with single source clock
|
||||
0810000c 00000000 00000000 00000000
|
||||
3b800003 00000012 e8104000 21000000
|
||||
00000000 00000000 00000000 00022800
|
||||
00000130 04020200 00000000 00000006
|
||||
|
|
|
@ -4,7 +4,7 @@ S: Maintained
|
|||
F: board/freescale/t1040qds/
|
||||
F: include/configs/T1040QDS.h
|
||||
F: configs/T1040QDS_defconfig
|
||||
F: configs/T1040QDS_D4_defconfig
|
||||
F: configs/T1040QDS_DDR4_defconfig
|
||||
|
||||
T1040QDS_SECURE_BOOT BOARD
|
||||
M: Aneesh Bansal <aneesh.bansal@freescale.com>
|
||||
|
|
5
configs/T1024QDS_DDR4_defconfig
Normal file
5
configs/T1024QDS_DDR4_defconfig
Normal file
|
@ -0,0 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_T102XQDS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SYS_FSL_DDR4"
|
||||
CONFIG_SPI_FLASH=y
|
|
@ -3,6 +3,7 @@
|
|||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
#include <errno.h>
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/fsl_serdes.h>
|
||||
|
@ -230,7 +231,7 @@ void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
|
|||
enum fm_port port, int offset)
|
||||
__attribute__((weak, alias("__def_board_ft_fman_fixup_port")));
|
||||
|
||||
static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)
|
||||
int ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)
|
||||
{
|
||||
int off;
|
||||
uint32_t ph;
|
||||
|
@ -239,11 +240,13 @@ static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)
|
|||
CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET;
|
||||
|
||||
off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
|
||||
if (off == -FDT_ERR_NOTFOUND)
|
||||
return -EINVAL;
|
||||
|
||||
if (info->enabled) {
|
||||
fdt_fixup_phy_connection(blob, off, info->enet_if);
|
||||
board_ft_fman_fixup_port(blob, prop, paddr, info->port, off);
|
||||
return ;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SYS_FMAN_V3
|
||||
|
@ -281,7 +284,7 @@ static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)
|
|||
((info->port == FM1_10GEC4) && (PORT_IS_ENABLED(FM1_DTSEC4)))
|
||||
#endif
|
||||
)
|
||||
return;
|
||||
return 0;
|
||||
#endif
|
||||
/* board code might have caused offset to change */
|
||||
off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
|
||||
|
@ -294,6 +297,8 @@ static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)
|
|||
ph = fdt_get_phandle(blob, off);
|
||||
do_fixup_by_prop(blob, "fsl,fman-mac", &ph, sizeof(ph),
|
||||
"status", "disabled", strlen("disabled") + 1, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void fdt_fixup_fman_ethernet(void *blob)
|
||||
|
@ -305,10 +310,18 @@ void fdt_fixup_fman_ethernet(void *blob)
|
|||
ft_fixup_port(blob, &fm_info[i], "fsl,fman-memac");
|
||||
#else
|
||||
for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
|
||||
if (fm_info[i].type == FM_ETH_1G_E)
|
||||
ft_fixup_port(blob, &fm_info[i], "fsl,fman-1g-mac");
|
||||
else
|
||||
ft_fixup_port(blob, &fm_info[i], "fsl,fman-10g-mac");
|
||||
/* Try the new compatible first.
|
||||
* If the node is missing, try the old.
|
||||
*/
|
||||
if (fm_info[i].type == FM_ETH_1G_E) {
|
||||
if (ft_fixup_port(blob, &fm_info[i], "fsl,fman-dtsec"))
|
||||
ft_fixup_port(blob, &fm_info[i],
|
||||
"fsl,fman-1g-mac");
|
||||
} else {
|
||||
if (ft_fixup_port(blob, &fm_info[i], "fsl,fman-tgec"))
|
||||
ft_fixup_port(blob, &fm_info[i],
|
||||
"fsl,fman-10g-mac");
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -460,13 +460,13 @@ unsigned long get_board_ddr_clk(void);
|
|||
#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */
|
||||
#ifdef CONFIG_PHYS_64BIT
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe0ec000
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000
|
||||
/* The assembler doesn't like typecast */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
|
||||
((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
|
||||
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
|
||||
#else
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS 0xfe0ec000 /* Initial L1 address */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS 0xfe03c000 /* Initial L1 address */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
|
||||
#endif
|
||||
|
|
|
@ -18,6 +18,9 @@
|
|||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_SYS_GENERIC_BOARD
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
/* High Level Configuration Options */
|
||||
#define CONFIG_BOOKE 1 /* BOOKE */
|
||||
#define CONFIG_E500 1 /* BOOKE e500 family */
|
||||
|
|
|
@ -13,6 +13,9 @@
|
|||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_SYS_GENERIC_BOARD
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
/* High Level Configuration Options */
|
||||
#define CONFIG_BOOKE 1 /* BOOKE */
|
||||
#define CONFIG_E500 1 /* BOOKE e500 family */
|
||||
|
|
|
@ -11,6 +11,9 @@
|
|||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_SYS_GENERIC_BOARD
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
/* High Level Configuration Options */
|
||||
#define CONFIG_BOOKE 1 /* BOOKE */
|
||||
#define CONFIG_E500 1 /* BOOKE e500 family */
|
||||
|
|
|
@ -13,6 +13,9 @@
|
|||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_SYS_GENERIC_BOARD
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
#ifdef CONFIG_36BIT
|
||||
#define CONFIG_PHYS_64BIT
|
||||
#endif
|
||||
|
|
|
@ -13,6 +13,9 @@
|
|||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_SYS_GENERIC_BOARD
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
/* High Level Configuration Options */
|
||||
#define CONFIG_BOOKE 1 /* BOOKE */
|
||||
#define CONFIG_E500 1 /* BOOKE e500 family */
|
||||
|
|
|
@ -18,6 +18,9 @@
|
|||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_SYS_GENERIC_BOARD
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
/* High Level Configuration Options */
|
||||
#define CONFIG_BOOKE 1 /* BOOKE */
|
||||
#define CONFIG_E500 1 /* BOOKE e500 family */
|
||||
|
|
|
@ -10,6 +10,9 @@
|
|||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_SYS_GENERIC_BOARD
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
/* High Level Configuration Options */
|
||||
#define CONFIG_BOOKE 1 /* BOOKE */
|
||||
#define CONFIG_E500 1 /* BOOKE e500 family */
|
||||
|
|
|
@ -10,6 +10,9 @@
|
|||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_SYS_GENERIC_BOARD
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
/* High Level Configuration Options */
|
||||
#define CONFIG_BOOKE 1 /* BOOKE */
|
||||
#define CONFIG_E500 1 /* BOOKE e500 family */
|
||||
|
|
|
@ -13,6 +13,9 @@
|
|||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_SYS_GENERIC_BOARD
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
/* High Level Configuration Options */
|
||||
#define CONFIG_MPC8610 1 /* MPC8610 specific */
|
||||
#define CONFIG_MPC8610HPCD 1 /* MPC8610HPCD board specific */
|
||||
|
|
|
@ -475,13 +475,13 @@ unsigned long get_board_ddr_clk(void);
|
|||
#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */
|
||||
#ifdef CONFIG_PHYS_64BIT
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe0ec000
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000
|
||||
/* The assembler doesn't like typecast */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
|
||||
((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
|
||||
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
|
||||
#else
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS 0xfe0ec000 /* Initial L1 address */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS 0xfe03c000 /* Initial L1 address */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
|
||||
#endif
|
||||
|
|
|
@ -476,13 +476,13 @@ unsigned long get_board_ddr_clk(void);
|
|||
#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */
|
||||
#ifdef CONFIG_PHYS_64BIT
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe0ec000
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000
|
||||
/* The assembler doesn't like typecast */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
|
||||
((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
|
||||
CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
|
||||
#else
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS 0xfe0ec000 /* Initial L1 address */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS 0xfe03c000 /* Initial L1 address */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
|
||||
#endif
|
||||
|
|
|
@ -380,7 +380,7 @@ unsigned long get_board_ddr_clk(void);
|
|||
#define CONFIG_SYS_INIT_RAM_LOCK
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe0ec000
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000
|
||||
/* The assembler doesn't like typecast */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
|
||||
((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
|
||||
|
|
|
@ -432,7 +432,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
|
|||
#define CONFIG_SYS_INIT_RAM_LOCK
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe0ec000
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000
|
||||
/* The assembler doesn't like typecast */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
|
||||
((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
|
||||
|
|
|
@ -430,7 +430,7 @@ unsigned long get_board_ddr_clk(void);
|
|||
#define CONFIG_SYS_INIT_RAM_LOCK
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe0ec000
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000
|
||||
/* The assembler doesn't like typecast */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
|
||||
((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
|
||||
|
|
|
@ -390,7 +390,7 @@ unsigned long get_board_ddr_clk(void);
|
|||
#define CONFIG_SYS_INIT_RAM_LOCK
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe0ec000
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000
|
||||
/* The assembler doesn't like typecast */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
|
||||
((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
|
||||
|
|
|
@ -179,7 +179,7 @@
|
|||
#define CONFIG_SYS_INIT_RAM_LOCK
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe0ec000
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000
|
||||
/* The assembler doesn't like typecast */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
|
||||
((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
|
||||
|
|
|
@ -123,7 +123,7 @@
|
|||
#define CONFIG_SYS_INIT_RAM_LOCK
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe0ec000
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000
|
||||
/* The assembler doesn't like typecast */
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
|
||||
((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
|
||||
|
|
Loading…
Reference in a new issue