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net: phy: marvell: Fix problem with phy_reset() clearing BMCR 

With commit a058052c [net: phy: do not read configuration register on
reset], phy_reset() will clear the BMCR register. Resulting in bit 12
being cleared (A/N enable). This leads to autonegotiation link problems,
at least on the Marvell Armada ClearFog board. I suspect that other
boards using this driver will be affected as well.

At the of m88e1111s_config(), phy_reset() is called. This is not needed
for the PHY to load the changed configuration, as phy_reset() is called
a few lines before already. So lets call genphy_restart_aneg() here
instead to start the AN correctly.

Tested on clearfog.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Hao Zhang <hzhang@ti.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
utp
Stefan Roese 2016-02-10 07:06:06 +01:00 committed by Joe Hershberger
parent 3089c47ddc
commit a8c3eca433
1 changed files with 1 additions and 2 deletions
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3
drivers/net/phy/marvell.c
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@ -251,8 +251,7 @@ static int m88e1111s_config(struct phy_device *phydev)
phy_reset(phydev);
genphy_config_aneg(phydev);
phy_reset(phydev);
genphy_restart_aneg(phydev);
return 0;
}