net: update FTGMAC100 for MMU/D-cache support
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Joe Hershberger <joe.hershberger@gmail.com> CC: Tom Rini <trini@ti.com>utp
Kuo-Jung Su
Joe Hershberger
parent
c4775476d2
commit
a8f9cd1893
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@ -27,11 +27,13 @@
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#include <malloc.h>
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#include <net.h>
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#include <asm/io.h>
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#include <asm/dma-mapping.h>
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#include <linux/mii.h>
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#include "ftgmac100.h"
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#define ETH_ZLEN 60
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#define CFG_XBUF_SIZE 1536
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/* RBSR - hw default init value is also 0x640 */
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#define RBSR_DEFAULT_VALUE 0x640
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@ -40,8 +42,10 @@
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#define PKTBUFSTX 4 /* must be power of 2 */
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struct ftgmac100_data {
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struct ftgmac100_txdes txdes[PKTBUFSTX];
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struct ftgmac100_rxdes rxdes[PKTBUFSRX];
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ulong txdes_dma;
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struct ftgmac100_txdes *txdes;
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ulong rxdes_dma;
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struct ftgmac100_rxdes *rxdes;
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int tx_index;
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int rx_index;
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int phy_addr;
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@ -375,13 +379,34 @@ static int ftgmac100_init(struct eth_device *dev, bd_t *bd)
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{
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struct ftgmac100 *ftgmac100 = (struct ftgmac100 *)dev->iobase;
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struct ftgmac100_data *priv = dev->priv;
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struct ftgmac100_txdes *txdes = priv->txdes;
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struct ftgmac100_rxdes *rxdes = priv->rxdes;
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struct ftgmac100_txdes *txdes;
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struct ftgmac100_rxdes *rxdes;
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unsigned int maccr;
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void *buf;
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int i;
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debug("%s()\n", __func__);
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if (!priv->txdes) {
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txdes = dma_alloc_coherent(
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sizeof(*txdes) * PKTBUFSTX, &priv->txdes_dma);
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if (!txdes)
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panic("ftgmac100: out of memory\n");
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memset(txdes, 0, sizeof(*txdes) * PKTBUFSTX);
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priv->txdes = txdes;
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}
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txdes = priv->txdes;
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if (!priv->rxdes) {
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rxdes = dma_alloc_coherent(
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sizeof(*rxdes) * PKTBUFSRX, &priv->rxdes_dma);
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if (!rxdes)
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panic("ftgmac100: out of memory\n");
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memset(rxdes, 0, sizeof(*rxdes) * PKTBUFSRX);
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priv->rxdes = rxdes;
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}
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rxdes = priv->rxdes;
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/* set the ethernet address */
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ftgmac100_set_mac_from_env(dev);
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@ -397,21 +422,31 @@ static int ftgmac100_init(struct eth_device *dev, bd_t *bd)
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for (i = 0; i < PKTBUFSTX; i++) {
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/* TXBUF_BADR */
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txdes[i].txdes3 = 0;
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if (!txdes[i].txdes2) {
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buf = memalign(ARCH_DMA_MINALIGN, CFG_XBUF_SIZE);
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if (!buf)
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panic("ftgmac100: out of memory\n");
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txdes[i].txdes3 = virt_to_phys(buf);
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txdes[i].txdes2 = (uint)buf;
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}
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txdes[i].txdes1 = 0;
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}
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for (i = 0; i < PKTBUFSRX; i++) {
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/* RXBUF_BADR */
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rxdes[i].rxdes3 = (unsigned int)NetRxPackets[i];
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if (!rxdes[i].rxdes2) {
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buf = NetRxPackets[i];
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rxdes[i].rxdes3 = virt_to_phys(buf);
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rxdes[i].rxdes2 = (uint)buf;
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}
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rxdes[i].rxdes0 &= ~FTGMAC100_RXDES0_RXPKT_RDY;
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}
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/* transmit ring */
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writel((unsigned int)txdes, &ftgmac100->txr_badr);
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writel(priv->txdes_dma, &ftgmac100->txr_badr);
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/* receive ring */
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writel((unsigned int)rxdes, &ftgmac100->rxr_badr);
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writel(priv->rxdes_dma, &ftgmac100->rxr_badr);
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/* poll receive descriptor automatically */
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writel(FTGMAC100_APTC_RXPOLL_CNT(1), &ftgmac100->aptc);
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@ -466,8 +501,11 @@ static int ftgmac100_recv(struct eth_device *dev)
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debug("%s(): RX buffer %d, %x received\n",
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__func__, priv->rx_index, rxlen);
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/* invalidate d-cache */
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dma_map_single((void *)curr_des->rxdes2, rxlen, DMA_FROM_DEVICE);
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/* pass the packet up to the protocol layers. */
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NetReceive((void *)curr_des->rxdes3, rxlen);
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NetReceive((void *)curr_des->rxdes2, rxlen);
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/* release buffer to DMA */
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curr_des->rxdes0 &= ~FTGMAC100_RXDES0_RXPKT_RDY;
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@ -485,7 +523,6 @@ static int ftgmac100_send(struct eth_device *dev, void *packet, int length)
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struct ftgmac100 *ftgmac100 = (struct ftgmac100 *)dev->iobase;
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struct ftgmac100_data *priv = dev->priv;
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struct ftgmac100_txdes *curr_des = &priv->txdes[priv->tx_index];
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int start;
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if (curr_des->txdes0 & FTGMAC100_TXDES0_TXDMA_OWN) {
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debug("%s(): no TX descriptor available\n", __func__);
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@ -496,8 +533,8 @@ static int ftgmac100_send(struct eth_device *dev, void *packet, int length)
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length = (length < ETH_ZLEN) ? ETH_ZLEN : length;
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/* initiate a transmit sequence */
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curr_des->txdes3 = (unsigned int)packet; /* TXBUF_BADR */
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memcpy((void *)curr_des->txdes2, (void *)packet, length);
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dma_map_single((void *)curr_des->txdes2, length, DMA_TO_DEVICE);
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/* only one descriptor on TXBUF */
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curr_des->txdes0 &= FTGMAC100_TXDES0_EDOTR;
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@ -509,15 +546,6 @@ static int ftgmac100_send(struct eth_device *dev, void *packet, int length)
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/* start transmit */
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writel(1, &ftgmac100->txpd);
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/* wait for transfer to succeed */
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start = get_timer(0);
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while (curr_des->txdes0 & FTGMAC100_TXDES0_TXDMA_OWN) {
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if (get_timer(0) >= 5) {
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debug("%s(): timed out\n", __func__);
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return -1;
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}
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}
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debug("%s(): packet sent\n", __func__);
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priv->tx_index = (priv->tx_index + 1) % PKTBUFSTX;
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