tegra: move to common SPL framework
Change tegra SPL to use common SPL framework. Any tegra specific initialization is now done in spl_board_init() instead of board_init_f()/board_init_r(). Only one SPL boot target is supported on tegra, which is boot to RAM image. jump_to_image_no_args() must be overridden on tegra so the host CPU can be initialized. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Tested-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>utp
Allen Martin
Tom Warren
parent
a759f1e0db
commit
b2f9893826
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@ -23,105 +23,42 @@
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/u-boot.h>
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#include <asm/utils.h>
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#include <nand.h>
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#include <mmc.h>
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#include <fat.h>
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#include <version.h>
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#include <i2c.h>
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#include <image.h>
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#include <malloc.h>
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#include <linux/compiler.h>
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#include "cpu.h"
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#include <spl.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/tegra.h>
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#include <asm/arch-tegra/board.h>
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#include <asm/arch-tegra/clk_rst.h>
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#include <asm/arch-tegra/pmc.h>
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#include <asm/arch-tegra/scu.h>
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#include <asm/arch-tegra/sys_proto.h>
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#include <asm/arch/spl.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* Define global data structure pointer to it*/
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static gd_t gdata __attribute__ ((section(".data")));
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static bd_t bdata __attribute__ ((section(".data")));
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inline void hang(void)
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{
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puts("### ERROR ### Please RESET the board ###\n");
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for (;;)
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;
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}
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void board_init_f(ulong dummy)
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{
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board_init_uart_f();
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/* Initialize periph GPIOs */
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gpio_early_init_uart();
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/*
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* We call relocate_code() with relocation target same as the
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* CONFIG_SYS_SPL_TEXT_BASE. This will result in relocation getting
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* skipped. Instead, only .bss initialization will happen. That's
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* all we need
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*/
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debug(">>board_init_f()\n");
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relocate_code(CONFIG_SPL_STACK, &gdata, CONFIG_SPL_TEXT_BASE);
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}
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/* This requires UART clocks to be enabled */
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static void preloader_console_init(void)
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{
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const char *u_boot_rev = U_BOOT_VERSION;
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gd = &gdata;
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gd->bd = &bdata;
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gd->flags |= GD_FLG_RELOC;
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gd->baudrate = CONFIG_BAUDRATE;
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serial_init(); /* serial communications setup */
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gd->have_console = 1;
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/* Avoid a second "U-Boot" coming from this string */
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u_boot_rev = &u_boot_rev[7];
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printf("\nU-Boot SPL %s (%s - %s)\n", u_boot_rev, U_BOOT_DATE,
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U_BOOT_TIME);
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}
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void board_init_r(gd_t *id, ulong dummy)
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void spl_board_init(void)
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{
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struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE;
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/* enable JTAG */
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writel(0xC0, &pmt->pmt_cfg_ctl);
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debug(">>spl:board_init_r()\n");
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board_init_uart_f();
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mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
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CONFIG_SYS_SPL_MALLOC_SIZE);
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#ifdef CONFIG_SPL_BOARD_INIT
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spl_board_init();
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#endif
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/* Initialize periph GPIOs */
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gpio_early_init_uart();
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clock_early_init();
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serial_init();
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preloader_console_init();
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start_cpu((u32)CONFIG_SYS_TEXT_BASE);
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halt_avp();
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/* not reached */
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}
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int board_usb_init(const void *blob)
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u32 spl_boot_device(void)
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{
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return 0;
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return BOOT_DEVICE_RAM;
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}
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void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
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{
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debug("image entry point: 0x%X\n", spl_image->entry_point);
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start_cpu((u32)spl_image->entry_point);
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halt_avp();
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}
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@ -0,0 +1,28 @@
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/*
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* (C) Copyright 2012
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* NVIDIA Corporation <www.nvidia.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _ASM_ARCH_SPL_H_
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#define _ASM_ARCH_SPL_H_
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#define BOOT_DEVICE_RAM 1
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#endif
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@ -169,6 +169,7 @@
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#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
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#define CONFIG_SYS_TEXT_BASE 0x0010c000
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#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
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@ -186,6 +187,9 @@
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/* Defines for SPL */
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#define CONFIG_SPL
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_RAM_DEVICE
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_NAND_SIMPLE
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#define CONFIG_SPL_TEXT_BASE 0x00108000
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#define CONFIG_SPL_MAX_SIZE (CONFIG_SYS_TEXT_BASE - \
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