redonkable
/
remarkable-uboot
1
0
Fork 0
Code Releases Activity

powerpc: mpc85xx: Support booting from SD Card with SPL 

The code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.

The SPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are two stage uboot images:
	* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that
	ddr spd code can get the interleaving mode setting in env. It loads
	final uboot image from offset 96KB.
	* final uboot image, size is variable depends on the functions enabled.

Signed-off-by: Ying Zhang <b40530@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
utp
Ying Zhang 2013-08-16 15:16:11 +08:00 committed by York Sun
parent 0151d99d74
commit bb0dc1084f
9 changed files with 233 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
README
View File

@ -3090,6 +3090,10 @@ FIT uImage format:
Support for NAND boot using simple NAND drivers that
expose the cmd_ctrl() interface.
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
Set for the SPL on PPC mpc8xxx targets, support for
arch/powerpc/cpu/mpc8xxx/ddr/libddr.o in SPL binary.
CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,

5
arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
View File

@ -44,6 +44,11 @@ SECTIONS
}
_edata = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(8);
__init_begin = .;
__init_end = .;

4
arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
View File

@ -218,12 +218,16 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
if (dimm_params[i].n_ranks) {
if (dimm_params[i].registered_dimm) {
temp1 = 1;
#ifndef CONFIG_SPL_BUILD
printf("Detected RDIMM %s\n",
dimm_params[i].mpart);
#endif
} else {
temp2 = 1;
#ifndef CONFIG_SPL_BUILD
printf("Detected UDIMM %s\n",
dimm_params[i].mpart);
#endif
}
}
}

81
doc/README.mpc85xx-sd-spi-boot 100644
View File

@ -0,0 +1,81 @@
----------------------------------------
Booting from On-Chip ROM (eSDHC or eSPI)
----------------------------------------
boot_format is a tool to write SD bootable images to a filesystem and build
SD/SPI images to a binary file for writing later.
When booting from an SD card/MMC, boot_format puts the configuration file and
the RAM-based U-Boot image on the card.
When booting from an EEPROM, boot_format generates a binary image that is used
to boot from this EEPROM.
Where to get boot_format:
========================
you can browse it online at:
http://git.freescale.com/git/cgit.cgi/ppc/sdk/boot-format.git/
Building
========
Run the following to build this project
$ make
Execution
=========
boot_format runs under a regular Linux machine and requires a super user mode
to run. Execute boot_format as follows.
For building SD images by writing directly to a file system on SD media:
$ boot_format $config u-boot.bin -sd $device
Where $config is the included config.dat file for your platform and $device
is the target block device for the SD media on your computer.
For build binary images directly a local file:
$ boot_format $config u-boot.bin -spi $file
Where $file is the target file. Also keep in mind the u-boot.bin file needs
to be the u-boot built for your particular platform and target media.
Example: To generate a u-boot.bin for a P1022DS booting from SD, run the
following in the u-boot repository:
$ make P1022DS_SDCARD
Configuration Files
===================
Below are the configuration files to be used with a particular platform. Keep
in mind that some of these config files are tied to the platforms DDR speed.
Please see the SoC reference manual for more documentation.
P1022DS config_sram_p1022ds.dat
P2020DS config_sram_p2020ds.dat
P2010DS config_sram_p2020ds.dat
P1020RDB config_ddr2_1g_p1020rdb_533M.dat
P1020RDB config_ddr2_1g_p1020rdb_667M.dat
P2020RDB config_ddr2_1g_p2020rdb_800M.dat
P2020RDB config_ddr2_1g_p2020rdb_667M.dat
P2020RDB config_ddr3_1gb_64bit_p2020rdb_pc.dat
P2010RDB config_ddr3_1gb_64bit_p2020rdb_pc.dat
P1020RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
P1011RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
P1010RDB config_ddr3_1gb_p1010rdb_800M.dat
P1014RDB config_ddr3_1gb_p1014rdb_800M.dat
P1021RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
P1012RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
P1022DS config_ddr3_2gb_p1022ds.dat
P1013DS config_ddr3_2gb_p1022ds.dat
P1024RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
P1013RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
P1025RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
P1016RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
P1020UTM config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
P1020MBG config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
MPC8536DS config_ddr2_512m_mpc8536ds_667M.dat

3
drivers/mmc/Makefile
View File

@ -32,6 +32,9 @@ COBJS-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
COBJS-$(CONFIG_DWMMC) += dw_mmc.o
COBJS-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
COBJS-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o
ifdef CONFIG_SPL_BUILD
COBJS-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
endif
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)

130
drivers/mmc/fsl_esdhc_spl.c 100644
View File

@ -0,0 +1,130 @@
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
*
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <mmc.h>
#include <malloc.h>
/*
* The environment variables are written to just after the u-boot image
* on SDCard, so we must read the MBR to get the start address and code
* length of the u-boot image, then calculate the address of the env.
*/
#define ESDHC_BOOT_IMAGE_SIZE 0x48
#define ESDHC_BOOT_IMAGE_ADDR 0x50
#define MBRDBR_BOOT_SIG_55 0x1fe
#define MBRDBR_BOOT_SIG_AA 0x1ff
#define CONFIG_CFG_DATA_SECTOR 0
/*
* The main entry for mmc booting. It's necessary that SDRAM is already
* configured and available since this code loads the main U-Boot image
* from mmc into SDRAM and starts it from there.
*/
void __noreturn mmc_boot(void)
{
__attribute__((noreturn)) void (*uboot)(void);
uint blk_start, blk_cnt, err;
u32 blklen;
uchar *tmp_buf;
uchar val;
uint i, byte_num;
u32 offset, code_len;
struct mmc *mmc;
mmc = find_mmc_device(0);
if (!mmc) {
puts("spl: mmc device not found!!\n");
hang();
}
blklen = mmc->read_bl_len;
tmp_buf = malloc(blklen);
if (!tmp_buf) {
puts("spl: malloc memory failed!!\n");
hang();
}
memset(tmp_buf, 0, blklen);
/*
* Read source addr from sd card
*/
err = mmc->block_dev.block_read(0, CONFIG_CFG_DATA_SECTOR, 1, tmp_buf);
if (err != 1) {
puts("spl: mmc read failed!!\n");
free(tmp_buf);
hang();
}
val = *(tmp_buf + MBRDBR_BOOT_SIG_55);
if (0x55 != val) {
puts("spl: mmc signature is not valid!!\n");
free(tmp_buf);
hang();
}
val = *(tmp_buf + MBRDBR_BOOT_SIG_AA);
if (0xAA != val) {
puts("spl: mmc signature is not valid!!\n");
free(tmp_buf);
hang();
}
byte_num = 4;
offset = 0;
for (i = 0; i < byte_num; i++) {
val = *(tmp_buf + ESDHC_BOOT_IMAGE_ADDR + i);
offset = (offset << 8) + val;
}
offset += CONFIG_SYS_MMC_U_BOOT_OFFS;
/* Get the code size from offset 0x48 */
byte_num = 4;
code_len = 0;
for (i = 0; i < byte_num; i++) {
val = *(tmp_buf + ESDHC_BOOT_IMAGE_SIZE + i);
code_len = (code_len << 8) + val;
}
code_len -= CONFIG_SYS_MMC_U_BOOT_OFFS;
/*
* Load U-Boot image from mmc into RAM
*/
blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len;
err = mmc->block_dev.block_read(0, blk_start, blk_cnt,
(uchar *)CONFIG_SYS_MMC_U_BOOT_DST);
if (err != blk_cnt) {
puts("spl: mmc read failed!!\n");
free(tmp_buf);
hang();
}
/*
* Clean d-cache and invalidate i-cache, to
* make sure that no stale data is executed.
*/
flush_cache(CONFIG_SYS_MMC_U_BOOT_DST, CONFIG_SYS_MMC_U_BOOT_SIZE);
/*
* Jump to U-Boot image
*/
uboot = (void *)CONFIG_SYS_MMC_U_BOOT_START;
(*uboot)();
}

2
drivers/mmc/mmc.c
View File

@ -1483,7 +1483,9 @@ int mmc_initialize(bd_t *bis)
if (board_mmc_init(bis) < 0)
cpu_mmc_init(bis);
#ifndef CONFIG_SPL_BUILD
print_mmc_devices(',');
#endif
do_preinit();
return 0;

1
include/fsl_esdhc.h
View File

@ -182,5 +182,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd);
static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; }
static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {}
#endif /* CONFIG_FSL_ESDHC */
void __noreturn mmc_boot(void);
#endif /* __FSL_ESDHC_H__ */

3
spl/Makefile
View File

@ -50,6 +50,9 @@ LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
endif
ifeq ($(CPU),mpc85xx)
LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
ifdef CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
endif
endif
ifeq ($(CPU),mpc86xx)
LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o