1
0
Fork 0

Merge branch 'master' of git://git.denx.de/u-boot-sh

utp
Tom Rini 2014-11-17 08:43:40 -05:00
commit bdf790fabc
41 changed files with 93 additions and 107 deletions

View File

@ -1,77 +1,129 @@
menu "SuperH architecture"
depends on SH
config SYS_ARCH
default "sh"
config CPU_SH2
bool
config CPU_SH2A
bool
select CPU_SH2
config CPU_SH3
bool
config CPU_SH4
bool
config CPU_SH4A
bool
select CPU_SH4
config SH_32BIT
bool "32bit mode"
depends on CPU_SH4A
default n
help
SH4A has 2 physical memory maps. This use 32bit mode.
And this is board specific. Please check your board if you
want to use this.
choice
prompt "Target select"
config TARGET_RSK7203
bool "Support rsk7203"
bool "RSK+ 7203"
select CPU_SH2A
config TARGET_RSK7264
bool "Support rsk7264"
bool "RSK2+SH7264"
select CPU_SH2A
config TARGET_RSK7269
bool "Support rsk7269"
bool "RSK2+SH7269"
select CPU_SH2A
config TARGET_MPR2
bool "Support mpr2"
bool "Magic Panel Release 2 board"
select CPU_SH3
config TARGET_MS7720SE
bool "Support ms7720se"
select CPU_SH3
config TARGET_SHMIN
bool "Support shmin"
bool "SHMIN"
select CPU_SH3
config TARGET_ESPT
bool "Support espt"
bool "Data Technology ESPT-GIGA board"
select CPU_SH4
config TARGET_MS7722SE
bool "Support ms7722se"
bool "SolutionEngine 7722"
select CPU_SH4
config TARGET_MS7750SE
bool "Support ms7750se"
bool "SolutionEngine 7750"
select CPU_SH4
config TARGET_AP_SH4A_4A
bool "Support ap_sh4a_4a"
bool "ALPHAPROJECT AP-SH4A-4A"
select CPU_SH4A
config TARGET_AP325RXA
bool "Support ap325rxa"
bool "Renesas AP-325RXA"
select CPU_SH4
config TARGET_ECOVEC
bool "Support ecovec"
bool "EcoVec"
select CPU_SH4A
config TARGET_MIGOR
bool "Support MigoR"
bool "Migo-R"
select CPU_SH4
config TARGET_R0P7734
bool "Support r0p7734"
select CPU_SH4A
config TARGET_R2DPLUS
bool "Support r2dplus"
bool "Renesas R2D-PLUS"
select CPU_SH4
config TARGET_R7780MP
bool "Support r7780mp"
bool "R7780MP board"
select CPU_SH4A
config TARGET_SH7752EVB
bool "Support sh7752evb"
bool "SH7752EVB"
select CPU_SH4A
config TARGET_SH7753EVB
bool "Support sh7753evb"
bool "SH7753EVB"
select CPU_SH4
config TARGET_SH7757LCR
bool "Support sh7757lcr"
bool "SH7757LCR"
select CPU_SH4A
config TARGET_SH7763RDP
bool "Support sh7763rdp"
bool "SH7763RDP"
select CPU_SH4
config TARGET_SH7785LCR
bool "Support sh7785lcr"
bool "SH7785LCR"
select CPU_SH4A
endchoice
config SYS_ARCH
default "sh"
config SYS_CPU
default "sh2" if CPU_SH2
default "sh3" if CPU_SH3
default "sh4" if CPU_SH4
source "board/alphaproject/ap_sh4a_4a/Kconfig"
source "board/espt/Kconfig"
source "board/mpr2/Kconfig"

View File

@ -7,11 +7,11 @@
#
ENDIANNESS += -EB
ifdef CONFIG_SH2A
ifdef CONFIG_CPU_SH2A
PLATFORM_CPPFLAGS += -m2a -m2a-nofpu -mb
else # SH2
PLATFORM_CPPFLAGS += -m3e -mb
endif
PLATFORM_CPPFLAGS += -DCONFIG_SH2 $(call cc-option,-mno-fdpic)
PLATFORM_CPPFLAGS += $(call cc-option,-mno-fdpic)
PLATFORM_LDFLAGS += $(ENDIANNESS)

View File

@ -11,4 +11,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
#
PLATFORM_CPPFLAGS += -DCONFIG_SH3 -m3
PLATFORM_CPPFLAGS += -m3

View File

@ -8,4 +8,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
#
PLATFORM_CPPFLAGS += -DCONFIG_SH4 -m4-nofpu
PLATFORM_CPPFLAGS += -m4-nofpu

View File

@ -1,7 +1,7 @@
#ifndef __ASM_SH_CACHE_H
#define __ASM_SH_CACHE_H
#if defined(CONFIG_SH4)
#if defined(CONFIG_CPU_SH4)
int cache_control(unsigned int cmd);
@ -18,7 +18,7 @@ struct __large_struct { unsigned long buf[100]; };
*/
#define ARCH_DMA_MINALIGN 32
#endif /* CONFIG_SH4 */
#endif /* CONFIG_CPU_SH4 */
/*
* Use the L1 data cache line size value for the minimum DMA buffer alignment

View File

@ -1,10 +1,10 @@
#ifndef _ASM_SH_PROCESSOR_H_
#define _ASM_SH_PROCESSOR_H_
#if defined(CONFIG_SH2)
#if defined(CONFIG_CPU_SH2)
# include <asm/cpu_sh2.h>
#elif defined(CONFIG_SH3)
#elif defined(CONFIG_CPU_SH3)
# include <asm/cpu_sh3.h>
#elif defined(CONFIG_SH4)
#elif defined(CONFIG_CPU_SH4)
# include <asm/cpu_sh4.h>
#endif
#endif

View File

@ -8,7 +8,7 @@
obj-y += board.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
ifeq ($(CONFIG_SH2),y)
ifeq ($(CONFIG_CPU_SH2),y)
obj-y += time_sh2.o
else
obj-y += time.o

View File

@ -1,8 +1,5 @@
if TARGET_AP_SH4A_4A
config SYS_CPU
default "sh4"
config SYS_BOARD
default "ap_sh4a_4a"

View File

@ -1,8 +1,5 @@
if TARGET_ESPT
config SYS_CPU
default "sh4"
config SYS_BOARD
default "espt"

View File

@ -1,8 +1,5 @@
if TARGET_MPR2
config SYS_CPU
default "sh3"
config SYS_BOARD
default "mpr2"

View File

@ -1,8 +1,5 @@
if TARGET_MS7720SE
config SYS_CPU
default "sh3"
config SYS_BOARD
default "ms7720se"

View File

@ -1,8 +1,5 @@
if TARGET_MS7722SE
config SYS_CPU
default "sh4"
config SYS_BOARD
default "ms7722se"

View File

@ -1,8 +1,5 @@
if TARGET_MS7750SE
config SYS_CPU
default "sh4"
config SYS_BOARD
default "ms7750se"

View File

@ -1,8 +1,5 @@
if TARGET_MIGOR
config SYS_CPU
default "sh4"
config SYS_BOARD
default "MigoR"

View File

@ -1,8 +1,5 @@
if TARGET_AP325RXA
config SYS_CPU
default "sh4"
config SYS_BOARD
default "ap325rxa"

View File

@ -1,8 +1,5 @@
if TARGET_ECOVEC
config SYS_CPU
default "sh4"
config SYS_BOARD
default "ecovec"

View File

@ -41,7 +41,7 @@ static void debug_led(u8 led)
int board_late_init(void)
{
u8 mac[6];
char env_mac[17];
char env_mac[18];
udelay(1000);

View File

@ -1,8 +1,5 @@
if TARGET_R0P7734
config SYS_CPU
default "sh4"
config SYS_BOARD
default "r0p7734"

View File

@ -1,8 +1,5 @@
if TARGET_R2DPLUS
config SYS_CPU
default "sh4"
config SYS_BOARD
default "r2dplus"

View File

@ -1,8 +1,5 @@
if TARGET_R7780MP
config SYS_CPU
default "sh4"
config SYS_BOARD
default "r7780mp"

View File

@ -1,8 +1,5 @@
if TARGET_RSK7203
config SYS_CPU
default "sh2"
config SYS_BOARD
default "rsk7203"

View File

@ -1,8 +1,5 @@
if TARGET_RSK7264
config SYS_CPU
default "sh2"
config SYS_BOARD
default "rsk7264"

View File

@ -1,8 +1,5 @@
if TARGET_RSK7269
config SYS_CPU
default "sh2"
config SYS_BOARD
default "rsk7269"

View File

@ -1,8 +1,5 @@
if TARGET_SH7752EVB
config SYS_CPU
default "sh4"
config SYS_BOARD
default "sh7752evb"

View File

@ -1,8 +1,5 @@
if TARGET_SH7753EVB
config SYS_CPU
default "sh4"
config SYS_BOARD
default "sh7753evb"

View File

@ -1,8 +1,5 @@
if TARGET_SH7757LCR
config SYS_CPU
default "sh4"
config SYS_BOARD
default "sh7757lcr"

View File

@ -1,8 +1,5 @@
if TARGET_SH7763RDP
config SYS_CPU
default "sh4"
config SYS_BOARD
default "sh7763rdp"

View File

@ -1,8 +1,5 @@
if TARGET_SH7785LCR
config SYS_CPU
default "sh4"
config SYS_BOARD
default "sh7785lcr"

View File

@ -1,8 +1,5 @@
if TARGET_SHMIN
config SYS_CPU
default "sh3"
config SYS_BOARD
default "shmin"

View File

@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_SH_32BIT=y
CONFIG_TARGET_SH7752EVB=y

View File

@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_SH_32BIT=y
CONFIG_TARGET_SH7753EVB=y

View File

@ -1,2 +1,3 @@
CONFIG_SH=y
CONFIG_SH_32BIT=y
CONFIG_TARGET_SH7757LCR=y

View File

@ -1,3 +1,3 @@
CONFIG_SYS_EXTRA_OPTIONS="SH_32BIT=1"
CONFIG_SH=y
CONFIG_SH_32BIT=y
CONFIG_TARGET_SH7785LCR=y

View File

@ -433,7 +433,7 @@ static inline void sci_##name##_out(struct uart_port *port,\
SCI_OUT(sci_size, sci_offset, value);\
}
#if defined(CONFIG_SH3) || \
#if defined(CONFIG_CPU_SH3) || \
defined(CONFIG_ARCH_SH7367) || \
defined(CONFIG_ARCH_SH7377) || \
defined(CONFIG_ARCH_SH7372) || \

View File

@ -11,7 +11,6 @@
#define __RSK7203_H
#undef DEBUG
#define CONFIG_SH2A 1
#define CONFIG_CPU_SH7203 1
#define CONFIG_RSK7203 1

View File

@ -12,7 +12,6 @@
#define __RSK7264_H
#undef DEBUG
#define CONFIG_SH2A 1
#define CONFIG_CPU_SH7264 1
#define CONFIG_RSK7264 1

View File

@ -11,7 +11,6 @@
#define __RSK7269_H
#undef DEBUG
#define CONFIG_SH2A 1
#define CONFIG_CPU_SH7269 1
#define CONFIG_RSK7269 1

View File

@ -10,7 +10,6 @@
#define __SH7752EVB_H
#undef DEBUG
#define CONFIG_SH_32BIT 1
#define CONFIG_CPU_SH7752 1
#define CONFIG_SH7752EVB 1

View File

@ -10,7 +10,6 @@
#define __SH7753EVB_H
#undef DEBUG
#define CONFIG_SH_32BIT 1
#define CONFIG_CPU_SH7753 1
#define CONFIG_SH7753EVB 1

View File

@ -10,7 +10,6 @@
#define __SH7757LCR_H
#undef DEBUG
#define CONFIG_SH_32BIT 1
#define CONFIG_CPU_SH7757 1
#define CONFIG_SH7757LCR 1
#define CONFIG_SH7757LCR_DDR_ECC 1

View File

@ -25,7 +25,7 @@
#include <asm/types.h>
#if defined(CONFIG_SH3)
#if defined(CONFIG_CPU_SH3)
struct tmu_regs {
u8 tocr;
u8 reserved0;
@ -45,9 +45,9 @@ struct tmu_regs {
u16 reserved4;
u32 tcpr2;
};
#endif /* CONFIG_SH3 */
#endif /* CONFIG_CPU_SH3 */
#if defined(CONFIG_SH4) || defined(CONFIG_RMOBILE)
#if defined(CONFIG_CPU_SH4) || defined(CONFIG_RMOBILE)
struct tmu_regs {
u32 reserved;
u8 tstr;
@ -65,7 +65,7 @@ struct tmu_regs {
u16 tcr2;
u16 reserved5;
};
#endif /* CONFIG_SH4 */
#endif /* CONFIG_CPU_SH4 */
static inline unsigned long get_tmu0_clk_rate(void)
{