1
0
Fork 0

ARM: dts: uniphier: add reference clock nodes

Add master clock nodes generated by crystal oscillators.

  PH1-sLD3, PH1-LD4: 24.576 MHz
  PH1-Pro4, ProXstream2: 25.000 MHz
  PH1-Pro5: 20.000 MHz

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
utp
Masahiro Yamada 2016-02-02 21:11:33 +09:00
parent 48264d9beb
commit cc33609546
7 changed files with 33 additions and 0 deletions

View File

@ -9,6 +9,13 @@
/include/ "skeleton.dtsi"
/ {
clocks {
refclk: ref {
#clock-cells = <0>;
compatible = "fixed-clock";
};
};
soc: soc {
compatible = "simple-bus";
#address-cells = <1>;

View File

@ -136,6 +136,10 @@
};
};
&refclk {
clock-frequency = <24576000>;
};
&serial0 {
clock-frequency = <36864000>;
};

View File

@ -177,6 +177,10 @@
};
};
&refclk {
clock-frequency = <25000000>;
};
&serial0 {
clock-frequency = <73728000>;
};

View File

@ -171,6 +171,10 @@
};
};
&refclk {
clock-frequency = <20000000>;
};
&serial0 {
clock-frequency = <73728000>;
};

View File

@ -30,6 +30,12 @@
};
clocks {
refclk: ref {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24576000>;
};
arm_timer_clk: arm_timer_clk {
#clock-cells = <0>;
compatible = "fixed-clock";

View File

@ -136,6 +136,10 @@
};
};
&refclk {
clock-frequency = <25000000>;
};
&serial0 {
clock-frequency = <80000000>;
};

View File

@ -182,6 +182,10 @@
};
};
&refclk {
clock-frequency = <25000000>;
};
&serial0 {
clock-frequency = <88900000>;
};