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ARM: tegra: move CONFIG_TEGRAnn 

<asm/arch-tegra/tegra.h> needs to use CONFIG_TEGRA* to conditionalize
some definitions, since some modules moved between generations. Move
the definition of CONFIG_TEGRAnn to a header that's included earlier,
so that it's set by the time tegra.h needs to use it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
utp
Stephen Warren 2014-02-03 14:03:24 -07:00 committed by Tom Warren
parent cc07294bc7
commit cd7efc2a94
8 changed files with 8 additions and 20 deletions
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2
arch/arm/include/asm/arch-tegra114/tegra.h
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@ -17,6 +17,8 @@
#ifndef _TEGRA114_H_
#define _TEGRA114_H_
#define CONFIG_TEGRA114
#define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T114 */
#define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */

2
arch/arm/include/asm/arch-tegra124/tegra.h
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@ -8,6 +8,8 @@
#ifndef _TEGRA124_H_
#define _TEGRA124_H_
#define CONFIG_TEGRA124
#define NV_PA_SDRAM_BASE 0x80000000
#define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */
#define NV_PA_MC_BASE 0x70019000 /* Mem Ctlr regs (MCB, etc.) */

2
arch/arm/include/asm/arch-tegra20/tegra.h
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@ -8,6 +8,8 @@
#ifndef _TEGRA20_H_
#define _TEGRA20_H_
#define CONFIG_TEGRA20
#define NV_PA_SDRAM_BASE 0x00000000
#include <asm/arch-tegra/tegra.h>

2
arch/arm/include/asm/arch-tegra30/tegra.h
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@ -17,6 +17,8 @@
#ifndef _TEGRA30_H_
#define _TEGRA30_H_
#define CONFIG_TEGRA30
#define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T30 */
#include <asm/arch-tegra/tegra.h>

5
include/configs/tegra114-common.h
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@ -26,11 +26,6 @@
*/
#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
/*
* High Level Configuration Options
*/
#define CONFIG_TEGRA114 /* in a NVidia Tegra114 core */
/* Environment information, boards can override if required */
#define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */

5
include/configs/tegra124-common.h
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@ -18,11 +18,6 @@
*/
#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
/*
* High Level Configuration Options
*/
#define CONFIG_TEGRA124 /* is an NVIDIA Tegra124 core */
/* Environment information, boards can override if required */
#define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */

5
include/configs/tegra20-common.h
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@ -24,11 +24,6 @@
*/
#define V_NS16550_CLK 216000000 /* 216MHz (pllp_out0) */
/*
* High Level Configuration Options
*/
#define CONFIG_TEGRA20 /* in a NVidia Tegra20 core */
/* Environment information, boards can override if required */
#define CONFIG_LOADADDR 0x00408000 /* def. location for kernel */

5
include/configs/tegra30-common.h
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@ -23,11 +23,6 @@
*/
#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
/*
* High Level Configuration Options
*/
#define CONFIG_TEGRA30 /* in a NVidia Tegra30 core */
/* Environment information, boards can override if required */
#define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */