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powerpc/mpc8xxx: Move DDR RCW overriding to common code 

DDR RCW varies at different speeds. It is common for all platform. Move it
out from corenet_ds.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
utp
York Sun 2011-08-24 09:40:26 -07:00 committed by Kumar Gala
parent 2bba85f412
commit cda1de21de
2 changed files with 15 additions and 14 deletions
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15
arch/powerpc/cpu/mpc8xxx/ddr/options.c
View File

@ -272,6 +272,7 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
char buffer[HWCONFIG_BUFFER_SIZE];
char *buf = NULL;
const dynamic_odt_t *pdodt = odt_unknown;
ulong ddr_freq;
/*
* Extract hwconfig from environment since we have not properly setup
@ -716,6 +717,20 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
if (pdimm[0].n_ranks == 4)
popts->quad_rank_present = 1;
ddr_freq = get_ddr_freq(0) / 1000000;
if (popts->registered_dimm_en) {
popts->rcw_override = 1;
popts->rcw_1 = 0x000a5a00;
if (ddr_freq <= 800)
popts->rcw_2 = 0x00000000;
else if (ddr_freq <= 1066)
popts->rcw_2 = 0x00100000;
else if (ddr_freq <= 1333)
popts->rcw_2 = 0x00200000;
else
popts->rcw_2 = 0x00300000;
}
fsl_ddr_board_options(popts, pdimm, ctrl_num);
return 0;

14
board/freescale/corenet_ds/ddr.c
View File

@ -223,20 +223,6 @@ void fsl_ddr_board_options(memctl_options_t *popts,
/* DHC_EN =1, ODT = 60 Ohm */
popts->ddr_cdr1 = DDR_CDR1_DHC_EN;
/* override SPD values. rcw_2 should vary at differnt speed */
if (pdimm[0].registered_dimm == 1) {
popts->rcw_override = 1;
popts->rcw_1 = 0x000a5a00;
if (ddr_freq <= 800)
popts->rcw_2 = 0x00000000;
else if (ddr_freq <= 1066)
popts->rcw_2 = 0x00100000;
else if (ddr_freq <= 1333)
popts->rcw_2 = 0x00200000;
else
popts->rcw_2 = 0x00300000;
}
}
phys_size_t initdram(int board_type)