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powerpc/85xx:Fix NAND code base to support debugger 

Update NAND code base to ovecome e500 and e500v2's second limitation i.e. IVPR
+ IVOR15 should be valid fetchable OP code address.

As NAND SPL does not compile vector table so making sure IVOR + IVOR15 points to
any fetchable valid data

Signed-off-by: Radu Lazarescu <radu.lazarescu@freescale.com>
Signed-off-by: Marius Grigoras <marius.grigoras@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
utp
Prabhakar Kushwaha 2012-04-29 23:56:56 +00:00 committed by Andy Fleming
parent 689f00fc7e
commit d16a37b864
1 changed files with 1 additions and 1 deletions
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2
arch/powerpc/cpu/mpc85xx/start.S
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@ -182,7 +182,7 @@ l2_disabled:
andi. r1,r3,L1CSR0_DCE@l
beq 2b
#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB)
#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(CONFIG_NAND_SPL)
/*
* TLB entry for debuggging in AS1
* Create temporary TLB entry in AS0 to handle debug exception