Merge branch 'master' of /home/wd/git/u-boot/custodians
This commit is contained in:
Wolfgang Denk
commit
d52785d7f5
19
Makefile
19
Makefile
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@ -2380,8 +2380,23 @@ MPC837XERDB_config: unconfig
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MVBLM7_config: unconfig
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@$(MKCONFIG) $(@:_config=) ppc mpc83xx mvblm7 matrix_vision
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sbc8349_config: unconfig
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@$(MKCONFIG) $(@:_config=) ppc mpc83xx sbc8349
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sbc8349_config \
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sbc8349_PCI_33_config \
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sbc8349_PCI_66_config: unconfig
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@mkdir -p $(obj)include
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@if [ "$(findstring _PCI_,$@)" ] ; then \
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$(XECHO) -n "... PCI HOST at " ; \
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echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
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fi ; \
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if [ "$(findstring _33_,$@)" ] ; then \
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$(XECHO) -n "33MHz... " ; \
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echo "#define PCI_33M" >>$(obj)include/config.h ; \
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fi ; \
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if [ "$(findstring _66_,$@)" ] ; then \
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$(XECHO) -n "66MHz... " ; \
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echo "#define PCI_66M" >>$(obj)include/config.h ; \
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fi ;
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@$(MKCONFIG) -a sbc8349 ppc mpc83xx sbc8349
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SIMPC8313_LP_config \
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SIMPC8313_SP_config: unconfig
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@ -91,19 +91,37 @@ safety check before resetting the board upon completion of the reflash.
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PCI:
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====
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This board and U-Boot have been tested with PCI built in, on a SBC8349
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and confirmed that the "pci" command showed the intel e1000 that was
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present in the PCI slot. Note that if a 33MHz 32bit card is inserted
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in the slot, then the whole board will clock down to a 33MHz base
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clock instead of the default 66MHz. This will change the baud clocks
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and mess up your serial console output. If you want to use a 33MHz PCI
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card, then you should build a U-Boot with #undef PCI_66M in the
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include/configs/sbc8349.h and store this to flash prior to powering down
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the board and inserting the 33MHz PCI card.
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There are three configuration choices:
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sbc8349_config
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sbc8349_PCI_33_config
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sbc8349_PCI_66_config
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By default PCI support is disabled to better support very early
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revision MPC834x chips with possible PCI issues. Also PCI support is
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untested on the sbc8347 variants at this point in time.
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The 1st does not enable CONFIG_PCI, and assumes that the PCI slot
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will be left empty (M66EN high), and so the board will operate with
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a base clock of 66MHz. Note that you need both PCI enabled in u-boot
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and linux in order to have functional PCI under linux. The only
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reason for choosing to not enable PCI would be if you had a very
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early (rev 1.0) CPU with possible PCI issues.
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The second enables PCI support and builds for a 33MHz clock rate. Note
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that if a 33MHz 32bit card is inserted in the slot, then the whole board
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will clock down to a 33MHz base clock instead of the default 66MHz. This
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will change the baud clocks and mess up your serial console output if you
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were previously running at 66MHz. If you want to use a 33MHz PCI card,
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then you should build a U-Boot with sbc8349_PCI_33_config and store this
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to flash prior to powering down the board and inserting the 33MHz PCI
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card.
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Paul Gortmaker, 01/2007
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The third option builds PCI support in, and leaves the clocking at the
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default 66MHz. This has been tested with an intel PCI-X e1000 card.
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This is also the appropriate choice for people with a recent (non 1.0)
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CPU who currently have the PCI slot physically empty, but intend to
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possibly add a PCI-X card at a later date.
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=> pci
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Scanning PCI devices on bus 0
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BusDevFun VendorId DeviceId Device Class Sub-Class
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_____________________________________________________________
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00.00.00 0x1957 0x0080 Processor 0x20
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00.11.00 0x8086 0x1026 Network controller 0x00
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=>
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@ -594,7 +594,7 @@
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#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
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#define CONFIG_FDTFILE mpc8313erdb.dtb
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#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
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#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
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#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
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#define CONFIG_BAUDRATE 115200
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@ -611,7 +611,7 @@
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"cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
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"protect on " MK_STR(TEXT_BASE) " +$filesize; " \
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"cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
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"fdtaddr=400000\0" \
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"fdtaddr=780000\0" \
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"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \
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"console=ttyS0\0" \
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"setbootargs=setenv bootargs " \
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@ -566,7 +566,7 @@
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
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#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
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#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
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#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
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@ -576,7 +576,7 @@
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"consoledev=ttyS0\0" \
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"ramdiskaddr=1000000\0" \
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"ramdiskfile=ramfs.83xx\0" \
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"fdtaddr=400000\0" \
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"fdtaddr=780000\0" \
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"fdtfile=mpc8315erdb.dtb\0" \
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"usb_phy_type=utmi\0" \
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""
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@ -542,7 +542,7 @@
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#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
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#define CONFIG_FDTFILE mpc832x_rdb.dtb
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#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
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#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
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#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
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#define CONFIG_BAUDRATE 115200
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@ -558,7 +558,7 @@
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"cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
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"protect on " MK_STR(TEXT_BASE) " +$filesize; " \
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"cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
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"fdtaddr=400000\0" \
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"fdtaddr=780000\0" \
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"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \
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"ramdiskaddr=1000000\0" \
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"ramdiskfile=" MK_STR(CONFIG_RAMDISKFILE) "\0" \
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@ -548,7 +548,7 @@
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
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#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
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#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
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#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
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@ -558,7 +558,7 @@
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"consoledev=ttyS0\0" \
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"ramdiskaddr=1000000\0" \
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"ramdiskfile=ramfs.83xx\0" \
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"fdtaddr=400000\0" \
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"fdtaddr=780000\0" \
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"fdtfile=mpc832x_mds.dtb\0" \
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""
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@ -172,7 +172,6 @@
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#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
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#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
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#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
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#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
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@ -701,7 +700,7 @@
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#define CONFIG_GATEWAYIP 192.168.1.1
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
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#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
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#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
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#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
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@ -732,7 +731,7 @@
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"update=protect off fe000000 fe03ffff; " \
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"era fe000000 fe03ffff; cp.b 100000 fe000000 ${filesize}\0" \
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"upd=run load update\0" \
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"fdtaddr=400000\0" \
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"fdtaddr=780000\0" \
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"fdtfile=mpc8349emds.dtb\0" \
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""
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@ -589,7 +589,7 @@
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
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#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
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#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
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#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
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@ -599,7 +599,7 @@
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"consoledev=ttyS0\0" \
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"ramdiskaddr=1000000\0" \
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"ramdiskfile=ramfs.83xx\0" \
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"fdtaddr=400000\0" \
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"fdtaddr=780000\0" \
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"fdtfile=mpc836x_mds.dtb\0" \
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""
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@ -646,7 +646,7 @@ extern int board_pci_host_broken(void);
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
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#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
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#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
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#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
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@ -656,7 +656,7 @@ extern int board_pci_host_broken(void);
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"consoledev=ttyS0\0" \
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"ramdiskaddr=1000000\0" \
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"ramdiskfile=ramfs.83xx\0" \
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"fdtaddr=400000\0" \
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"fdtaddr=780000\0" \
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"fdtfile=mpc8379_mds.dtb\0" \
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""
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@ -190,8 +190,8 @@
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/* 0x3937d322 */
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#define CONFIG_SYS_DDR_TIMING_2 0x02984cc8
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#define CONFIG_SYS_DDR_INTERVAL ((1545 << SDRAM_INTERVAL_REFINT_SHIFT) \
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| (256 << SDRAM_INTERVAL_BSTOPRE_SHIFT))
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#define CONFIG_SYS_DDR_INTERVAL ((1024 << SDRAM_INTERVAL_REFINT_SHIFT) \
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| (0 << SDRAM_INTERVAL_BSTOPRE_SHIFT))
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/* 0x06090100 */
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#if defined(CONFIG_DDR_2T_TIMING)
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@ -205,7 +205,7 @@
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/* 0x43000000 */
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#endif
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#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00001000 /* 1 posted refresh */
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#define CONFIG_SYS_DDR_MODE ((0x0440 << SDRAM_MODE_ESD_SHIFT) \
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#define CONFIG_SYS_DDR_MODE ((0x0406 << SDRAM_MODE_ESD_SHIFT) \
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| (0x0442 << SDRAM_MODE_SD_SHIFT))
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/* 0x04400442 */ /* DDR400 */
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#define CONFIG_SYS_DDR_MODE2 0x00000000
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@ -668,7 +668,7 @@
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#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
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#define CONFIG_FDTFILE mpc8379_rdb.dtb
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#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
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#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
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#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
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#define CONFIG_BAUDRATE 115200
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@ -684,7 +684,7 @@
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"cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
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"protect on " MK_STR(TEXT_BASE) " +$filesize; " \
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"cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
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"fdtaddr=400000\0" \
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"fdtaddr=780000\0" \
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"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \
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"ramdiskaddr=1000000\0" \
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"ramdiskfile=" MK_STR(CONFIG_RAMDISKFILE) "\0" \
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@ -250,7 +250,7 @@ extern int tqm834x_num_flash_banks;
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#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
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/* PCI1 host bridge */
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#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000
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#define CONFIG_SYS_PCI1_MEM_BASE 0x90000000
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#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
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#define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */
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#define CONFIG_SYS_PCI1_MMIO_BASE (CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE)
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@ -40,24 +40,28 @@
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#define CONFIG_MPC8349 1 /* MPC8349 specific */
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#define CONFIG_SBC8349 1 /* WRS SBC8349 board specific */
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#undef CONFIG_PCI
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/* Don't enable PCI2 on sbc834x - it doesn't exist physically. */
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#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
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#define PCI_66M
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#ifdef PCI_66M
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#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
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#else
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/*
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* The default if PCI isn't enabled, or if no PCI clk setting is given
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* is 66MHz; this is what the board defaults to when the PCI slot is
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* physically empty. The board will automatically (i.e w/o jumpers)
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* clock down to 33MHz if you insert a 33MHz PCI card.
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*/
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#ifdef PCI_33M
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#define CONFIG_83XX_CLKIN 33000000 /* in Hz */
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#else /* 66M */
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#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
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#endif
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#ifndef CONFIG_SYS_CLK_FREQ
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#ifdef PCI_66M
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#define CONFIG_SYS_CLK_FREQ 66000000
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#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1
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#else
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#ifdef PCI_33M
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#define CONFIG_SYS_CLK_FREQ 33000000
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#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_8X1
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#else /* 66M */
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#define CONFIG_SYS_CLK_FREQ 66000000
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#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1
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#endif
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#endif
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||||
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||||
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@ -153,7 +157,6 @@
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|||
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
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||||
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
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||||
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||||
#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
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||||
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
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||||
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#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
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||||
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|
@ -627,7 +630,7 @@
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|||
#define CONFIG_GATEWAYIP 192.168.1.1
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||||
#define CONFIG_NETMASK 255.255.255.0
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||||
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||||
#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
|
||||
#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
|
||||
|
||||
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
|
||||
#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
|
||||
|
|
@ -654,7 +657,7 @@
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|||
"update=protect off ff800000 ff83ffff; " \
|
||||
"era ff800000 ff83ffff; cp.b 100000 ff800000 ${filesize}\0" \
|
||||
"upd=run load update\0" \
|
||||
"fdtaddr=400000\0" \
|
||||
"fdtaddr=780000\0" \
|
||||
"fdtfile=sbc8349.dtb\0" \
|
||||
""
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||||
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||||
|
|
|
|||
|
|
@ -152,7 +152,6 @@
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|||
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase TO (ms) */
|
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write TO (ms) */
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||||
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||||
#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
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||||
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
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||||
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||||
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
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||||
|
|
@ -555,7 +554,7 @@
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|||
#define CONFIG_ROOTPATH /tftpboot/rootfs
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||||
#define CONFIG_BOOTFILE uImage
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||||
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||||
#define CONFIG_LOADADDR 500000 /* def location for tftp and bootm */
|
||||
#define CONFIG_LOADADDR 800000 /* def location for tftp and bootm */
|
||||
|
||||
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
|
||||
#undef CONFIG_BOOTARGS /* boot command will set bootargs */
|
||||
|
|
@ -582,7 +581,7 @@
|
|||
"update=protect off fff00000 fff3ffff; " \
|
||||
"era fff00000 fff3ffff; cp.b 100000 fff00000 ${filesize}\0" \
|
||||
"upd=run load update\0" \
|
||||
"fdtaddr=400000\0" \
|
||||
"fdtaddr=780000\0" \
|
||||
"fdtfile=vme8349.dtb\0" \
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||||
""
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||||
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||||
|
|
|
|||
|
|
@ -837,6 +837,9 @@
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|||
#define CSCONFIG_EN 0x80000000
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||||
#define CSCONFIG_AP 0x00800000
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||||
#define CSCONFIG_ODT_WR_ACS 0x00010000
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||||
#if defined(CONFIG_MPC832x)
|
||||
#define CSCONFIG_ODT_WR_CFG 0x00040000
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||||
#endif
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||||
#define CSCONFIG_BANK_BIT_3 0x00004000
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||||
#define CSCONFIG_ROW_BIT 0x00000700
|
||||
#define CSCONFIG_ROW_BIT_12 0x00000000
|
||||
|
|
|
|||
Loading…
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